linux/drivers/char/ip2/i2ellis.h
<<
>>
Prefs
   1/*******************************************************************************
   2*
   3*   (c) 1999 by Computone Corporation
   4*
   5********************************************************************************
   6*
   7*
   8*   PACKAGE:     Linux tty Device Driver for IntelliPort II family of multiport
   9*                serial I/O controllers.
  10*
  11*   DESCRIPTION: Mainline code for the device driver
  12*
  13*******************************************************************************/
  14//------------------------------------------------------------------------------
  15// i2ellis.h
  16//
  17// IntelliPort-II and IntelliPort-IIEX
  18//
  19// Extremely
  20// Low
  21// Level
  22// Interface
  23// Services
  24//
  25// Structure Definitions and declarations for "ELLIS" service routines found in
  26// i2ellis.c
  27//
  28// These routines are based on properties of the IntelliPort-II and -IIEX
  29// hardware and bootstrap firmware, and are not sensitive to particular
  30// conventions of any particular loadware.
  31//
  32// Unlike i2hw.h, which provides IRONCLAD hardware definitions, the material
  33// here and in i2ellis.c is intended to provice a useful, but not required,
  34// layer of insulation from the hardware specifics.
  35//------------------------------------------------------------------------------
  36#ifndef  I2ELLIS_H   /* To prevent multiple includes */
  37#define  I2ELLIS_H   1
  38//------------------------------------------------
  39// Revision History:
  40//
  41// 30 September 1991 MAG First Draft Started
  42// 12 October   1991 ...continued...
  43//
  44// 20 December  1996 AKM Linux version
  45//-------------------------------------------------
  46
  47//----------------------
  48// Mandatory Includes:
  49//----------------------
  50#include "ip2types.h"
  51#include "i2hw.h"       // The hardware definitions
  52
  53//------------------------------------------
  54// STAT_BOXIDS packets
  55//------------------------------------------
  56#define MAX_BOX         4
  57
  58typedef struct _bidStat
  59{
  60        unsigned char bid_value[MAX_BOX];
  61} bidStat, *bidStatPtr;
  62
  63// This packet is sent in response to a CMD_GET_BOXIDS bypass command. For -IIEX
  64// boards, reports the hardware-specific "asynchronous resource register" on
  65// each expansion box. Boxes not present report 0xff. For -II boards, the first
  66// element contains 0x80 for 8-port, 0x40 for 4-port boards.
  67
  68// Box IDs aka ARR or Async Resource Register (more than you want to know)
  69//   7   6   5   4   3   2   1   0
  70//   F   F   N   N   L   S   S   S
  71//   =============================
  72//   F   F   -  Product Family Designator
  73//   =====+++++++++++++++++++++++++++++++
  74//   0   0   -  Intelliport II EX / ISA-8
  75//   1   0   -  IntelliServer
  76//   0   1   -  SAC - Port Device (Intelliport III ??? )
  77//           =====+++++++++++++++++++++++++++++++++++++++
  78//           N   N   -  Number of Ports
  79//           0   0   -  8  (eight)
  80//           0   1   -  4  (four)
  81//           1   0   -  12 (twelve)
  82//           1   1   -  16 (sixteen)
  83//                   =++++++++++++++++++++++++++++++++++
  84//                   L  -   LCD Display Module Present
  85//                   0  -   No
  86//                   1  -   LCD module present
  87//                   =========+++++++++++++++++++++++++++++++++++++
  88//                      S   S   S - Async Signals Supported Designator
  89//                      0   0   0 - 8dss, Mod DCE DB25 Female
  90//                      0   0   1 - 6dss, RJ-45
  91//                      0   1   0 - RS-232/422 dss, DB25 Female
  92//                      0   1   1 - RS-232/422 dss, separate 232/422 DB25 Female
  93//                      1   0   0 - 6dss, 921.6 I/F with ST654's
  94//                      1   0   1 - RS-423/232 8dss, RJ-45 10Pin
  95//                      1   1   0 - 6dss, Mod DCE DB25 Female
  96//                      1   1   1 - NO BOX PRESENT
  97
  98#define FF(c)   ((c & 0xC0) >> 6)
  99#define NN(c)   ((c & 0x30) >> 4)
 100#define L(c)    ((c & 0x08) >> 3)
 101#define SSS(c)   (c & 0x07)
 102
 103#define BID_HAS_654(x)  (SSS(x) == 0x04)
 104#define BID_NO_BOX      0xff /* no box */
 105#define BID_8PORT       0x80 /* IP2-8 port */
 106#define BID_4PORT       0x81 /* IP2-4 port */
 107#define BID_EXP_MASK    0x30 /* IP2-EX  */
 108#define BID_EXP_8PORT   0x00 /*     8, */
 109#define BID_EXP_4PORT   0x10 /*     4, */
 110#define BID_EXP_UNDEF   0x20 /*     UNDEF, */
 111#define BID_EXP_16PORT  0x30 /*    16, */
 112#define BID_LCD_CTRL    0x08 /* LCD Controller */
 113#define BID_LCD_NONE    0x00 /* - no controller present */
 114#define BID_LCD_PRES    0x08 /* - controller present */
 115#define BID_CON_MASK    0x07 /* - connector pinouts */
 116#define BID_CON_DB25    0x00 /* - DB-25 F */
 117#define BID_CON_RJ45    0x01 /* - rj45 */
 118
 119//------------------------------------------------------------------------------
 120// i2eBordStr
 121//
 122// This structure contains all the information the ELLIS routines require in
 123// dealing with a particular board.
 124//------------------------------------------------------------------------------
 125// There are some queues here which are guaranteed to never contain the entry
 126// for a single channel twice. So they must be slightly larger to allow
 127// unambiguous full/empty management
 128//
 129#define CH_QUEUE_SIZE ABS_MOST_PORTS+2
 130
 131typedef struct _i2eBordStr
 132{
 133        porStr         i2ePom;  // Structure containing the power-on message.
 134
 135        unsigned short i2ePomSize;
 136                                                // The number of bytes actually read if
 137                                                // different from sizeof i2ePom, indicates
 138                                                // there is an error!
 139
 140        unsigned short i2eStartMail;
 141                                                // Contains whatever inbound mailbox data
 142                                                // present at startup. NO_MAIL_HERE indicates
 143                                                // nothing was present. No special
 144                                                // significance as of this writing, but may be
 145                                                // useful for diagnostic reasons.
 146
 147        unsigned short i2eValid;
 148                                                // Indicates validity of the structure; if
 149                                                // i2eValid == I2E_MAGIC, then we can trust
 150                                                // the other fields. Some (especially
 151                                                // initialization) functions are good about
 152                                                // checking for validity.  Many functions do
 153                                                // not, it being assumed that the larger
 154                                                // context assures we are using a valid
 155                                                // i2eBordStrPtr.
 156
 157        unsigned short i2eError;
 158                                                // Used for returning an error condition from
 159                                                // several functions which use i2eBordStrPtr
 160                                                // as an argument.
 161
 162        // Accelerators to characterize separate features of a board, derived from a
 163        // number of sources.
 164
 165        unsigned short i2eFifoSize;
 166                                                // Always, the size of the FIFO. For
 167                                                // IntelliPort-II, always the same, for -IIEX
 168                                                // taken from the Power-On reset message.
 169
 170        volatile 
 171        unsigned short i2eFifoRemains;
 172                                                // Used during normal operation to indicate a
 173                                                // lower bound on the amount of data which
 174                                                // might be in the outbound fifo.
 175
 176        unsigned char  i2eFifoStyle;
 177                                                // Accelerator which tells which style (-II or
 178                                                // -IIEX) FIFO we are using.
 179
 180        unsigned char  i2eDataWidth16;
 181                                                // Accelerator which tells whether we should
 182                                                // do 8 or 16-bit data transfers.
 183
 184        unsigned char  i2eMaxIrq;
 185                                                // The highest allowable IRQ, based on the
 186                                                // slot size.
 187
 188        // Accelerators for various addresses on the board
 189        int            i2eBase;        // I/O Address of the Board
 190        int            i2eData;        // From here data transfers happen
 191        int            i2eStatus;      // From here status reads happen
 192        int            i2ePointer;     // (IntelliPort-II: pointer/commands)
 193        int            i2eXMail;       // (IntelliPOrt-IIEX: mailboxes
 194        int            i2eXMask;       // (IntelliPort-IIEX: mask write
 195
 196        //-------------------------------------------------------
 197        // Information presented in a common format across boards
 198        // For each box, bit map of the channels present.  Box closest to 
 199        // the host is box 0. LSB is channel 0. IntelliPort-II (non-expandable)
 200        // is taken to be box 0. These are derived from product i.d. registers.
 201
 202        unsigned short i2eChannelMap[ABS_MAX_BOXES];
 203
 204        // Same as above, except each is derived from firmware attempting to detect
 205        // the uart presence (by reading a valid GFRCR register). If bits are set in
 206        // i2eChannelMap and not in i2eGoodMap, there is a potential problem.
 207
 208        unsigned short i2eGoodMap[ABS_MAX_BOXES];
 209
 210        // ---------------------------
 211        // For indirect function calls
 212
 213        // Routine to cause an N-millisecond delay: Patched by the ii2Initialize
 214        // function.
 215
 216        void  (*i2eDelay)(unsigned int);
 217
 218        // Routine to write N bytes to the board through the FIFO. Returns true if
 219        // all copacetic, otherwise returns false and error is in i2eError field.
 220        // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
 221
 222        int   (*i2eWriteBuf)(struct _i2eBordStr *, unsigned char *, int);
 223
 224        // Routine to read N bytes from the board through the FIFO. Returns true if
 225        // copacetic, otherwise returns false and error in i2eError.
 226        // IF COUNT IS ODD, ROUNDS UP TO THE NEXT EVEN NUMBER.
 227
 228        int   (*i2eReadBuf)(struct _i2eBordStr *, unsigned char *, int);
 229
 230        // Returns a word from FIFO. Will use 2 byte operations if needed.
 231
 232        unsigned short (*i2eReadWord)(struct _i2eBordStr *);
 233
 234        // Writes a word to FIFO. Will use 2 byte operations if needed.
 235
 236        void  (*i2eWriteWord)(struct _i2eBordStr *, unsigned short);
 237
 238        // Waits specified time for the Transmit FIFO to go empty. Returns true if
 239        //  ok, otherwise returns false and error in i2eError.
 240
 241        int   (*i2eWaitForTxEmpty)(struct _i2eBordStr *, int);
 242
 243        // Returns true or false according to whether the outgoing mailbox is empty.
 244
 245        int   (*i2eTxMailEmpty)(struct _i2eBordStr *);
 246
 247        // Checks whether outgoing mailbox is empty.  If so, sends mail and returns
 248        // true.  Otherwise returns false.
 249
 250        int   (*i2eTrySendMail)(struct _i2eBordStr *, unsigned char);
 251
 252        // If no mail available, returns NO_MAIL_HERE, else returns the value in the
 253        // mailbox (guaranteed can't be NO_MAIL_HERE).
 254
 255        unsigned short (*i2eGetMail)(struct _i2eBordStr *);
 256
 257        // Enables the board to interrupt the host when it writes to the mailbox.
 258        // Irqs will not occur, however, until the loadware separately enables
 259        // interrupt generation to the host.  The standard loadware does this in
 260        // response to a command packet sent by the host. (Also, disables
 261        // any other potential interrupt sources from the board -- other than the
 262        // inbound mailbox).
 263
 264        void  (*i2eEnableMailIrq)(struct _i2eBordStr *);
 265
 266        // Writes an arbitrary value to the mask register.
 267
 268        void  (*i2eWriteMask)(struct _i2eBordStr *, unsigned char);
 269
 270
 271        // State information
 272
 273        // During downloading, indicates the number of blocks remaining to download
 274        // to the board.
 275
 276        short i2eToLoad;
 277
 278        // State of board (see manifests below) (e.g., whether in reset condition,
 279        // whether standard loadware is installed, etc.
 280
 281        unsigned char  i2eState;
 282
 283        // These three fields are only valid when there is loadware running on the
 284        // board. (i2eState == II_STATE_LOADED or i2eState == II_STATE_STDLOADED )
 285
 286        unsigned char  i2eLVersion;  // Loadware version
 287        unsigned char  i2eLRevision; // Loadware revision
 288        unsigned char  i2eLSub;      // Loadware subrevision
 289
 290        // Flags which only have meaning in the context of the standard loadware.
 291        // Somewhat violates the layering concept, but there is so little additional
 292        // needed at the board level (while much additional at the channel level),
 293        // that this beats maintaining two different per-board structures.
 294
 295        // Indicates which IRQ the board has been initialized (from software) to use
 296        // For MicroChannel boards, any value different from IRQ_UNDEFINED means
 297        // that the software command has been sent to enable interrupts (or specify
 298        // they are disabled). Special value: IRQ_UNDEFINED indicates that the
 299        // software command to select the interrupt has not yet been sent, therefore
 300        // (since the standard loadware insists that it be sent before any other
 301        // packets are sent) no other packets should be sent yet.
 302
 303        unsigned short i2eUsingIrq;
 304
 305        // This is set when we hit the MB_OUT_STUFFED mailbox, which prevents us
 306        // putting more in the mailbox until an appropriate mailbox message is
 307        // received.
 308
 309        unsigned char  i2eWaitingForEmptyFifo;
 310
 311        // Any mailbox bits waiting to be sent to the board are OR'ed in here.
 312
 313        unsigned char  i2eOutMailWaiting;
 314
 315        // The head of any incoming packet is read into here, is then examined and 
 316        // we dispatch accordingly.
 317
 318        unsigned short i2eLeadoffWord[1];
 319
 320        // Running counter of interrupts where the mailbox indicated incoming data.
 321
 322        unsigned short i2eFifoInInts;
 323
 324        // Running counter of interrupts where the mailbox indicated outgoing data
 325        // had been stripped.
 326
 327        unsigned short i2eFifoOutInts;
 328
 329        // If not void, gives the address of a routine to call if fatal board error
 330        // is found (only applies to standard l/w).
 331
 332        void  (*i2eFatalTrap)(struct _i2eBordStr *);
 333
 334        // Will point to an array of some sort of channel structures (whose format
 335        // is unknown at this level, being a function of what loadware is
 336        // installed and the code configuration (max sizes of buffers, etc.)).
 337
 338        void  *i2eChannelPtr;
 339
 340        // Set indicates that the board has gone fatal.
 341
 342        unsigned short i2eFatal;
 343
 344        // The number of elements pointed to by i2eChannelPtr.
 345
 346        unsigned short i2eChannelCnt;
 347
 348        // Ring-buffers of channel structures whose channels have particular needs.
 349
 350        rwlock_t        Fbuf_spinlock;
 351        volatile
 352        unsigned short i2Fbuf_strip;    // Strip index
 353        volatile 
 354        unsigned short i2Fbuf_stuff;    // Stuff index
 355        void  *i2Fbuf[CH_QUEUE_SIZE];   // An array of channel pointers
 356                                                                        // of channels who need to send
 357                                                                        // flow control packets.
 358        rwlock_t        Dbuf_spinlock;
 359        volatile
 360        unsigned short i2Dbuf_strip;    // Strip index
 361        volatile
 362        unsigned short i2Dbuf_stuff;    // Stuff index
 363        void  *i2Dbuf[CH_QUEUE_SIZE];   // An array of channel pointers
 364                                                                        // of channels who need to send
 365                                                                        // data or in-line command packets.
 366        rwlock_t        Bbuf_spinlock;
 367        volatile
 368        unsigned short i2Bbuf_strip;    // Strip index
 369        volatile
 370        unsigned short i2Bbuf_stuff;    // Stuff index
 371        void  *i2Bbuf[CH_QUEUE_SIZE];   // An array of channel pointers
 372                                                                        // of channels who need to send
 373                                                                        // bypass command packets.
 374
 375        /*
 376         * A set of flags to indicate that certain events have occurred on at least
 377         * one of the ports on this board. We use this to decide whether to spin
 378         * through the channels looking for breaks, etc.
 379         */
 380        int             got_input;
 381        int             status_change;
 382        bidStat channelBtypes;
 383
 384        /*
 385         * Debugging counters, etc.
 386         */
 387        unsigned long debugFlowQueued;
 388        unsigned long debugInlineQueued;
 389        unsigned long debugDataQueued;
 390        unsigned long debugBypassQueued;
 391        unsigned long debugFlowCount;
 392        unsigned long debugInlineCount;
 393        unsigned long debugBypassCount;
 394        
 395        rwlock_t        read_fifo_spinlock;
 396        rwlock_t        write_fifo_spinlock;
 397
 398//      For queuing interrupt bottom half handlers.     /\/\|=mhw=|\/\/
 399        struct work_struct      tqueue_interrupt;
 400
 401        struct timer_list  SendPendingTimer;   // Used by iiSendPending
 402        unsigned int    SendPendingRetry;
 403} i2eBordStr, *i2eBordStrPtr;
 404
 405//-------------------------------------------------------------------
 406// Macro Definitions for the indirect calls defined in the i2eBordStr
 407//-------------------------------------------------------------------
 408//
 409#define iiDelay(a,b)          (*(a)->i2eDelay)(b)
 410#define iiWriteBuf(a,b,c)     (*(a)->i2eWriteBuf)(a,b,c)
 411#define iiReadBuf(a,b,c)      (*(a)->i2eReadBuf)(a,b,c)
 412
 413#define iiWriteWord(a,b)      (*(a)->i2eWriteWord)(a,b)
 414#define iiReadWord(a)         (*(a)->i2eReadWord)(a)
 415
 416#define iiWaitForTxEmpty(a,b) (*(a)->i2eWaitForTxEmpty)(a,b)
 417
 418#define iiTxMailEmpty(a)      (*(a)->i2eTxMailEmpty)(a)
 419#define iiTrySendMail(a,b)    (*(a)->i2eTrySendMail)(a,b)
 420
 421#define iiGetMail(a)          (*(a)->i2eGetMail)(a)
 422#define iiEnableMailIrq(a)    (*(a)->i2eEnableMailIrq)(a)
 423#define iiDisableMailIrq(a)   (*(a)->i2eWriteMask)(a,0)
 424#define iiWriteMask(a,b)      (*(a)->i2eWriteMask)(a,b)
 425
 426//-------------------------------------------
 427// Manifests for i2eBordStr:
 428//-------------------------------------------
 429
 430typedef void (*delayFunc_t)(unsigned int);
 431
 432// i2eValid
 433//
 434#define I2E_MAGIC       0x4251   // Structure is valid.
 435#define I2E_INCOMPLETE  0x1122   // Structure failed during init.
 436
 437
 438// i2eError
 439//
 440#define I2EE_GOOD       0       // Operation successful
 441#define I2EE_BADADDR    1       // Address out of range
 442#define I2EE_BADSTATE   2       // Attempt to perform a function when the board
 443                                                        // structure was in the incorrect state
 444#define I2EE_BADMAGIC   3       // Bad magic number from Power On test (i2ePomSize
 445                                                        // reflects what was read
 446#define I2EE_PORM_SHORT 4       // Power On message too short
 447#define I2EE_PORM_LONG  5       // Power On message too long
 448#define I2EE_BAD_FAMILY 6       // Un-supported board family type
 449#define I2EE_INCONSIST  7       // Firmware reports something impossible,
 450                                                        // e.g. unexpected number of ports... Almost no
 451                                                        // excuse other than bad FIFO...
 452#define I2EE_POSTERR    8       // Power-On self test reported a bad error
 453#define I2EE_BADBUS     9       // Unknown Bus type declared in message
 454#define I2EE_TXE_TIME   10      // Timed out waiting for TX Fifo to empty
 455#define I2EE_INVALID    11      // i2eValid field does not indicate a valid and
 456                                                        // complete board structure (for functions which
 457                                                        // require this be so.)
 458#define I2EE_BAD_PORT   12      // Discrepancy between channels actually found and
 459                                                        // what the product is supposed to have. Check
 460                                                        // i2eGoodMap vs i2eChannelMap for details.
 461#define I2EE_BAD_IRQ    13      // Someone specified an unsupported IRQ
 462#define I2EE_NOCHANNELS 14      // No channel structures have been defined (for
 463                                                        // functions requiring this).
 464
 465// i2eFifoStyle
 466//
 467#define FIFO_II   0  /* IntelliPort-II style: see also i2hw.h */
 468#define FIFO_IIEX 1  /* IntelliPort-IIEX style */
 469
 470// i2eGetMail
 471//
 472#define NO_MAIL_HERE    0x1111  // Since mail is unsigned char, cannot possibly
 473                                                                // promote to 0x1111.
 474// i2eState
 475//
 476#define II_STATE_COLD      0  // Addresses have been defined, but board not even
 477                                                          // reset yet.
 478#define II_STATE_RESET     1  // Board,if it exists, has just been reset
 479#define II_STATE_READY     2  // Board ready for its first block
 480#define II_STATE_LOADING   3  // Board continuing load
 481#define II_STATE_LOADED    4  // Board has finished load: status ok
 482#define II_STATE_BADLOAD   5  // Board has finished load: failed!
 483#define II_STATE_STDLOADED 6  // Board has finished load: standard firmware
 484
 485// i2eUsingIrq
 486//
 487#define I2_IRQ_UNDEFINED        0x1352  /* No valid irq (or polling = 0) can
 488                                         * ever promote to this! */
 489//------------------------------------------
 490// Handy Macros for i2ellis.c and others
 491// Note these are common to -II and -IIEX
 492//------------------------------------------
 493
 494// Given a pointer to the board structure, does the input FIFO have any data or
 495// not?
 496//
 497#define I2_HAS_INPUT(pB)        !(inb(pB->i2eStatus) & ST_IN_EMPTY)
 498
 499// Given a pointer to the board structure, is there anything in the incoming
 500// mailbox?
 501//
 502#define I2_HAS_MAIL(pB)         (inb(pB->i2eStatus) & ST_IN_MAIL)
 503
 504#define I2_UPDATE_FIFO_ROOM(pB) ((pB)->i2eFifoRemains = (pB)->i2eFifoSize)
 505
 506//------------------------------------------
 507// Function Declarations for i2ellis.c
 508//------------------------------------------
 509//
 510// Functions called directly
 511//
 512// Initialization of a board & structure is in four (five!) parts:
 513//
 514// 1) iiSetAddress() - Define the board address & delay function for a board.
 515// 2) iiReset()      - Reset the board   (provided it exists)
 516//       -- Note you may do this to several boards --
 517// 3) iiResetDelay() - Delay for 2 seconds (once for all boards)
 518// 4) iiInitialize() - Attempt to read Power-up message; further initialize
 519//                     accelerators
 520//
 521// Then you may use iiDownloadAll() or iiDownloadFile() (in i2file.c) to write
 522// loadware.  To change loadware, you must begin again with step 2, resetting
 523// the board again (step 1 not needed).
 524
 525static int iiSetAddress(i2eBordStrPtr, int, delayFunc_t );
 526static int iiReset(i2eBordStrPtr);
 527static int iiResetDelay(i2eBordStrPtr);
 528static int iiInitialize(i2eBordStrPtr);
 529
 530// Routine to validate that all channels expected are there.
 531//
 532extern int iiValidateChannels(i2eBordStrPtr);
 533
 534// Routine used to download a block of loadware.
 535//
 536static int iiDownloadBlock(i2eBordStrPtr, loadHdrStrPtr, int);
 537
 538// Return values given by iiDownloadBlock, iiDownloadAll, iiDownloadFile:
 539//
 540#define II_DOWN_BADVALID   0    // board structure is invalid
 541#define II_DOWN_CONTINUING 1    // So far, so good, firmware expects more
 542#define II_DOWN_GOOD       2    // Download complete, CRC good
 543#define II_DOWN_BAD        3    // Download complete, but CRC bad
 544#define II_DOWN_BADFILE    4    // Bad magic number in loadware file
 545#define II_DOWN_BADSTATE   5    // Board is in an inappropriate state for
 546                                                                // downloading loadware. (see i2eState)
 547#define II_DOWN_TIMEOUT    6    // Timeout waiting for firmware
 548#define II_DOWN_OVER       7    // Too much data
 549#define II_DOWN_UNDER      8    // Not enough data
 550#define II_DOWN_NOFILE     9    // Loadware file not found
 551
 552// Routine to download an entire loadware module: Return values are a subset of
 553// iiDownloadBlock's, excluding, of course, II_DOWN_CONTINUING
 554//
 555static int iiDownloadAll(i2eBordStrPtr, loadHdrStrPtr, int, int);
 556
 557// Many functions defined here return True if good, False otherwise, with an
 558// error code in i2eError field. Here is a handy macro for setting the error
 559// code and returning.
 560//
 561#define I2_COMPLETE(pB,code) do { \
 562                 pB->i2eError = code; \
 563                 return (code == I2EE_GOOD);\
 564        } while (0)
 565
 566#endif   // I2ELLIS_H
 567
lxr.linux.no kindly hosted by Redpill Linpro AS, provider of Linux consulting and operations services since 1995.