LXR linux/arch/powerpc/platforms/cell/beat

   1/*
   2 * SMP support for Celleb platform. (Incomplete)
   3 *
   4 * (C) Copyright 2006 TOSHIBA CORPORATION
   5 *
   6 * This code is based on arch/powerpc/platforms/cell/smp.c:
   7 * Dave Engebretsen, Peter Bergner, and
   8 * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
   9 * Plus various changes from other IBM teams...
  10 *
  11 * This program is free software; you can redistribute it and/or modify
  12 * it under the terms of the GNU General Public License as published by
  13 * the Free Software Foundation; either version 2 of the License, or
  14 * (at your option) any later version.
  15 *
  16 * This program is distributed in the hope that it will be useful,
  17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 * GNU General Public License for more details.
  20 *
  21 * You should have received a copy of the GNU General Public License along
  22 * with this program; if not, write to the Free Software Foundation, Inc.,
  23 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  24 */
  25
  26#undef DEBUG
  27
  28#include <linux/kernel.h>
  29#include <linux/smp.h>
  30#include <linux/interrupt.h>
  31#include <linux/init.h>
  32#include <linux/threads.h>
  33#include <linux/cpu.h>
  34
  35#include <asm/irq.h>
  36#include <asm/smp.h>
  37#include <asm/machdep.h>
  38#include <asm/udbg.h>
  39
  40#include "beat_interrupt.h"
  41
  42#ifdef DEBUG
  43#define DBG(fmt...) udbg_printf(fmt)
  44#else
  45#define DBG(fmt...)
  46#endif
  47
  48/*
  49 * The primary thread of each non-boot processor is recorded here before
  50 * smp init.
  51 */
  52/* static cpumask_t of_spin_map; */
  53
  54/**
  55 * smp_startup_cpu() - start the given cpu
  56 *
  57 * At boot time, there is nothing to do for primary threads which were
  58 * started from Open Firmware.  For anything else, call RTAS with the
  59 * appropriate start location.
  60 *
  61 * Returns:
  62 *      0       - failure
  63 *      1       - success
  64 */
  65static inline int __devinit smp_startup_cpu(unsigned int lcpu)
  66{
  67        return 0;
  68}
  69
  70static void smp_beatic_message_pass(int target, int msg)
  71{
  72        unsigned int i;
  73
  74        if (target < NR_CPUS) {
  75                beatic_cause_IPI(target, msg);
  76        } else {
  77                for_each_online_cpu(i) {
  78                        if (target == MSG_ALL_BUT_SELF
  79                            && i == smp_processor_id())
  80                                continue;
  81                        beatic_cause_IPI(i, msg);
  82                }
  83        }
  84}
  85
  86static int __init smp_beatic_probe(void)
  87{
  88        return cpus_weight(cpu_possible_map);
  89}
  90
  91static void __devinit smp_beatic_setup_cpu(int cpu)
  92{
  93        beatic_setup_cpu(cpu);
  94}
  95
  96static void __devinit smp_celleb_kick_cpu(int nr)
  97{
  98        BUG_ON(nr < 0 || nr >= NR_CPUS);
  99
 100        if (!smp_startup_cpu(nr))
 101                return;
 102}
 103
 104static int smp_celleb_cpu_bootable(unsigned int nr)
 105{
 106        return 1;
 107}
 108static struct smp_ops_t bpa_beatic_smp_ops = {
 109        .message_pass   = smp_beatic_message_pass,
 110        .probe          = smp_beatic_probe,
 111        .kick_cpu       = smp_celleb_kick_cpu,
 112        .setup_cpu      = smp_beatic_setup_cpu,
 113        .cpu_bootable   = smp_celleb_cpu_bootable,
 114};
 115
 116/* This is called very early */
 117void __init smp_init_celleb(void)
 118{
 119        DBG(" -> smp_init_celleb()\n");
 120
 121        smp_ops = &bpa_beatic_smp_ops;
 122
 123        DBG(" <- smp_init_celleb()\n");
 124}
 125