LXR linux/arch/arm/plat-pxa/mfp.c

   1/*
   2 * linux/arch/arm/plat-pxa/mfp.c
   3 *
   4 *   Multi-Function Pin Support
   5 *
   6 * Copyright (C) 2007 Marvell Internation Ltd.
   7 *
   8 * 2007-08-21: eric miao <eric.miao@marvell.com>
   9 *             initial version
  10 *
  11 *  This program is free software; you can redistribute it and/or modify
  12 *  it under the terms of the GNU General Public License version 2 as
  13 *  published by the Free Software Foundation.
  14 */
  15
  16#include <linux/module.h>
  17#include <linux/kernel.h>
  18#include <linux/init.h>
  19#include <linux/io.h>
  20#include <linux/sysdev.h>
  21
  22#include <plat/mfp.h>
  23
  24#define MFPR_SIZE       (PAGE_SIZE)
  25
  26/* MFPR register bit definitions */
  27#define MFPR_PULL_SEL           (0x1 << 15)
  28#define MFPR_PULLUP_EN          (0x1 << 14)
  29#define MFPR_PULLDOWN_EN        (0x1 << 13)
  30#define MFPR_SLEEP_SEL          (0x1 << 9)
  31#define MFPR_SLEEP_OE_N         (0x1 << 7)
  32#define MFPR_EDGE_CLEAR         (0x1 << 6)
  33#define MFPR_EDGE_FALL_EN       (0x1 << 5)
  34#define MFPR_EDGE_RISE_EN       (0x1 << 4)
  35
  36#define MFPR_SLEEP_DATA(x)      ((x) << 8)
  37#define MFPR_DRIVE(x)           (((x) & 0x7) << 10)
  38#define MFPR_AF_SEL(x)          (((x) & 0x7) << 0)
  39
  40#define MFPR_EDGE_NONE          (0)
  41#define MFPR_EDGE_RISE          (MFPR_EDGE_RISE_EN)
  42#define MFPR_EDGE_FALL          (MFPR_EDGE_FALL_EN)
  43#define MFPR_EDGE_BOTH          (MFPR_EDGE_RISE | MFPR_EDGE_FALL)
  44
  45/*
  46 * Table that determines the low power modes outputs, with actual settings
  47 * used in parentheses for don't-care values. Except for the float output,
  48 * the configured driven and pulled levels match, so if there is a need for
  49 * non-LPM pulled output, the same configuration could probably be used.
  50 *
  51 * Output value  sleep_oe_n  sleep_data  pullup_en  pulldown_en  pull_sel
  52 *                 (bit 7)    (bit 8)    (bit 14)     (bit 13)   (bit 15)
  53 *
  54 * Input            0          X(0)        X(0)        X(0)       0
  55 * Drive 0          0          0           0           X(1)       0
  56 * Drive 1          0          1           X(1)        0          0
  57 * Pull hi (1)      1          X(1)        1           0          0
  58 * Pull lo (0)      1          X(0)        0           1          0
  59 * Z (float)        1          X(0)        0           0          0
  60 */
  61#define MFPR_LPM_INPUT          (0)
  62#define MFPR_LPM_DRIVE_LOW      (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN)
  63#define MFPR_LPM_DRIVE_HIGH     (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN)
  64#define MFPR_LPM_PULL_LOW       (MFPR_LPM_DRIVE_LOW  | MFPR_SLEEP_OE_N)
  65#define MFPR_LPM_PULL_HIGH      (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N)
  66#define MFPR_LPM_FLOAT          (MFPR_SLEEP_OE_N)
  67#define MFPR_LPM_MASK           (0xe080)
  68
  69/*
  70 * The pullup and pulldown state of the MFP pin at run mode is by default
  71 * determined by the selected alternate function. In case that some buggy
  72 * devices need to override this default behavior,  the definitions below
  73 * indicates the setting of corresponding MFPR bits
  74 *
  75 * Definition       pull_sel  pullup_en  pulldown_en
  76 * MFPR_PULL_NONE       0         0        0
  77 * MFPR_PULL_LOW        1         0        1
  78 * MFPR_PULL_HIGH       1         1        0
  79 * MFPR_PULL_BOTH       1         1        1
  80 * MFPR_PULL_FLOAT      1         0        0
  81 */
  82#define MFPR_PULL_NONE          (0)
  83#define MFPR_PULL_LOW           (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
  84#define MFPR_PULL_BOTH          (MFPR_PULL_LOW | MFPR_PULLUP_EN)
  85#define MFPR_PULL_HIGH          (MFPR_PULL_SEL | MFPR_PULLUP_EN)
  86#define MFPR_PULL_FLOAT         (MFPR_PULL_SEL)
  87
  88/* mfp_spin_lock is used to ensure that MFP register configuration
  89 * (most likely a read-modify-write operation) is atomic, and that
  90 * mfp_table[] is consistent
  91 */
  92static DEFINE_SPINLOCK(mfp_spin_lock);
  93
  94static void __iomem *mfpr_mmio_base;
  95
  96struct mfp_pin {
  97        unsigned long   config;         /* -1 for not configured */
  98        unsigned long   mfpr_off;       /* MFPRxx Register offset */
  99        unsigned long   mfpr_run;       /* Run-Mode Register Value */
 100        unsigned long   mfpr_lpm;       /* Low Power Mode Register Value */
 101};
 102
 103static struct mfp_pin mfp_table[MFP_PIN_MAX];
 104
 105/* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
 106static const unsigned long mfpr_lpm[] = {
 107        MFPR_LPM_INPUT,
 108        MFPR_LPM_DRIVE_LOW,
 109        MFPR_LPM_DRIVE_HIGH,
 110        MFPR_LPM_PULL_LOW,
 111        MFPR_LPM_PULL_HIGH,
 112        MFPR_LPM_FLOAT,
 113};
 114
 115/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
 116static const unsigned long mfpr_pull[] = {
 117        MFPR_PULL_NONE,
 118        MFPR_PULL_LOW,
 119        MFPR_PULL_HIGH,
 120        MFPR_PULL_BOTH,
 121        MFPR_PULL_FLOAT,
 122};
 123
 124/* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
 125static const unsigned long mfpr_edge[] = {
 126        MFPR_EDGE_NONE,
 127        MFPR_EDGE_RISE,
 128        MFPR_EDGE_FALL,
 129        MFPR_EDGE_BOTH,
 130};
 131
 132#define mfpr_readl(off)                 \
 133        __raw_readl(mfpr_mmio_base + (off))
 134
 135#define mfpr_writel(off, val)           \
 136        __raw_writel(val, mfpr_mmio_base + (off))
 137
 138#define mfp_configured(p)       ((p)->config != -1)
 139
 140/*
 141 * perform a read-back of any MFPR register to make sure the
 142 * previous writings are finished
 143 */
 144#define mfpr_sync()     (void)__raw_readl(mfpr_mmio_base + 0)
 145
 146static inline void __mfp_config_run(struct mfp_pin *p)
 147{
 148        if (mfp_configured(p))
 149                mfpr_writel(p->mfpr_off, p->mfpr_run);
 150}
 151
 152static inline void __mfp_config_lpm(struct mfp_pin *p)
 153{
 154        if (mfp_configured(p)) {
 155                unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
 156                if (mfpr_clr != p->mfpr_run)
 157                        mfpr_writel(p->mfpr_off, mfpr_clr);
 158                if (p->mfpr_lpm != mfpr_clr)
 159                        mfpr_writel(p->mfpr_off, p->mfpr_lpm);
 160        }
 161}
 162
 163void mfp_config(unsigned long *mfp_cfgs, int num)
 164{
 165        unsigned long flags;
 166        int i;
 167
 168        spin_lock_irqsave(&mfp_spin_lock, flags);
 169
 170        for (i = 0; i < num; i++, mfp_cfgs++) {
 171                unsigned long tmp, c = *mfp_cfgs;
 172                struct mfp_pin *p;
 173                int pin, af, drv, lpm, edge, pull;
 174
 175                pin = MFP_PIN(c);
 176                BUG_ON(pin >= MFP_PIN_MAX);
 177                p = &mfp_table[pin];
 178
 179                af  = MFP_AF(c);
 180                drv = MFP_DS(c);
 181                lpm = MFP_LPM_STATE(c);
 182                edge = MFP_LPM_EDGE(c);
 183                pull = MFP_PULL(c);
 184
 185                /* run-mode pull settings will conflict with MFPR bits of
 186                 * low power mode state,  calculate mfpr_run and mfpr_lpm
 187                 * individually if pull != MFP_PULL_NONE
 188                 */
 189                tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
 190
 191                if (likely(pull == MFP_PULL_NONE)) {
 192                        p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
 193                        p->mfpr_lpm = p->mfpr_run;
 194                } else {
 195                        p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
 196                        p->mfpr_run = tmp | mfpr_pull[pull];
 197                }
 198
 199                p->config = c; __mfp_config_run(p);
 200        }
 201
 202        mfpr_sync();
 203        spin_unlock_irqrestore(&mfp_spin_lock, flags);
 204}
 205
 206unsigned long mfp_read(int mfp)
 207{
 208        unsigned long val, flags;
 209
 210        BUG_ON(mfp < 0 || mfp >= MFP_PIN_MAX);
 211
 212        spin_lock_irqsave(&mfp_spin_lock, flags);
 213        val = mfpr_readl(mfp_table[mfp].mfpr_off);
 214        spin_unlock_irqrestore(&mfp_spin_lock, flags);
 215
 216        return val;
 217}
 218
 219void mfp_write(int mfp, unsigned long val)
 220{
 221        unsigned long flags;
 222
 223        BUG_ON(mfp < 0 || mfp >= MFP_PIN_MAX);
 224
 225        spin_lock_irqsave(&mfp_spin_lock, flags);
 226        mfpr_writel(mfp_table[mfp].mfpr_off, val);
 227        mfpr_sync();
 228        spin_unlock_irqrestore(&mfp_spin_lock, flags);
 229}
 230
 231void __init mfp_init_base(unsigned long mfpr_base)
 232{
 233        int i;
 234
 235        /* initialize the table with default - unconfigured */
 236        for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
 237                mfp_table[i].config = -1;
 238
 239        mfpr_mmio_base = (void __iomem *)mfpr_base;
 240}
 241
 242void __init mfp_init_addr(struct mfp_addr_map *map)
 243{
 244        struct mfp_addr_map *p;
 245        unsigned long offset, flags;
 246        int i;
 247
 248        spin_lock_irqsave(&mfp_spin_lock, flags);
 249
 250        for (p = map; p->start != MFP_PIN_INVALID; p++) {
 251                offset = p->offset;
 252                i = p->start;
 253
 254                do {
 255                        mfp_table[i].mfpr_off = offset;
 256                        mfp_table[i].mfpr_run = 0;
 257                        mfp_table[i].mfpr_lpm = 0;
 258                        offset += 4; i++;
 259                } while ((i <= p->end) && (p->end != -1));
 260        }
 261
 262        spin_unlock_irqrestore(&mfp_spin_lock, flags);
 263}
 264
 265void mfp_config_lpm(void)
 266{
 267        struct mfp_pin *p = &mfp_table[0];
 268        int pin;
 269
 270        for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
 271                __mfp_config_lpm(p);
 272}
 273
 274void mfp_config_run(void)
 275{
 276        struct mfp_pin *p = &mfp_table[0];
 277        int pin;
 278
 279        for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
 280                __mfp_config_run(p);
 281}
 282