LXR linux/arch/arm/plat-orion/irq.c

   1/*
   2 * arch/arm/plat-orion/irq.c
   3 *
   4 * Marvell Orion SoC IRQ handling.
   5 *
   6 * This file is licensed under the terms of the GNU General Public
   7 * License version 2.  This program is licensed "as is" without any
   8 * warranty of any kind, whether express or implied.
   9 */
  10
  11#include <linux/kernel.h>
  12#include <linux/init.h>
  13#include <linux/irq.h>
  14#include <linux/io.h>
  15#include <plat/irq.h>
  16
  17static void orion_irq_mask(u32 irq)
  18{
  19        void __iomem *maskaddr = get_irq_chip_data(irq);
  20        u32 mask;
  21
  22        mask = readl(maskaddr);
  23        mask &= ~(1 << (irq & 31));
  24        writel(mask, maskaddr);
  25}
  26
  27static void orion_irq_unmask(u32 irq)
  28{
  29        void __iomem *maskaddr = get_irq_chip_data(irq);
  30        u32 mask;
  31
  32        mask = readl(maskaddr);
  33        mask |= 1 << (irq & 31);
  34        writel(mask, maskaddr);
  35}
  36
  37static struct irq_chip orion_irq_chip = {
  38        .name           = "orion_irq",
  39        .mask           = orion_irq_mask,
  40        .mask_ack       = orion_irq_mask,
  41        .unmask         = orion_irq_unmask,
  42};
  43
  44void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
  45{
  46        unsigned int i;
  47
  48        /*
  49         * Mask all interrupts initially.
  50         */
  51        writel(0, maskaddr);
  52
  53        /*
  54         * Register IRQ sources.
  55         */
  56        for (i = 0; i < 32; i++) {
  57                unsigned int irq = irq_start + i;
  58
  59                set_irq_chip(irq, &orion_irq_chip);
  60                set_irq_chip_data(irq, maskaddr);
  61                set_irq_handler(irq, handle_level_irq);
  62                irq_desc[irq].status |= IRQ_LEVEL;
  63                set_irq_flags(irq, IRQF_VALID);
  64        }
  65}
  66