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13#ifndef __ARCH_ARM_OMAP_CLOCK_H
14#define __ARCH_ARM_OMAP_CLOCK_H
15
16struct module;
17struct clk;
18struct clockdomain;
19
20struct clkops {
21 int (*enable)(struct clk *);
22 void (*disable)(struct clk *);
23 void (*find_idlest)(struct clk *, void __iomem **, u8 *);
24 void (*find_companion)(struct clk *, void __iomem **, u8 *);
25};
26
27#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
28 defined(CONFIG_ARCH_OMAP4)
29
30struct clksel_rate {
31 u32 val;
32 u8 div;
33 u8 flags;
34};
35
36struct clksel {
37 struct clk *parent;
38 const struct clksel_rate *rates;
39};
40
41struct dpll_data {
42 void __iomem *mult_div1_reg;
43 u32 mult_mask;
44 u32 div1_mask;
45 struct clk *clk_bypass;
46 struct clk *clk_ref;
47 void __iomem *control_reg;
48 u32 enable_mask;
49 unsigned int rate_tolerance;
50 unsigned long last_rounded_rate;
51 u16 last_rounded_m;
52 u8 last_rounded_n;
53 u8 min_divider;
54 u8 max_divider;
55 u32 max_tolerance;
56 u16 max_multiplier;
57#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
58 u8 modes;
59 void __iomem *autoidle_reg;
60 void __iomem *idlest_reg;
61 u32 autoidle_mask;
62 u32 freqsel_mask;
63 u32 idlest_mask;
64 u8 auto_recal_bit;
65 u8 recal_en_bit;
66 u8 recal_st_bit;
67# endif
68};
69
70#endif
71
72struct clk {
73 struct list_head node;
74 const struct clkops *ops;
75 const char *name;
76 int id;
77 struct clk *parent;
78 struct list_head children;
79 struct list_head sibling;
80 unsigned long rate;
81 __u32 flags;
82 void __iomem *enable_reg;
83 unsigned long (*recalc)(struct clk *);
84 int (*set_rate)(struct clk *, unsigned long);
85 long (*round_rate)(struct clk *, unsigned long);
86 void (*init)(struct clk *);
87 __u8 enable_bit;
88 __s8 usecount;
89#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
90 defined(CONFIG_ARCH_OMAP4)
91 u8 fixed_div;
92 void __iomem *clksel_reg;
93 u32 clksel_mask;
94 const struct clksel *clksel;
95 struct dpll_data *dpll_data;
96 const char *clkdm_name;
97 struct clockdomain *clkdm;
98#else
99 __u8 rate_offset;
100 __u8 src_offset;
101#endif
102#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
103 struct dentry *dent;
104#endif
105};
106
107struct cpufreq_frequency_table;
108
109struct clk_functions {
110 int (*clk_enable)(struct clk *clk);
111 void (*clk_disable)(struct clk *clk);
112 long (*clk_round_rate)(struct clk *clk, unsigned long rate);
113 int (*clk_set_rate)(struct clk *clk, unsigned long rate);
114 int (*clk_set_parent)(struct clk *clk, struct clk *parent);
115 void (*clk_allow_idle)(struct clk *clk);
116 void (*clk_deny_idle)(struct clk *clk);
117 void (*clk_disable_unused)(struct clk *clk);
118#ifdef CONFIG_CPU_FREQ
119 void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
120#endif
121};
122
123extern unsigned int mpurate;
124
125extern int clk_init(struct clk_functions *custom_clocks);
126extern void clk_preinit(struct clk *clk);
127extern int clk_register(struct clk *clk);
128extern void clk_reparent(struct clk *child, struct clk *parent);
129extern void clk_unregister(struct clk *clk);
130extern void propagate_rate(struct clk *clk);
131extern void recalculate_root_clocks(void);
132extern unsigned long followparent_recalc(struct clk *clk);
133extern void clk_enable_init_clocks(void);
134#ifdef CONFIG_CPU_FREQ
135extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
136#endif
137
138extern const struct clkops clkops_null;
139
140
141
142#define RATE_FIXED (1 << 1)
143
144#define ENABLE_REG_32BIT (1 << 5)
145#define CLOCK_IDLE_CONTROL (1 << 7)
146#define CLOCK_NO_IDLE_PARENT (1 << 8)
147#define DELAYED_APP (1 << 9)
148#define CONFIG_PARTICIPANT (1 << 10)
149#define ENABLE_ON_INIT (1 << 11)
150#define INVERT_ENABLE (1 << 12)
151
152
153
154#define DEFAULT_RATE (1 << 0)
155#define RATE_IN_242X (1 << 1)
156#define RATE_IN_243X (1 << 2)
157#define RATE_IN_343X (1 << 3)
158#define RATE_IN_3430ES2 (1 << 4)
159
160#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
161
162
163#endif
164
