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11#include <linux/init.h>
12#include <linux/notifier.h>
13#include <linux/smp.h>
14#include <linux/oprofile.h>
15#include <linux/sysdev.h>
16#include <linux/slab.h>
17#include <linux/moduleparam.h>
18#include <linux/kdebug.h>
19#include <linux/cpu.h>
20#include <asm/nmi.h>
21#include <asm/msr.h>
22#include <asm/apic.h>
23
24#include "op_counter.h"
25#include "op_x86_model.h"
26
27static struct op_x86_model_spec const *model;
28static DEFINE_PER_CPU(struct op_msrs, cpu_msrs);
29static DEFINE_PER_CPU(unsigned long, saved_lvtpc);
30
31
32static int nmi_enabled = 0;
33
34static int profile_exceptions_notify(struct notifier_block *self,
35 unsigned long val, void *data)
36{
37 struct die_args *args = (struct die_args *)data;
38 int ret = NOTIFY_DONE;
39 int cpu = smp_processor_id();
40
41 switch (val) {
42 case DIE_NMI:
43 case DIE_NMI_IPI:
44 model->check_ctrs(args->regs, &per_cpu(cpu_msrs, cpu));
45 ret = NOTIFY_STOP;
46 break;
47 default:
48 break;
49 }
50 return ret;
51}
52
53static void nmi_cpu_save_registers(struct op_msrs *msrs)
54{
55 unsigned int const nr_ctrs = model->num_counters;
56 unsigned int const nr_ctrls = model->num_controls;
57 struct op_msr *counters = msrs->counters;
58 struct op_msr *controls = msrs->controls;
59 unsigned int i;
60
61 for (i = 0; i < nr_ctrs; ++i) {
62 if (counters[i].addr) {
63 rdmsr(counters[i].addr,
64 counters[i].saved.low,
65 counters[i].saved.high);
66 }
67 }
68
69 for (i = 0; i < nr_ctrls; ++i) {
70 if (controls[i].addr) {
71 rdmsr(controls[i].addr,
72 controls[i].saved.low,
73 controls[i].saved.high);
74 }
75 }
76}
77
78static void nmi_save_registers(void *dummy)
79{
80 int cpu = smp_processor_id();
81 struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
82 nmi_cpu_save_registers(msrs);
83}
84
85static void free_msrs(void)
86{
87 int i;
88 for_each_possible_cpu(i) {
89 kfree(per_cpu(cpu_msrs, i).counters);
90 per_cpu(cpu_msrs, i).counters = NULL;
91 kfree(per_cpu(cpu_msrs, i).controls);
92 per_cpu(cpu_msrs, i).controls = NULL;
93 }
94}
95
96static int allocate_msrs(void)
97{
98 int success = 1;
99 size_t controls_size = sizeof(struct op_msr) * model->num_controls;
100 size_t counters_size = sizeof(struct op_msr) * model->num_counters;
101
102 int i;
103 for_each_possible_cpu(i) {
104 per_cpu(cpu_msrs, i).counters = kmalloc(counters_size,
105 GFP_KERNEL);
106 if (!per_cpu(cpu_msrs, i).counters) {
107 success = 0;
108 break;
109 }
110 per_cpu(cpu_msrs, i).controls = kmalloc(controls_size,
111 GFP_KERNEL);
112 if (!per_cpu(cpu_msrs, i).controls) {
113 success = 0;
114 break;
115 }
116 }
117
118 if (!success)
119 free_msrs();
120
121 return success;
122}
123
124static void nmi_cpu_setup(void *dummy)
125{
126 int cpu = smp_processor_id();
127 struct op_msrs *msrs = &per_cpu(cpu_msrs, cpu);
128 spin_lock(&oprofilefs_lock);
129 model->setup_ctrs(msrs);
130 spin_unlock(&oprofilefs_lock);
131 per_cpu(saved_lvtpc, cpu) = apic_read(APIC_LVTPC);
132 apic_write(APIC_LVTPC, APIC_DM_NMI);
133}
134
135static struct notifier_block profile_exceptions_nb = {
136 .notifier_call = profile_exceptions_notify,
137 .next = NULL,
138 .priority = 2
139};
140
141static int nmi_setup(void)
142{
143 int err = 0;
144 int cpu;
145
146 if (!allocate_msrs())
147 return -ENOMEM;
148
149 err = register_die_notifier(&profile_exceptions_nb);
150 if (err) {
151 free_msrs();
152 return err;
153 }
154
155
156
157
158
159
160 model->fill_in_addresses(&per_cpu(cpu_msrs, 0));
161 for_each_possible_cpu(cpu) {
162 if (cpu != 0) {
163 memcpy(per_cpu(cpu_msrs, cpu).counters,
164 per_cpu(cpu_msrs, 0).counters,
165 sizeof(struct op_msr) * model->num_counters);
166
167 memcpy(per_cpu(cpu_msrs, cpu).controls,
168 per_cpu(cpu_msrs, 0).controls,
169 sizeof(struct op_msr) * model->num_controls);
170 }
171
172 }
173 on_each_cpu(nmi_save_registers, NULL, 1);
174 on_each_cpu(nmi_cpu_setup, NULL, 1);
175 nmi_enabled = 1;
176 return 0;
177}
178
179static void nmi_restore_registers(struct op_msrs *msrs)
180{
181 unsigned int const nr_ctrs = model->num_counters;
182 unsigned int const nr_ctrls = model->num_controls;
183 struct op_msr *counters = msrs->counters;
184 struct op_msr *controls = msrs->controls;
185 unsigned int i;
186
187 for (i = 0; i < nr_ctrls; ++i) {
188 if (controls[i].addr) {
189 wrmsr(controls[i].addr,
190 controls[i].saved.low,
191 controls[i].saved.high);
192 }
193 }
194
195 for (i = 0; i < nr_ctrs; ++i) {
196 if (counters[i].addr) {
197 wrmsr(counters[i].addr,
198 counters[i].saved.low,
199 counters[i].saved.high);
200 }
201 }
202}
203
204static void nmi_cpu_shutdown(void *dummy)
205{
206 unsigned int v;
207 int cpu = smp_processor_id();
208 struct op_msrs *msrs = &__get_cpu_var(cpu_msrs);
209
210
211
212
213
214
215 v = apic_read(APIC_LVTERR);
216 apic_write(APIC_LVTERR, v | APIC_LVT_MASKED);
217 apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu));
218 apic_write(APIC_LVTERR, v);
219 nmi_restore_registers(msrs);
220}
221
222static void nmi_shutdown(void)
223{
224 struct op_msrs *msrs;
225
226 nmi_enabled = 0;
227 on_each_cpu(nmi_cpu_shutdown, NULL, 1);
228 unregister_die_notifier(&profile_exceptions_nb);
229 msrs = &get_cpu_var(cpu_msrs);
230 model->shutdown(msrs);
231 free_msrs();
232 put_cpu_var(cpu_msrs);
233}
234
235static void nmi_cpu_start(void *dummy)
236{
237 struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
238 model->start(msrs);
239}
240
241static int nmi_start(void)
242{
243 on_each_cpu(nmi_cpu_start, NULL, 1);
244 return 0;
245}
246
247static void nmi_cpu_stop(void *dummy)
248{
249 struct op_msrs const *msrs = &__get_cpu_var(cpu_msrs);
250 model->stop(msrs);
251}
252
253static void nmi_stop(void)
254{
255 on_each_cpu(nmi_cpu_stop, NULL, 1);
256}
257
258struct op_counter_config counter_config[OP_MAX_COUNTER];
259
260static int nmi_create_files(struct super_block *sb, struct dentry *root)
261{
262 unsigned int i;
263
264 for (i = 0; i < model->num_counters; ++i) {
265 struct dentry *dir;
266 char buf[4];
267
268
269
270
271
272
273 if (unlikely(!avail_to_resrv_perfctr_nmi_bit(i)))
274 continue;
275
276 snprintf(buf, sizeof(buf), "%d", i);
277 dir = oprofilefs_mkdir(sb, root, buf);
278 oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled);
279 oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event);
280 oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count);
281 oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask);
282 oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel);
283 oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user);
284 }
285
286 return 0;
287}
288
289#ifdef CONFIG_SMP
290static int oprofile_cpu_notifier(struct notifier_block *b, unsigned long action,
291 void *data)
292{
293 int cpu = (unsigned long)data;
294 switch (action) {
295 case CPU_DOWN_FAILED:
296 case CPU_ONLINE:
297 smp_call_function_single(cpu, nmi_cpu_start, NULL, 0);
298 break;
299 case CPU_DOWN_PREPARE:
300 smp_call_function_single(cpu, nmi_cpu_stop, NULL, 1);
301 break;
302 }
303 return NOTIFY_DONE;
304}
305
306static struct notifier_block oprofile_cpu_nb = {
307 .notifier_call = oprofile_cpu_notifier
308};
309#endif
310
311#ifdef CONFIG_PM
312
313static int nmi_suspend(struct sys_device *dev, pm_message_t state)
314{
315
316 if (nmi_enabled == 1)
317 nmi_cpu_stop(NULL);
318 return 0;
319}
320
321static int nmi_resume(struct sys_device *dev)
322{
323 if (nmi_enabled == 1)
324 nmi_cpu_start(NULL);
325 return 0;
326}
327
328static struct sysdev_class oprofile_sysclass = {
329 .name = "oprofile",
330 .resume = nmi_resume,
331 .suspend = nmi_suspend,
332};
333
334static struct sys_device device_oprofile = {
335 .id = 0,
336 .cls = &oprofile_sysclass,
337};
338
339static int __init init_sysfs(void)
340{
341 int error;
342
343 error = sysdev_class_register(&oprofile_sysclass);
344 if (!error)
345 error = sysdev_register(&device_oprofile);
346 return error;
347}
348
349static void exit_sysfs(void)
350{
351 sysdev_unregister(&device_oprofile);
352 sysdev_class_unregister(&oprofile_sysclass);
353}
354
355#else
356#define init_sysfs() do { } while (0)
357#define exit_sysfs() do { } while (0)
358#endif
359
360static int __init p4_init(char **cpu_type)
361{
362 __u8 cpu_model = boot_cpu_data.x86_model;
363
364 if (cpu_model > 6 || cpu_model == 5)
365 return 0;
366
367#ifndef CONFIG_SMP
368 *cpu_type = "i386/p4";
369 model = &op_p4_spec;
370 return 1;
371#else
372 switch (smp_num_siblings) {
373 case 1:
374 *cpu_type = "i386/p4";
375 model = &op_p4_spec;
376 return 1;
377
378 case 2:
379 *cpu_type = "i386/p4-ht";
380 model = &op_p4_ht2_spec;
381 return 1;
382 }
383#endif
384
385 printk(KERN_INFO "oprofile: P4 HyperThreading detected with > 2 threads\n");
386 printk(KERN_INFO "oprofile: Reverting to timer mode.\n");
387 return 0;
388}
389
390static int force_arch_perfmon;
391static int force_cpu_type(const char *str, struct kernel_param *kp)
392{
393 if (!strcmp(str, "arch_perfmon")) {
394 force_arch_perfmon = 1;
395 printk(KERN_INFO "oprofile: forcing architectural perfmon\n");
396 }
397
398 return 0;
399}
400module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0);
401
402static int __init ppro_init(char **cpu_type)
403{
404 __u8 cpu_model = boot_cpu_data.x86_model;
405
406 if (force_arch_perfmon && cpu_has_arch_perfmon)
407 return 0;
408
409 switch (cpu_model) {
410 case 0 ... 2:
411 *cpu_type = "i386/ppro";
412 break;
413 case 3 ... 5:
414 *cpu_type = "i386/pii";
415 break;
416 case 6 ... 8:
417 case 10 ... 11:
418 *cpu_type = "i386/piii";
419 break;
420 case 9:
421 case 13:
422 *cpu_type = "i386/p6_mobile";
423 break;
424 case 14:
425 *cpu_type = "i386/core";
426 break;
427 case 15: case 23:
428 *cpu_type = "i386/core_2";
429 break;
430 case 26:
431 arch_perfmon_setup_counters();
432 *cpu_type = "i386/core_i7";
433 break;
434 case 28:
435 *cpu_type = "i386/atom";
436 break;
437 default:
438
439 return 0;
440 }
441
442 model = &op_ppro_spec;
443 return 1;
444}
445
446static int __init arch_perfmon_init(char **cpu_type)
447{
448 if (!cpu_has_arch_perfmon)
449 return 0;
450 *cpu_type = "i386/arch_perfmon";
451 model = &op_arch_perfmon_spec;
452 arch_perfmon_setup_counters();
453 return 1;
454}
455
456
457static int using_nmi;
458
459int __init op_nmi_init(struct oprofile_operations *ops)
460{
461 __u8 vendor = boot_cpu_data.x86_vendor;
462 __u8 family = boot_cpu_data.x86;
463 char *cpu_type = NULL;
464 int ret = 0;
465
466 if (!cpu_has_apic)
467 return -ENODEV;
468
469 switch (vendor) {
470 case X86_VENDOR_AMD:
471
472
473 switch (family) {
474 default:
475 return -ENODEV;
476 case 6:
477 model = &op_amd_spec;
478 cpu_type = "i386/athlon";
479 break;
480 case 0xf:
481 model = &op_amd_spec;
482
483
484 cpu_type = "x86-64/hammer";
485 break;
486 case 0x10:
487 model = &op_amd_spec;
488 cpu_type = "x86-64/family10";
489 break;
490 case 0x11:
491 model = &op_amd_spec;
492 cpu_type = "x86-64/family11h";
493 break;
494 }
495 break;
496
497 case X86_VENDOR_INTEL:
498 switch (family) {
499
500 case 0xf:
501 p4_init(&cpu_type);
502 break;
503
504
505 case 6:
506 ppro_init(&cpu_type);
507 break;
508
509 default:
510 break;
511 }
512
513 if (!cpu_type && !arch_perfmon_init(&cpu_type))
514 return -ENODEV;
515 break;
516
517 default:
518 return -ENODEV;
519 }
520
521#ifdef CONFIG_SMP
522 register_cpu_notifier(&oprofile_cpu_nb);
523#endif
524
525 ops->create_files = nmi_create_files;
526 ops->setup = nmi_setup;
527 ops->shutdown = nmi_shutdown;
528 ops->start = nmi_start;
529 ops->stop = nmi_stop;
530 ops->cpu_type = cpu_type;
531
532 if (model->init)
533 ret = model->init(ops);
534 if (ret)
535 return ret;
536
537 init_sysfs();
538 using_nmi = 1;
539 printk(KERN_INFO "oprofile: using NMI interrupt.\n");
540 return 0;
541}
542
543void op_nmi_exit(void)
544{
545 if (using_nmi) {
546 exit_sysfs();
547#ifdef CONFIG_SMP
548 unregister_cpu_notifier(&oprofile_cpu_nb);
549#endif
550 }
551 if (model->exit)
552 model->exit();
553}
554
