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6
7#include <linux/crypto.h>
8#include <linux/sched.h>
9#include <linux/stddef.h>
10#include <linux/errno.h>
11#include <linux/hardirq.h>
12#include <linux/suspend.h>
13#include <linux/kbuild.h>
14#include <asm/processor.h>
15#include <asm/segment.h>
16#include <asm/thread_info.h>
17#include <asm/ia32.h>
18#include <asm/bootparam.h>
19#include <asm/suspend.h>
20
21#include <xen/interface/xen.h>
22
23#include <asm/sigframe.h>
24
25#define __NO_STUBS 1
26#undef __SYSCALL
27#undef _ASM_X86_UNISTD_64_H
28#define __SYSCALL(nr, sym) [nr] = 1,
29static char syscalls[] = {
30#include <asm/unistd.h>
31};
32
33int main(void)
34{
35#define ENTRY(entry) DEFINE(tsk_ ## entry, offsetof(struct task_struct, entry))
36 ENTRY(state);
37 ENTRY(flags);
38 ENTRY(pid);
39 BLANK();
40#undef ENTRY
41#define ENTRY(entry) DEFINE(TI_ ## entry, offsetof(struct thread_info, entry))
42 ENTRY(flags);
43 ENTRY(addr_limit);
44 ENTRY(preempt_count);
45 ENTRY(status);
46#ifdef CONFIG_IA32_EMULATION
47 ENTRY(sysenter_return);
48#endif
49 BLANK();
50#undef ENTRY
51#ifdef CONFIG_PARAVIRT
52 BLANK();
53 OFFSET(PARAVIRT_enabled, pv_info, paravirt_enabled);
54 OFFSET(PARAVIRT_PATCH_pv_cpu_ops, paravirt_patch_template, pv_cpu_ops);
55 OFFSET(PARAVIRT_PATCH_pv_irq_ops, paravirt_patch_template, pv_irq_ops);
56 OFFSET(PV_IRQ_irq_disable, pv_irq_ops, irq_disable);
57 OFFSET(PV_IRQ_irq_enable, pv_irq_ops, irq_enable);
58 OFFSET(PV_IRQ_adjust_exception_frame, pv_irq_ops, adjust_exception_frame);
59 OFFSET(PV_CPU_iret, pv_cpu_ops, iret);
60 OFFSET(PV_CPU_usergs_sysret32, pv_cpu_ops, usergs_sysret32);
61 OFFSET(PV_CPU_usergs_sysret64, pv_cpu_ops, usergs_sysret64);
62 OFFSET(PV_CPU_irq_enable_sysexit, pv_cpu_ops, irq_enable_sysexit);
63 OFFSET(PV_CPU_swapgs, pv_cpu_ops, swapgs);
64 OFFSET(PV_MMU_read_cr2, pv_mmu_ops, read_cr2);
65#endif
66
67
68#ifdef CONFIG_IA32_EMULATION
69#define ENTRY(entry) DEFINE(IA32_SIGCONTEXT_ ## entry, offsetof(struct sigcontext_ia32, entry))
70 ENTRY(ax);
71 ENTRY(bx);
72 ENTRY(cx);
73 ENTRY(dx);
74 ENTRY(si);
75 ENTRY(di);
76 ENTRY(bp);
77 ENTRY(sp);
78 ENTRY(ip);
79 BLANK();
80#undef ENTRY
81 DEFINE(IA32_RT_SIGFRAME_sigcontext,
82 offsetof (struct rt_sigframe_ia32, uc.uc_mcontext));
83 BLANK();
84#endif
85 DEFINE(pbe_address, offsetof(struct pbe, address));
86 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
87 DEFINE(pbe_next, offsetof(struct pbe, next));
88 BLANK();
89#define ENTRY(entry) DEFINE(pt_regs_ ## entry, offsetof(struct pt_regs, entry))
90 ENTRY(bx);
91 ENTRY(bx);
92 ENTRY(cx);
93 ENTRY(dx);
94 ENTRY(sp);
95 ENTRY(bp);
96 ENTRY(si);
97 ENTRY(di);
98 ENTRY(r8);
99 ENTRY(r9);
100 ENTRY(r10);
101 ENTRY(r11);
102 ENTRY(r12);
103 ENTRY(r13);
104 ENTRY(r14);
105 ENTRY(r15);
106 ENTRY(flags);
107 BLANK();
108#undef ENTRY
109#define ENTRY(entry) DEFINE(saved_context_ ## entry, offsetof(struct saved_context, entry))
110 ENTRY(cr0);
111 ENTRY(cr2);
112 ENTRY(cr3);
113 ENTRY(cr4);
114 ENTRY(cr8);
115 BLANK();
116#undef ENTRY
117 DEFINE(TSS_ist, offsetof(struct tss_struct, x86_tss.ist));
118 BLANK();
119 DEFINE(crypto_tfm_ctx_offset, offsetof(struct crypto_tfm, __crt_ctx));
120 BLANK();
121 DEFINE(__NR_syscall_max, sizeof(syscalls) - 1);
122
123 BLANK();
124 OFFSET(BP_scratch, boot_params, scratch);
125 OFFSET(BP_loadflags, boot_params, hdr.loadflags);
126 OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
127 OFFSET(BP_version, boot_params, hdr.version);
128 OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
129
130 BLANK();
131 DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
132#ifdef CONFIG_XEN
133 BLANK();
134 OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
135 OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
136#undef ENTRY
137#endif
138 return 0;
139}
140
