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28#if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
29#define SUPPORT_SYSRQ
30#endif
31
32#include <linux/module.h>
33#include <linux/ioport.h>
34#include <linux/init.h>
35#include <linux/console.h>
36#include <linux/sysrq.h>
37#include <linux/serial_reg.h>
38#include <linux/circ_buf.h>
39#include <linux/delay.h>
40#include <linux/interrupt.h>
41#include <linux/platform_device.h>
42#include <linux/tty.h>
43#include <linux/tty_flip.h>
44#include <linux/serial_core.h>
45#include <linux/clk.h>
46#include <linux/io.h>
47
48struct uart_pxa_port {
49 struct uart_port port;
50 unsigned char ier;
51 unsigned char lcr;
52 unsigned char mcr;
53 unsigned int lsr_break_flag;
54 struct clk *clk;
55 char *name;
56};
57
58static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
59{
60 offset <<= 2;
61 return readl(up->port.membase + offset);
62}
63
64static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
65{
66 offset <<= 2;
67 writel(value, up->port.membase + offset);
68}
69
70static void serial_pxa_enable_ms(struct uart_port *port)
71{
72 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
73
74 up->ier |= UART_IER_MSI;
75 serial_out(up, UART_IER, up->ier);
76}
77
78static void serial_pxa_stop_tx(struct uart_port *port)
79{
80 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
81
82 if (up->ier & UART_IER_THRI) {
83 up->ier &= ~UART_IER_THRI;
84 serial_out(up, UART_IER, up->ier);
85 }
86}
87
88static void serial_pxa_stop_rx(struct uart_port *port)
89{
90 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
91
92 up->ier &= ~UART_IER_RLSI;
93 up->port.read_status_mask &= ~UART_LSR_DR;
94 serial_out(up, UART_IER, up->ier);
95}
96
97static inline void receive_chars(struct uart_pxa_port *up, int *status)
98{
99 struct tty_struct *tty = up->port.info->port.tty;
100 unsigned int ch, flag;
101 int max_count = 256;
102
103 do {
104 ch = serial_in(up, UART_RX);
105 flag = TTY_NORMAL;
106 up->port.icount.rx++;
107
108 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
109 UART_LSR_FE | UART_LSR_OE))) {
110
111
112
113 if (*status & UART_LSR_BI) {
114 *status &= ~(UART_LSR_FE | UART_LSR_PE);
115 up->port.icount.brk++;
116
117
118
119
120
121
122 if (uart_handle_break(&up->port))
123 goto ignore_char;
124 } else if (*status & UART_LSR_PE)
125 up->port.icount.parity++;
126 else if (*status & UART_LSR_FE)
127 up->port.icount.frame++;
128 if (*status & UART_LSR_OE)
129 up->port.icount.overrun++;
130
131
132
133
134 *status &= up->port.read_status_mask;
135
136#ifdef CONFIG_SERIAL_PXA_CONSOLE
137 if (up->port.line == up->port.cons->index) {
138
139 *status |= up->lsr_break_flag;
140 up->lsr_break_flag = 0;
141 }
142#endif
143 if (*status & UART_LSR_BI) {
144 flag = TTY_BREAK;
145 } else if (*status & UART_LSR_PE)
146 flag = TTY_PARITY;
147 else if (*status & UART_LSR_FE)
148 flag = TTY_FRAME;
149 }
150
151 if (uart_handle_sysrq_char(&up->port, ch))
152 goto ignore_char;
153
154 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
155
156 ignore_char:
157 *status = serial_in(up, UART_LSR);
158 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
159 tty_flip_buffer_push(tty);
160}
161
162static void transmit_chars(struct uart_pxa_port *up)
163{
164 struct circ_buf *xmit = &up->port.info->xmit;
165 int count;
166
167 if (up->port.x_char) {
168 serial_out(up, UART_TX, up->port.x_char);
169 up->port.icount.tx++;
170 up->port.x_char = 0;
171 return;
172 }
173 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
174 serial_pxa_stop_tx(&up->port);
175 return;
176 }
177
178 count = up->port.fifosize / 2;
179 do {
180 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
181 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
182 up->port.icount.tx++;
183 if (uart_circ_empty(xmit))
184 break;
185 } while (--count > 0);
186
187 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
188 uart_write_wakeup(&up->port);
189
190
191 if (uart_circ_empty(xmit))
192 serial_pxa_stop_tx(&up->port);
193}
194
195static void serial_pxa_start_tx(struct uart_port *port)
196{
197 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
198
199 if (!(up->ier & UART_IER_THRI)) {
200 up->ier |= UART_IER_THRI;
201 serial_out(up, UART_IER, up->ier);
202 }
203}
204
205static inline void check_modem_status(struct uart_pxa_port *up)
206{
207 int status;
208
209 status = serial_in(up, UART_MSR);
210
211 if ((status & UART_MSR_ANY_DELTA) == 0)
212 return;
213
214 if (status & UART_MSR_TERI)
215 up->port.icount.rng++;
216 if (status & UART_MSR_DDSR)
217 up->port.icount.dsr++;
218 if (status & UART_MSR_DDCD)
219 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
220 if (status & UART_MSR_DCTS)
221 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
222
223 wake_up_interruptible(&up->port.info->delta_msr_wait);
224}
225
226
227
228
229static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
230{
231 struct uart_pxa_port *up = dev_id;
232 unsigned int iir, lsr;
233
234 iir = serial_in(up, UART_IIR);
235 if (iir & UART_IIR_NO_INT)
236 return IRQ_NONE;
237 lsr = serial_in(up, UART_LSR);
238 if (lsr & UART_LSR_DR)
239 receive_chars(up, &lsr);
240 check_modem_status(up);
241 if (lsr & UART_LSR_THRE)
242 transmit_chars(up);
243 return IRQ_HANDLED;
244}
245
246static unsigned int serial_pxa_tx_empty(struct uart_port *port)
247{
248 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
249 unsigned long flags;
250 unsigned int ret;
251
252 spin_lock_irqsave(&up->port.lock, flags);
253 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
254 spin_unlock_irqrestore(&up->port.lock, flags);
255
256 return ret;
257}
258
259static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
260{
261 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
262 unsigned char status;
263 unsigned int ret;
264
265 status = serial_in(up, UART_MSR);
266
267 ret = 0;
268 if (status & UART_MSR_DCD)
269 ret |= TIOCM_CAR;
270 if (status & UART_MSR_RI)
271 ret |= TIOCM_RNG;
272 if (status & UART_MSR_DSR)
273 ret |= TIOCM_DSR;
274 if (status & UART_MSR_CTS)
275 ret |= TIOCM_CTS;
276 return ret;
277}
278
279static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
280{
281 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
282 unsigned char mcr = 0;
283
284 if (mctrl & TIOCM_RTS)
285 mcr |= UART_MCR_RTS;
286 if (mctrl & TIOCM_DTR)
287 mcr |= UART_MCR_DTR;
288 if (mctrl & TIOCM_OUT1)
289 mcr |= UART_MCR_OUT1;
290 if (mctrl & TIOCM_OUT2)
291 mcr |= UART_MCR_OUT2;
292 if (mctrl & TIOCM_LOOP)
293 mcr |= UART_MCR_LOOP;
294
295 mcr |= up->mcr;
296
297 serial_out(up, UART_MCR, mcr);
298}
299
300static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
301{
302 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
303 unsigned long flags;
304
305 spin_lock_irqsave(&up->port.lock, flags);
306 if (break_state == -1)
307 up->lcr |= UART_LCR_SBC;
308 else
309 up->lcr &= ~UART_LCR_SBC;
310 serial_out(up, UART_LCR, up->lcr);
311 spin_unlock_irqrestore(&up->port.lock, flags);
312}
313
314#if 0
315static void serial_pxa_dma_init(struct pxa_uart *up)
316{
317 up->rxdma =
318 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
319 if (up->rxdma < 0)
320 goto out;
321 up->txdma =
322 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
323 if (up->txdma < 0)
324 goto err_txdma;
325 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
326 if (!up->dmadesc)
327 goto err_alloc;
328
329
330err_alloc:
331 pxa_free_dma(up->txdma);
332err_rxdma:
333 pxa_free_dma(up->rxdma);
334out:
335 return;
336}
337#endif
338
339static int serial_pxa_startup(struct uart_port *port)
340{
341 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
342 unsigned long flags;
343 int retval;
344
345 if (port->line == 3)
346 up->mcr |= UART_MCR_AFE;
347 else
348 up->mcr = 0;
349
350 up->port.uartclk = clk_get_rate(up->clk);
351
352
353
354
355 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
356 if (retval)
357 return retval;
358
359
360
361
362
363 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
364 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
365 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
366 serial_out(up, UART_FCR, 0);
367
368
369
370
371 (void) serial_in(up, UART_LSR);
372 (void) serial_in(up, UART_RX);
373 (void) serial_in(up, UART_IIR);
374 (void) serial_in(up, UART_MSR);
375
376
377
378
379 serial_out(up, UART_LCR, UART_LCR_WLEN8);
380
381 spin_lock_irqsave(&up->port.lock, flags);
382 up->port.mctrl |= TIOCM_OUT2;
383 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
384 spin_unlock_irqrestore(&up->port.lock, flags);
385
386
387
388
389
390
391 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
392 serial_out(up, UART_IER, up->ier);
393
394
395
396
397 (void) serial_in(up, UART_LSR);
398 (void) serial_in(up, UART_RX);
399 (void) serial_in(up, UART_IIR);
400 (void) serial_in(up, UART_MSR);
401
402 return 0;
403}
404
405static void serial_pxa_shutdown(struct uart_port *port)
406{
407 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
408 unsigned long flags;
409
410 free_irq(up->port.irq, up);
411
412
413
414
415 up->ier = 0;
416 serial_out(up, UART_IER, 0);
417
418 spin_lock_irqsave(&up->port.lock, flags);
419 up->port.mctrl &= ~TIOCM_OUT2;
420 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
421 spin_unlock_irqrestore(&up->port.lock, flags);
422
423
424
425
426 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
427 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
428 UART_FCR_CLEAR_RCVR |
429 UART_FCR_CLEAR_XMIT);
430 serial_out(up, UART_FCR, 0);
431}
432
433static void
434serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
435 struct ktermios *old)
436{
437 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
438 unsigned char cval, fcr = 0;
439 unsigned long flags;
440 unsigned int baud, quot;
441
442 switch (termios->c_cflag & CSIZE) {
443 case CS5:
444 cval = UART_LCR_WLEN5;
445 break;
446 case CS6:
447 cval = UART_LCR_WLEN6;
448 break;
449 case CS7:
450 cval = UART_LCR_WLEN7;
451 break;
452 default:
453 case CS8:
454 cval = UART_LCR_WLEN8;
455 break;
456 }
457
458 if (termios->c_cflag & CSTOPB)
459 cval |= UART_LCR_STOP;
460 if (termios->c_cflag & PARENB)
461 cval |= UART_LCR_PARITY;
462 if (!(termios->c_cflag & PARODD))
463 cval |= UART_LCR_EPAR;
464
465
466
467
468 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
469 quot = uart_get_divisor(port, baud);
470
471 if ((up->port.uartclk / quot) < (2400 * 16))
472 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
473 else if ((up->port.uartclk / quot) < (230400 * 16))
474 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
475 else
476 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
477
478
479
480
481
482 spin_lock_irqsave(&up->port.lock, flags);
483
484
485
486
487
488 up->ier |= UART_IER_UUE;
489
490
491
492
493 uart_update_timeout(port, termios->c_cflag, baud);
494
495 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
496 if (termios->c_iflag & INPCK)
497 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
498 if (termios->c_iflag & (BRKINT | PARMRK))
499 up->port.read_status_mask |= UART_LSR_BI;
500
501
502
503
504 up->port.ignore_status_mask = 0;
505 if (termios->c_iflag & IGNPAR)
506 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
507 if (termios->c_iflag & IGNBRK) {
508 up->port.ignore_status_mask |= UART_LSR_BI;
509
510
511
512
513 if (termios->c_iflag & IGNPAR)
514 up->port.ignore_status_mask |= UART_LSR_OE;
515 }
516
517
518
519
520 if ((termios->c_cflag & CREAD) == 0)
521 up->port.ignore_status_mask |= UART_LSR_DR;
522
523
524
525
526 up->ier &= ~UART_IER_MSI;
527 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
528 up->ier |= UART_IER_MSI;
529
530 serial_out(up, UART_IER, up->ier);
531
532 if (termios->c_cflag & CRTSCTS)
533 up->mcr |= UART_MCR_AFE;
534 else
535 up->mcr &= ~UART_MCR_AFE;
536
537 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);
538 serial_out(up, UART_DLL, quot & 0xff);
539 serial_out(up, UART_DLM, quot >> 8);
540 serial_out(up, UART_LCR, cval);
541 up->lcr = cval;
542 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
543 serial_out(up, UART_FCR, fcr);
544 spin_unlock_irqrestore(&up->port.lock, flags);
545}
546
547static void
548serial_pxa_pm(struct uart_port *port, unsigned int state,
549 unsigned int oldstate)
550{
551 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
552
553 if (!state)
554 clk_enable(up->clk);
555 else
556 clk_disable(up->clk);
557}
558
559static void serial_pxa_release_port(struct uart_port *port)
560{
561}
562
563static int serial_pxa_request_port(struct uart_port *port)
564{
565 return 0;
566}
567
568static void serial_pxa_config_port(struct uart_port *port, int flags)
569{
570 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
571 up->port.type = PORT_PXA;
572}
573
574static int
575serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
576{
577
578 return -EINVAL;
579}
580
581static const char *
582serial_pxa_type(struct uart_port *port)
583{
584 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
585 return up->name;
586}
587
588static struct uart_pxa_port *serial_pxa_ports[4];
589static struct uart_driver serial_pxa_reg;
590
591#ifdef CONFIG_SERIAL_PXA_CONSOLE
592
593#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
594
595
596
597
598static inline void wait_for_xmitr(struct uart_pxa_port *up)
599{
600 unsigned int status, tmout = 10000;
601
602
603 do {
604 status = serial_in(up, UART_LSR);
605
606 if (status & UART_LSR_BI)
607 up->lsr_break_flag = UART_LSR_BI;
608
609 if (--tmout == 0)
610 break;
611 udelay(1);
612 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
613
614
615 if (up->port.flags & UPF_CONS_FLOW) {
616 tmout = 1000000;
617 while (--tmout &&
618 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
619 udelay(1);
620 }
621}
622
623static void serial_pxa_console_putchar(struct uart_port *port, int ch)
624{
625 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
626
627 wait_for_xmitr(up);
628 serial_out(up, UART_TX, ch);
629}
630
631
632
633
634
635
636
637static void
638serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
639{
640 struct uart_pxa_port *up = serial_pxa_ports[co->index];
641 unsigned int ier;
642
643 clk_enable(up->clk);
644
645
646
647
648 ier = serial_in(up, UART_IER);
649 serial_out(up, UART_IER, UART_IER_UUE);
650
651 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
652
653
654
655
656
657 wait_for_xmitr(up);
658 serial_out(up, UART_IER, ier);
659
660 clk_disable(up->clk);
661}
662
663static int __init
664serial_pxa_console_setup(struct console *co, char *options)
665{
666 struct uart_pxa_port *up;
667 int baud = 9600;
668 int bits = 8;
669 int parity = 'n';
670 int flow = 'n';
671
672 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
673 co->index = 0;
674 up = serial_pxa_ports[co->index];
675 if (!up)
676 return -ENODEV;
677
678 if (options)
679 uart_parse_options(options, &baud, &parity, &bits, &flow);
680
681 return uart_set_options(&up->port, co, baud, parity, bits, flow);
682}
683
684static struct console serial_pxa_console = {
685 .name = "ttyS",
686 .write = serial_pxa_console_write,
687 .device = uart_console_device,
688 .setup = serial_pxa_console_setup,
689 .flags = CON_PRINTBUFFER,
690 .index = -1,
691 .data = &serial_pxa_reg,
692};
693
694#define PXA_CONSOLE &serial_pxa_console
695#else
696#define PXA_CONSOLE NULL
697#endif
698
699struct uart_ops serial_pxa_pops = {
700 .tx_empty = serial_pxa_tx_empty,
701 .set_mctrl = serial_pxa_set_mctrl,
702 .get_mctrl = serial_pxa_get_mctrl,
703 .stop_tx = serial_pxa_stop_tx,
704 .start_tx = serial_pxa_start_tx,
705 .stop_rx = serial_pxa_stop_rx,
706 .enable_ms = serial_pxa_enable_ms,
707 .break_ctl = serial_pxa_break_ctl,
708 .startup = serial_pxa_startup,
709 .shutdown = serial_pxa_shutdown,
710 .set_termios = serial_pxa_set_termios,
711 .pm = serial_pxa_pm,
712 .type = serial_pxa_type,
713 .release_port = serial_pxa_release_port,
714 .request_port = serial_pxa_request_port,
715 .config_port = serial_pxa_config_port,
716 .verify_port = serial_pxa_verify_port,
717};
718
719static struct uart_driver serial_pxa_reg = {
720 .owner = THIS_MODULE,
721 .driver_name = "PXA serial",
722 .dev_name = "ttyS",
723 .major = TTY_MAJOR,
724 .minor = 64,
725 .nr = 4,
726 .cons = PXA_CONSOLE,
727};
728
729static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
730{
731 struct uart_pxa_port *sport = platform_get_drvdata(dev);
732
733 if (sport)
734 uart_suspend_port(&serial_pxa_reg, &sport->port);
735
736 return 0;
737}
738
739static int serial_pxa_resume(struct platform_device *dev)
740{
741 struct uart_pxa_port *sport = platform_get_drvdata(dev);
742
743 if (sport)
744 uart_resume_port(&serial_pxa_reg, &sport->port);
745
746 return 0;
747}
748
749static int serial_pxa_probe(struct platform_device *dev)
750{
751 struct uart_pxa_port *sport;
752 struct resource *mmres, *irqres;
753 int ret;
754
755 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
756 irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
757 if (!mmres || !irqres)
758 return -ENODEV;
759
760 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
761 if (!sport)
762 return -ENOMEM;
763
764 sport->clk = clk_get(&dev->dev, NULL);
765 if (IS_ERR(sport->clk)) {
766 ret = PTR_ERR(sport->clk);
767 goto err_free;
768 }
769
770 sport->port.type = PORT_PXA;
771 sport->port.iotype = UPIO_MEM;
772 sport->port.mapbase = mmres->start;
773 sport->port.irq = irqres->start;
774 sport->port.fifosize = 64;
775 sport->port.ops = &serial_pxa_pops;
776 sport->port.line = dev->id;
777 sport->port.dev = &dev->dev;
778 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
779 sport->port.uartclk = clk_get_rate(sport->clk);
780
781 switch (dev->id) {
782 case 0: sport->name = "FFUART"; break;
783 case 1: sport->name = "BTUART"; break;
784 case 2: sport->name = "STUART"; break;
785 case 3: sport->name = "HWUART"; break;
786 default:
787 sport->name = "???";
788 break;
789 }
790
791 sport->port.membase = ioremap(mmres->start, mmres->end - mmres->start + 1);
792 if (!sport->port.membase) {
793 ret = -ENOMEM;
794 goto err_clk;
795 }
796
797 serial_pxa_ports[dev->id] = sport;
798
799 uart_add_one_port(&serial_pxa_reg, &sport->port);
800 platform_set_drvdata(dev, sport);
801
802 return 0;
803
804 err_clk:
805 clk_put(sport->clk);
806 err_free:
807 kfree(sport);
808 return ret;
809}
810
811static int serial_pxa_remove(struct platform_device *dev)
812{
813 struct uart_pxa_port *sport = platform_get_drvdata(dev);
814
815 platform_set_drvdata(dev, NULL);
816
817 uart_remove_one_port(&serial_pxa_reg, &sport->port);
818 clk_put(sport->clk);
819 kfree(sport);
820
821 return 0;
822}
823
824static struct platform_driver serial_pxa_driver = {
825 .probe = serial_pxa_probe,
826 .remove = serial_pxa_remove,
827
828 .suspend = serial_pxa_suspend,
829 .resume = serial_pxa_resume,
830 .driver = {
831 .name = "pxa2xx-uart",
832 .owner = THIS_MODULE,
833 },
834};
835
836int __init serial_pxa_init(void)
837{
838 int ret;
839
840 ret = uart_register_driver(&serial_pxa_reg);
841 if (ret != 0)
842 return ret;
843
844 ret = platform_driver_register(&serial_pxa_driver);
845 if (ret != 0)
846 uart_unregister_driver(&serial_pxa_reg);
847
848 return ret;
849}
850
851void __exit serial_pxa_exit(void)
852{
853 platform_driver_unregister(&serial_pxa_driver);
854 uart_unregister_driver(&serial_pxa_reg);
855}
856
857module_init(serial_pxa_init);
858module_exit(serial_pxa_exit);
859
860MODULE_LICENSE("GPL");
861MODULE_ALIAS("platform:pxa2xx-uart");
862
