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29#ifndef __LINUX_ATA_H__
30#define __LINUX_ATA_H__
31
32#include <linux/types.h>
33#include <asm/byteorder.h>
34
35
36#define ATA_DMA_BOUNDARY 0xffffUL
37#define ATA_DMA_MASK 0xffffffffULL
38
39enum {
40
41 ATA_MAX_DEVICES = 2,
42 ATA_MAX_PRD = 256,
43 ATA_SECT_SIZE = 512,
44 ATA_MAX_SECTORS_128 = 128,
45 ATA_MAX_SECTORS = 256,
46 ATA_MAX_SECTORS_LBA48 = 65535,
47 ATA_MAX_SECTORS_TAPE = 65535,
48
49 ATA_ID_WORDS = 256,
50 ATA_ID_CONFIG = 0,
51 ATA_ID_CYLS = 1,
52 ATA_ID_HEADS = 3,
53 ATA_ID_SECTORS = 6,
54 ATA_ID_SERNO = 10,
55 ATA_ID_BUF_SIZE = 21,
56 ATA_ID_FW_REV = 23,
57 ATA_ID_PROD = 27,
58 ATA_ID_MAX_MULTSECT = 47,
59 ATA_ID_DWORD_IO = 48,
60 ATA_ID_CAPABILITY = 49,
61 ATA_ID_OLD_PIO_MODES = 51,
62 ATA_ID_OLD_DMA_MODES = 52,
63 ATA_ID_FIELD_VALID = 53,
64 ATA_ID_CUR_CYLS = 54,
65 ATA_ID_CUR_HEADS = 55,
66 ATA_ID_CUR_SECTORS = 56,
67 ATA_ID_MULTSECT = 59,
68 ATA_ID_LBA_CAPACITY = 60,
69 ATA_ID_SWDMA_MODES = 62,
70 ATA_ID_MWDMA_MODES = 63,
71 ATA_ID_PIO_MODES = 64,
72 ATA_ID_EIDE_DMA_MIN = 65,
73 ATA_ID_EIDE_DMA_TIME = 66,
74 ATA_ID_EIDE_PIO = 67,
75 ATA_ID_EIDE_PIO_IORDY = 68,
76 ATA_ID_QUEUE_DEPTH = 75,
77 ATA_ID_MAJOR_VER = 80,
78 ATA_ID_COMMAND_SET_1 = 82,
79 ATA_ID_COMMAND_SET_2 = 83,
80 ATA_ID_CFSSE = 84,
81 ATA_ID_CFS_ENABLE_1 = 85,
82 ATA_ID_CFS_ENABLE_2 = 86,
83 ATA_ID_CSF_DEFAULT = 87,
84 ATA_ID_UDMA_MODES = 88,
85 ATA_ID_HW_CONFIG = 93,
86 ATA_ID_SPG = 98,
87 ATA_ID_LBA_CAPACITY_2 = 100,
88 ATA_ID_LAST_LUN = 126,
89 ATA_ID_DLF = 128,
90 ATA_ID_CSFO = 129,
91 ATA_ID_CFA_POWER = 160,
92 ATA_ID_CFA_KEY_MGMT = 162,
93 ATA_ID_CFA_MODES = 163,
94 ATA_ID_ROT_SPEED = 217,
95 ATA_ID_PIO4 = (1 << 1),
96
97 ATA_ID_SERNO_LEN = 20,
98 ATA_ID_FW_REV_LEN = 8,
99 ATA_ID_PROD_LEN = 40,
100
101 ATA_PCI_CTL_OFS = 2,
102
103 ATA_PIO0 = (1 << 0),
104 ATA_PIO1 = ATA_PIO0 | (1 << 1),
105 ATA_PIO2 = ATA_PIO1 | (1 << 2),
106 ATA_PIO3 = ATA_PIO2 | (1 << 3),
107 ATA_PIO4 = ATA_PIO3 | (1 << 4),
108 ATA_PIO5 = ATA_PIO4 | (1 << 5),
109 ATA_PIO6 = ATA_PIO5 | (1 << 6),
110
111 ATA_SWDMA0 = (1 << 0),
112 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
113 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
114
115 ATA_SWDMA2_ONLY = (1 << 2),
116
117 ATA_MWDMA0 = (1 << 0),
118 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
119 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
120
121 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
122 ATA_MWDMA2_ONLY = (1 << 2),
123
124 ATA_UDMA0 = (1 << 0),
125 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
126 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
127 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
128 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
129 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
130 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
131 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
132
133
134 ATA_UDMA_MASK_40C = ATA_UDMA2,
135
136
137 ATA_PRD_SZ = 8,
138 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
139 ATA_PRD_EOT = (1 << 31),
140
141 ATA_DMA_TABLE_OFS = 4,
142 ATA_DMA_STATUS = 2,
143 ATA_DMA_CMD = 0,
144 ATA_DMA_WR = (1 << 3),
145 ATA_DMA_START = (1 << 0),
146 ATA_DMA_INTR = (1 << 2),
147 ATA_DMA_ERR = (1 << 1),
148 ATA_DMA_ACTIVE = (1 << 0),
149
150
151 ATA_HOB = (1 << 7),
152 ATA_NIEN = (1 << 1),
153 ATA_LBA = (1 << 6),
154 ATA_DEV1 = (1 << 4),
155 ATA_DEVICE_OBS = (1 << 7) | (1 << 5),
156 ATA_DEVCTL_OBS = (1 << 3),
157 ATA_BUSY = (1 << 7),
158 ATA_DRDY = (1 << 6),
159 ATA_DF = (1 << 5),
160 ATA_DSC = (1 << 4),
161 ATA_DRQ = (1 << 3),
162 ATA_CORR = (1 << 2),
163 ATA_IDX = (1 << 1),
164 ATA_ERR = (1 << 0),
165 ATA_SRST = (1 << 2),
166 ATA_ICRC = (1 << 7),
167 ATA_BBK = ATA_ICRC,
168 ATA_UNC = (1 << 6),
169 ATA_MC = (1 << 5),
170 ATA_IDNF = (1 << 4),
171 ATA_MCR = (1 << 3),
172 ATA_ABORTED = (1 << 2),
173 ATA_TRK0NF = (1 << 1),
174 ATA_AMNF = (1 << 0),
175 ATAPI_LFS = 0xF0,
176 ATAPI_EOM = ATA_TRK0NF,
177 ATAPI_ILI = ATA_AMNF,
178 ATAPI_IO = (1 << 1),
179 ATAPI_COD = (1 << 0),
180
181
182 ATA_REG_DATA = 0x00,
183 ATA_REG_ERR = 0x01,
184 ATA_REG_NSECT = 0x02,
185 ATA_REG_LBAL = 0x03,
186 ATA_REG_LBAM = 0x04,
187 ATA_REG_LBAH = 0x05,
188 ATA_REG_DEVICE = 0x06,
189 ATA_REG_STATUS = 0x07,
190
191 ATA_REG_FEATURE = ATA_REG_ERR,
192 ATA_REG_CMD = ATA_REG_STATUS,
193 ATA_REG_BYTEL = ATA_REG_LBAM,
194 ATA_REG_BYTEH = ATA_REG_LBAH,
195 ATA_REG_DEVSEL = ATA_REG_DEVICE,
196 ATA_REG_IRQ = ATA_REG_NSECT,
197
198
199 ATA_CMD_DEV_RESET = 0x08,
200 ATA_CMD_CHK_POWER = 0xE5,
201 ATA_CMD_STANDBY = 0xE2,
202 ATA_CMD_IDLE = 0xE3,
203 ATA_CMD_EDD = 0x90,
204 ATA_CMD_FLUSH = 0xE7,
205 ATA_CMD_FLUSH_EXT = 0xEA,
206 ATA_CMD_ID_ATA = 0xEC,
207 ATA_CMD_ID_ATAPI = 0xA1,
208 ATA_CMD_READ = 0xC8,
209 ATA_CMD_READ_EXT = 0x25,
210 ATA_CMD_WRITE = 0xCA,
211 ATA_CMD_WRITE_EXT = 0x35,
212 ATA_CMD_WRITE_FUA_EXT = 0x3D,
213 ATA_CMD_FPDMA_READ = 0x60,
214 ATA_CMD_FPDMA_WRITE = 0x61,
215 ATA_CMD_PIO_READ = 0x20,
216 ATA_CMD_PIO_READ_EXT = 0x24,
217 ATA_CMD_PIO_WRITE = 0x30,
218 ATA_CMD_PIO_WRITE_EXT = 0x34,
219 ATA_CMD_READ_MULTI = 0xC4,
220 ATA_CMD_READ_MULTI_EXT = 0x29,
221 ATA_CMD_WRITE_MULTI = 0xC5,
222 ATA_CMD_WRITE_MULTI_EXT = 0x39,
223 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
224 ATA_CMD_SET_FEATURES = 0xEF,
225 ATA_CMD_SET_MULTI = 0xC6,
226 ATA_CMD_PACKET = 0xA0,
227 ATA_CMD_VERIFY = 0x40,
228 ATA_CMD_VERIFY_EXT = 0x42,
229 ATA_CMD_STANDBYNOW1 = 0xE0,
230 ATA_CMD_IDLEIMMEDIATE = 0xE1,
231 ATA_CMD_SLEEP = 0xE6,
232 ATA_CMD_INIT_DEV_PARAMS = 0x91,
233 ATA_CMD_READ_NATIVE_MAX = 0xF8,
234 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
235 ATA_CMD_SET_MAX = 0xF9,
236 ATA_CMD_SET_MAX_EXT = 0x37,
237 ATA_CMD_READ_LOG_EXT = 0x2f,
238 ATA_CMD_PMP_READ = 0xE4,
239 ATA_CMD_PMP_WRITE = 0xE8,
240 ATA_CMD_CONF_OVERLAY = 0xB1,
241 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
242 ATA_CMD_SMART = 0xB0,
243 ATA_CMD_MEDIA_LOCK = 0xDE,
244 ATA_CMD_MEDIA_UNLOCK = 0xDF,
245
246 ATA_CMD_RESTORE = 0x10,
247
248 ATA_EXABYTE_ENABLE_NEST = 0xF0,
249
250
251 ATA_LOG_SATA_NCQ = 0x10,
252
253
254 ATA_CMD_READ_LONG = 0x22,
255 ATA_CMD_READ_LONG_ONCE = 0x23,
256 ATA_CMD_WRITE_LONG = 0x32,
257 ATA_CMD_WRITE_LONG_ONCE = 0x33,
258
259
260 SETFEATURES_XFER = 0x03,
261 XFER_UDMA_7 = 0x47,
262 XFER_UDMA_6 = 0x46,
263 XFER_UDMA_5 = 0x45,
264 XFER_UDMA_4 = 0x44,
265 XFER_UDMA_3 = 0x43,
266 XFER_UDMA_2 = 0x42,
267 XFER_UDMA_1 = 0x41,
268 XFER_UDMA_0 = 0x40,
269 XFER_MW_DMA_4 = 0x24,
270 XFER_MW_DMA_3 = 0x23,
271 XFER_MW_DMA_2 = 0x22,
272 XFER_MW_DMA_1 = 0x21,
273 XFER_MW_DMA_0 = 0x20,
274 XFER_SW_DMA_2 = 0x12,
275 XFER_SW_DMA_1 = 0x11,
276 XFER_SW_DMA_0 = 0x10,
277 XFER_PIO_6 = 0x0E,
278 XFER_PIO_5 = 0x0D,
279 XFER_PIO_4 = 0x0C,
280 XFER_PIO_3 = 0x0B,
281 XFER_PIO_2 = 0x0A,
282 XFER_PIO_1 = 0x09,
283 XFER_PIO_0 = 0x08,
284 XFER_PIO_SLOW = 0x00,
285
286 SETFEATURES_WC_ON = 0x02,
287 SETFEATURES_WC_OFF = 0x82,
288
289
290 SETFEATURES_AAM_ON = 0x42,
291 SETFEATURES_AAM_OFF = 0xC2,
292
293 SETFEATURES_SPINUP = 0x07,
294
295 SETFEATURES_SATA_ENABLE = 0x10,
296 SETFEATURES_SATA_DISABLE = 0x90,
297
298
299 SATA_AN = 0x05,
300 SATA_DIPM = 0x03,
301
302
303 ATA_SET_MAX_ADDR = 0x00,
304 ATA_SET_MAX_PASSWD = 0x01,
305 ATA_SET_MAX_LOCK = 0x02,
306 ATA_SET_MAX_UNLOCK = 0x03,
307 ATA_SET_MAX_FREEZE_LOCK = 0x04,
308
309
310 ATA_DCO_RESTORE = 0xC0,
311 ATA_DCO_FREEZE_LOCK = 0xC1,
312 ATA_DCO_IDENTIFY = 0xC2,
313 ATA_DCO_SET = 0xC3,
314
315
316 ATA_SMART_ENABLE = 0xD8,
317 ATA_SMART_READ_VALUES = 0xD0,
318 ATA_SMART_READ_THRESHOLDS = 0xD1,
319
320
321 ATA_SMART_LBAM_PASS = 0x4F,
322 ATA_SMART_LBAH_PASS = 0xC2,
323
324
325 ATAPI_PKT_DMA = (1 << 0),
326 ATAPI_DMADIR = (1 << 2),
327
328 ATAPI_CDB_LEN = 16,
329
330
331 SATA_PMP_MAX_PORTS = 15,
332 SATA_PMP_CTRL_PORT = 15,
333
334 SATA_PMP_GSCR_DWORDS = 128,
335 SATA_PMP_GSCR_PROD_ID = 0,
336 SATA_PMP_GSCR_REV = 1,
337 SATA_PMP_GSCR_PORT_INFO = 2,
338 SATA_PMP_GSCR_ERROR = 32,
339 SATA_PMP_GSCR_ERROR_EN = 33,
340 SATA_PMP_GSCR_FEAT = 64,
341 SATA_PMP_GSCR_FEAT_EN = 96,
342
343 SATA_PMP_PSCR_STATUS = 0,
344 SATA_PMP_PSCR_ERROR = 1,
345 SATA_PMP_PSCR_CONTROL = 2,
346
347 SATA_PMP_FEAT_BIST = (1 << 0),
348 SATA_PMP_FEAT_PMREQ = (1 << 1),
349 SATA_PMP_FEAT_DYNSSC = (1 << 2),
350 SATA_PMP_FEAT_NOTIFY = (1 << 3),
351
352
353 ATA_CBL_NONE = 0,
354 ATA_CBL_PATA40 = 1,
355 ATA_CBL_PATA80 = 2,
356 ATA_CBL_PATA40_SHORT = 3,
357 ATA_CBL_PATA_UNK = 4,
358 ATA_CBL_PATA_IGN = 5,
359 ATA_CBL_SATA = 6,
360
361
362 SCR_STATUS = 0,
363 SCR_ERROR = 1,
364 SCR_CONTROL = 2,
365 SCR_ACTIVE = 3,
366 SCR_NOTIFICATION = 4,
367
368
369 SERR_DATA_RECOVERED = (1 << 0),
370 SERR_COMM_RECOVERED = (1 << 1),
371 SERR_DATA = (1 << 8),
372 SERR_PERSISTENT = (1 << 9),
373 SERR_PROTOCOL = (1 << 10),
374 SERR_INTERNAL = (1 << 11),
375 SERR_PHYRDY_CHG = (1 << 16),
376 SERR_PHY_INT_ERR = (1 << 17),
377 SERR_COMM_WAKE = (1 << 18),
378 SERR_10B_8B_ERR = (1 << 19),
379 SERR_DISPARITY = (1 << 20),
380 SERR_CRC = (1 << 21),
381 SERR_HANDSHAKE = (1 << 22),
382 SERR_LINK_SEQ_ERR = (1 << 23),
383 SERR_TRANS_ST_ERROR = (1 << 24),
384 SERR_UNRECOG_FIS = (1 << 25),
385 SERR_DEV_XCHG = (1 << 26),
386
387
388 ATA_TFLAG_LBA48 = (1 << 0),
389 ATA_TFLAG_ISADDR = (1 << 1),
390 ATA_TFLAG_DEVICE = (1 << 2),
391 ATA_TFLAG_WRITE = (1 << 3),
392 ATA_TFLAG_LBA = (1 << 4),
393 ATA_TFLAG_FUA = (1 << 5),
394 ATA_TFLAG_POLLING = (1 << 6),
395
396
397 ATA_PROT_FLAG_PIO = (1 << 0),
398 ATA_PROT_FLAG_DMA = (1 << 1),
399 ATA_PROT_FLAG_DATA = ATA_PROT_FLAG_PIO | ATA_PROT_FLAG_DMA,
400 ATA_PROT_FLAG_NCQ = (1 << 2),
401 ATA_PROT_FLAG_ATAPI = (1 << 3),
402};
403
404enum ata_tf_protocols {
405
406 ATA_PROT_UNKNOWN,
407 ATA_PROT_NODATA,
408 ATA_PROT_PIO,
409 ATA_PROT_DMA,
410 ATA_PROT_NCQ,
411 ATAPI_PROT_NODATA,
412 ATAPI_PROT_PIO,
413 ATAPI_PROT_DMA,
414};
415
416enum ata_ioctls {
417 ATA_IOC_GET_IO32 = 0x309,
418 ATA_IOC_SET_IO32 = 0x324,
419};
420
421
422
423struct ata_prd {
424 __le32 addr;
425 __le32 flags_len;
426};
427
428struct ata_taskfile {
429 unsigned long flags;
430 u8 protocol;
431
432 u8 ctl;
433
434 u8 hob_feature;
435 u8 hob_nsect;
436 u8 hob_lbal;
437 u8 hob_lbam;
438 u8 hob_lbah;
439
440 u8 feature;
441 u8 nsect;
442 u8 lbal;
443 u8 lbam;
444 u8 lbah;
445
446 u8 device;
447
448 u8 command;
449};
450
451
452
453
454static inline unsigned int ata_prot_flags(u8 prot)
455{
456 switch (prot) {
457 case ATA_PROT_NODATA:
458 return 0;
459 case ATA_PROT_PIO:
460 return ATA_PROT_FLAG_PIO;
461 case ATA_PROT_DMA:
462 return ATA_PROT_FLAG_DMA;
463 case ATA_PROT_NCQ:
464 return ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ;
465 case ATAPI_PROT_NODATA:
466 return ATA_PROT_FLAG_ATAPI;
467 case ATAPI_PROT_PIO:
468 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO;
469 case ATAPI_PROT_DMA:
470 return ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA;
471 }
472 return 0;
473}
474
475static inline int ata_is_atapi(u8 prot)
476{
477 return ata_prot_flags(prot) & ATA_PROT_FLAG_ATAPI;
478}
479
480static inline int ata_is_nodata(u8 prot)
481{
482 return !(ata_prot_flags(prot) & ATA_PROT_FLAG_DATA);
483}
484
485static inline int ata_is_pio(u8 prot)
486{
487 return ata_prot_flags(prot) & ATA_PROT_FLAG_PIO;
488}
489
490static inline int ata_is_dma(u8 prot)
491{
492 return ata_prot_flags(prot) & ATA_PROT_FLAG_DMA;
493}
494
495static inline int ata_is_ncq(u8 prot)
496{
497 return ata_prot_flags(prot) & ATA_PROT_FLAG_NCQ;
498}
499
500static inline int ata_is_data(u8 prot)
501{
502 return ata_prot_flags(prot) & ATA_PROT_FLAG_DATA;
503}
504
505
506
507
508#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
509#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
510#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
511#define ata_id_has_ncq(id) ((id)[76] & (1 << 8))
512#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
513#define ata_id_removeable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
514#define ata_id_has_atapi_AN(id) \
515 ( (((id)[76] != 0x0000) && ((id)[76] != 0xffff)) && \
516 ((id)[78] & (1 << 5)) )
517#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
518#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
519#define ata_id_u32(id,n) \
520 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
521#define ata_id_u64(id,n) \
522 ( ((u64) (id)[(n) + 3] << 48) | \
523 ((u64) (id)[(n) + 2] << 32) | \
524 ((u64) (id)[(n) + 1] << 16) | \
525 ((u64) (id)[(n) + 0]) )
526
527#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
528
529static inline bool ata_id_has_hipm(const u16 *id)
530{
531 u16 val = id[76];
532
533 if (val == 0 || val == 0xffff)
534 return false;
535
536 return val & (1 << 9);
537}
538
539static inline bool ata_id_has_dipm(const u16 *id)
540{
541 u16 val = id[78];
542
543 if (val == 0 || val == 0xffff)
544 return false;
545
546 return val & (1 << 3);
547}
548
549
550static inline int ata_id_has_fua(const u16 *id)
551{
552 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
553 return 0;
554 return id[ATA_ID_CFSSE] & (1 << 6);
555}
556
557static inline int ata_id_has_flush(const u16 *id)
558{
559 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
560 return 0;
561 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
562}
563
564static inline int ata_id_flush_enabled(const u16 *id)
565{
566 if (ata_id_has_flush(id) == 0)
567 return 0;
568 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
569 return 0;
570 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
571}
572
573static inline int ata_id_has_flush_ext(const u16 *id)
574{
575 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
576 return 0;
577 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
578}
579
580static inline int ata_id_flush_ext_enabled(const u16 *id)
581{
582 if (ata_id_has_flush_ext(id) == 0)
583 return 0;
584 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
585 return 0;
586
587
588
589
590 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
591}
592
593static inline int ata_id_has_lba48(const u16 *id)
594{
595 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
596 return 0;
597 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
598 return 0;
599 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
600}
601
602static inline int ata_id_lba48_enabled(const u16 *id)
603{
604 if (ata_id_has_lba48(id) == 0)
605 return 0;
606 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
607 return 0;
608 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
609}
610
611static inline int ata_id_hpa_enabled(const u16 *id)
612{
613
614 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
615 return 0;
616
617 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
618 return 0;
619
620 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
621 return 0;
622 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
623}
624
625static inline int ata_id_has_wcache(const u16 *id)
626{
627
628 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
629 return 0;
630 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
631}
632
633static inline int ata_id_has_pm(const u16 *id)
634{
635 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
636 return 0;
637 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
638}
639
640static inline int ata_id_rahead_enabled(const u16 *id)
641{
642 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
643 return 0;
644 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
645}
646
647static inline int ata_id_wcache_enabled(const u16 *id)
648{
649 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
650 return 0;
651 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
652}
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667static inline unsigned int ata_id_major_version(const u16 *id)
668{
669 unsigned int mver;
670
671 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
672 return 0;
673
674 for (mver = 14; mver >= 1; mver--)
675 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
676 break;
677 return mver;
678}
679
680static inline int ata_id_is_sata(const u16 *id)
681{
682
683
684
685
686
687
688 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
689 return 1;
690 return 0;
691}
692
693static inline int ata_id_has_tpm(const u16 *id)
694{
695
696 if (ata_id_major_version(id) < 8)
697 return 0;
698 if ((id[48] & 0xC000) != 0x4000)
699 return 0;
700 return id[48] & (1 << 0);
701}
702
703static inline int ata_id_has_dword_io(const u16 *id)
704{
705
706 if (ata_id_major_version(id) > 7)
707 return 0;
708 if (id[ATA_ID_DWORD_IO] & (1 << 0))
709 return 1;
710 return 0;
711}
712
713static inline int ata_id_has_unload(const u16 *id)
714{
715 if (ata_id_major_version(id) >= 7 &&
716 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
717 id[ATA_ID_CFSSE] & (1 << 13))
718 return 1;
719 return 0;
720}
721
722static inline int ata_id_current_chs_valid(const u16 *id)
723{
724
725
726
727 return (id[ATA_ID_FIELD_VALID] & 1) &&
728 id[ATA_ID_CUR_CYLS] &&
729 id[ATA_ID_CUR_HEADS] &&
730 id[ATA_ID_CUR_HEADS] <= 16 &&
731 id[ATA_ID_CUR_SECTORS];
732}
733
734static inline int ata_id_is_cfa(const u16 *id)
735{
736 if (id[ATA_ID_CONFIG] == 0x848A)
737 return 1;
738
739
740
741
742
743
744
745
746 if ((id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004)
747 return 1;
748 return 0;
749}
750
751static inline int ata_id_is_ssd(const u16 *id)
752{
753 return id[ATA_ID_ROT_SPEED] == 0x01;
754}
755
756static inline int ata_drive_40wire(const u16 *dev_id)
757{
758 if (ata_id_is_sata(dev_id))
759 return 0;
760 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
761 return 0;
762 return 1;
763}
764
765static inline int ata_drive_40wire_relaxed(const u16 *dev_id)
766{
767 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
768 return 0;
769 return 1;
770}
771
772static inline int atapi_cdb_len(const u16 *dev_id)
773{
774 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
775 switch (tmp) {
776 case 0: return 12;
777 case 1: return 16;
778 default: return -1;
779 }
780}
781
782static inline int atapi_command_packet_set(const u16 *dev_id)
783{
784 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
785}
786
787static inline int atapi_id_dmadir(const u16 *dev_id)
788{
789 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
790}
791
792
793
794
795
796
797
798
799
800static inline int ata_id_is_lba_capacity_ok(u16 *id)
801{
802 unsigned long lba_sects, chs_sects, head, tail;
803
804
805 if (id[ATA_ID_CYLS] == 0)
806 return 1;
807
808 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
809
810
811
812
813
814
815
816 if ((id[ATA_ID_CYLS] == 16383 ||
817 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
818 id[ATA_ID_SECTORS] == 63 &&
819 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
820 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
821 return 1;
822
823 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
824
825
826 if (lba_sects - chs_sects < chs_sects/10)
827 return 1;
828
829
830 head = (lba_sects >> 16) & 0xffff;
831 tail = lba_sects & 0xffff;
832 lba_sects = head | (tail << 16);
833
834 if (lba_sects - chs_sects < chs_sects/10) {
835 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
836 return 1;
837 }
838
839 return 0;
840}
841
842static inline void ata_id_to_hd_driveid(u16 *id)
843{
844#ifdef __BIG_ENDIAN
845
846 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
847 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
848 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
849 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
850 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
851
852
853 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
854 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
855
856
857 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
858 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
859#endif
860}
861
862static inline int is_multi_taskfile(struct ata_taskfile *tf)
863{
864 return (tf->command == ATA_CMD_READ_MULTI) ||
865 (tf->command == ATA_CMD_WRITE_MULTI) ||
866 (tf->command == ATA_CMD_READ_MULTI_EXT) ||
867 (tf->command == ATA_CMD_WRITE_MULTI_EXT) ||
868 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT);
869}
870
871static inline int ata_ok(u8 status)
872{
873 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
874 == ATA_DRDY);
875}
876
877static inline int lba_28_ok(u64 block, u32 n_block)
878{
879
880 return ((block + n_block) < ((u64)1 << 28)) && (n_block <= 256);
881}
882
883static inline int lba_48_ok(u64 block, u32 n_block)
884{
885
886 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536);
887}
888
889#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
890#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
891#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
892#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
893
894#endif
895
