1# Put here option for CPU selection and depending optimization 2if !X86_ELAN 3 4choice 5 prompt "Processor family" 6 default M686 if X86_32 7 default GENERIC_CPU if X86_64 8 9config M386 10 bool "386" 11 depends on X86_32 && !UML 12 ---help--- 13 This is the processor type of your CPU. This information is used for 14 optimizing purposes. In order to compile a kernel that can run on 15 all x86 CPU types (albeit not optimally fast), you can specify 16 "386" here. 17 18 The kernel will not necessarily run on earlier architectures than 19 the one you have chosen, e.g. a Pentium optimized kernel will run on 20 a PPro, but not necessarily on a i486. 21 22 Here are the settings recommended for greatest speed: 23 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 24 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386 25 class machine. 26 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or 27 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S. 28 - "586" for generic Pentium CPUs lacking the TSC 29 (time stamp counter) register. 30 - "Pentium-Classic" for the Intel Pentium. 31 - "Pentium-MMX" for the Intel Pentium MMX. 32 - "Pentium-Pro" for the Intel Pentium Pro. 33 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron. 34 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron. 35 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron. 36 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D). 37 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird). 38 - "Crusoe" for the Transmeta Crusoe series. 39 - "Efficeon" for the Transmeta Efficeon series. 40 - "Winchip-C6" for original IDT Winchip. 41 - "Winchip-2" for IDT Winchips with 3dNow! capabilities. 42 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX). 43 - "Geode GX/LX" For AMD Geode GX and LX processors. 44 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3. 45 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above). 46 - "VIA C7" for VIA C7. 47 48 If you don't know what to do, choose "386". 49 50config M486 51 bool "486" 52 depends on X86_32 53 help 54 Select this for a 486 series processor, either Intel or one of the 55 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX, 56 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or 57 U5S. 58 59config M586 60 bool "586/K5/5x86/6x86/6x86MX" 61 depends on X86_32 62 help 63 Select this for an 586 or 686 series processor such as the AMD K5, 64 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not 65 assume the RDTSC (Read Time Stamp Counter) instruction. 66 67config M586TSC 68 bool "Pentium-Classic" 69 depends on X86_32 70 help 71 Select this for a Pentium Classic processor with the RDTSC (Read 72 Time Stamp Counter) instruction for benchmarking. 73 74config M586MMX 75 bool "Pentium-MMX" 76 depends on X86_32 77 help 78 Select this for a Pentium with the MMX graphics/multimedia 79 extended instructions. 80 81config M686 82 bool "Pentium-Pro" 83 depends on X86_32 84 help 85 Select this for Intel Pentium Pro chips. This enables the use of 86 Pentium Pro extended instructions, and disables the init-time guard 87 against the f00f bug found in earlier Pentiums. 88 89config MPENTIUMII 90 bool "Pentium-II/Celeron(pre-Coppermine)" 91 depends on X86_32 92 help 93 Select this for Intel chips based on the Pentium-II and 94 pre-Coppermine Celeron core. This option enables an unaligned 95 copy optimization, compiles the kernel with optimization flags 96 tailored for the chip, and applies any applicable Pentium Pro 97 optimizations. 98 99config MPENTIUMIII 100 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon" 101 depends on X86_32 102 help 103 Select this for Intel chips based on the Pentium-III and 104 Celeron-Coppermine core. This option enables use of some 105 extended prefetch instructions in addition to the Pentium II 106 extensions. 107 108config MPENTIUMM 109 bool "Pentium M" 110 depends on X86_32 111 help 112 Select this for Intel Pentium M (not Pentium-4 M) 113 notebook chips. 114 115config MPENTIUM4 116 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon" 117 depends on X86_32 118 help 119 Select this for Intel Pentium 4 chips. This includes the 120 Pentium 4, Pentium D, P4-based Celeron and Xeon, and 121 Pentium-4 M (not Pentium M) chips. This option enables compile 122 flags optimized for the chip, uses the correct cache line size, and 123 applies any applicable optimizations. 124 125 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 ) 126 127 Select this for: 128 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename: 129 -Willamette 130 -Northwood 131 -Mobile Pentium 4 132 -Mobile Pentium 4 M 133 -Extreme Edition (Gallatin) 134 -Prescott 135 -Prescott 2M 136 -Cedar Mill 137 -Presler 138 -Smithfiled 139 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename: 140 -Foster 141 -Prestonia 142 -Gallatin 143 -Nocona 144 -Irwindale 145 -Cranford 146 -Potomac 147 -Paxville 148 -Dempsey 149 150 151config MK6 152 bool "K6/K6-II/K6-III" 153 depends on X86_32 154 help 155 Select this for an AMD K6-family processor. Enables use of 156 some extended instructions, and passes appropriate optimization 157 flags to GCC. 158 159config MK7 160 bool "Athlon/Duron/K7" 161 depends on X86_32 162 help 163 Select this for an AMD Athlon K7-family processor. Enables use of 164 some extended instructions, and passes appropriate optimization 165 flags to GCC. 166 167config MK8 168 bool "Opteron/Athlon64/Hammer/K8" 169 help 170 Select this for an AMD Opteron or Athlon64 Hammer-family processor. 171 Enables use of some extended instructions, and passes appropriate 172 optimization flags to GCC. 173 174config MCRUSOE 175 bool "Crusoe" 176 depends on X86_32 177 help 178 Select this for a Transmeta Crusoe processor. Treats the processor 179 like a 586 with TSC, and sets some GCC optimization flags (like a 180 Pentium Pro with no alignment requirements). 181 182config MEFFICEON 183 bool "Efficeon" 184 depends on X86_32 185 help 186 Select this for a Transmeta Efficeon processor. 187 188config MWINCHIPC6 189 bool "Winchip-C6" 190 depends on X86_32 191 help 192 Select this for an IDT Winchip C6 chip. Linux and GCC 193 treat this chip as a 586TSC with some extended instructions 194 and alignment requirements. 195 196config MWINCHIP3D 197 bool "Winchip-2/Winchip-2A/Winchip-3" 198 depends on X86_32 199 help 200 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC 201 treat this chip as a 586TSC with some extended instructions 202 and alignment requirements. Also enable out of order memory 203 stores for this CPU, which can increase performance of some 204 operations. 205 206config MGEODEGX1 207 bool "GeodeGX1" 208 depends on X86_32 209 help 210 Select this for a Geode GX1 (Cyrix MediaGX) chip. 211 212config MGEODE_LX 213 bool "Geode GX/LX" 214 depends on X86_32 215 help 216 Select this for AMD Geode GX and LX processors. 217 218config MCYRIXIII 219 bool "CyrixIII/VIA-C3" 220 depends on X86_32 221 help 222 Select this for a Cyrix III or C3 chip. Presently Linux and GCC 223 treat this chip as a generic 586. Whilst the CPU is 686 class, 224 it lacks the cmov extension which gcc assumes is present when 225 generating 686 code. 226 Note that Nehemiah (Model 9) and above will not boot with this 227 kernel due to them lacking the 3DNow! instructions used in earlier 228 incarnations of the CPU. 229 230config MVIAC3_2 231 bool "VIA C3-2 (Nehemiah)" 232 depends on X86_32 233 help 234 Select this for a VIA C3 "Nehemiah". Selecting this enables usage 235 of SSE and tells gcc to treat the CPU as a 686. 236 Note, this kernel will not boot on older (pre model 9) C3s. 237 238config MVIAC7 239 bool "VIA C7" 240 depends on X86_32 241 help 242 Select this for a VIA C7. Selecting this uses the correct cache 243 shift and tells gcc to treat the CPU as a 686. 244 245config MPSC 246 bool "Intel P4 / older Netburst based Xeon" 247 depends on X86_64 248 help 249 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey 250 Xeon CPUs with Intel 64bit which is compatible with x86-64. 251 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the 252 Netburst core and shouldn't use this option. You can distinguish them 253 using the cpu family field 254 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one. 255 256config MCORE2 257 bool "Core 2/newer Xeon" 258 help 259 260 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 261 53xx) CPUs. You can distinguish newer from older Xeons by the CPU 262 family in /proc/cpuinfo. Newer ones have 6 and older ones 15 263 (not a typo) 264 265config GENERIC_CPU 266 bool "Generic-x86-64" 267 depends on X86_64 268 help 269 Generic x86-64 CPU. 270 Run equally well on all x86-64 CPUs. 271 272endchoice 273 274config X86_GENERIC 275 bool "Generic x86 support" 276 depends on X86_32 277 help 278 Instead of just including optimizations for the selected 279 x86 variant (e.g. PII, Crusoe or Athlon), include some more 280 generic optimizations as well. This will make the kernel 281 perform better on x86 CPUs other than that selected. 282 283 This is really intended for distributors who need more 284 generic optimizations. 285 286endif 287 288config X86_CPU 289 def_bool y 290 select GENERIC_FIND_FIRST_BIT 291 select GENERIC_FIND_NEXT_BIT 292 293# 294# Define implied options from the CPU selection here 295config X86_L1_CACHE_BYTES 296 int 297 default "128" if GENERIC_CPU || MPSC 298 default "64" if MK8 || MCORE2 299 depends on X86_64 300 301config X86_INTERNODE_CACHE_BYTES 302 int 303 default "4096" if X86_VSMP 304 default X86_L1_CACHE_BYTES if !X86_VSMP 305 depends on X86_64 306 307config X86_CMPXCHG 308 def_bool X86_64 || (X86_32 && !M386) 309 310config X86_L1_CACHE_SHIFT 311 int 312 default "7" if MPENTIUM4 || X86_GENERIC || GENERIC_CPU || MPSC 313 default "4" if X86_ELAN || M486 || M386 || MGEODEGX1 314 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX 315 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7 316 317config X86_XADD 318 def_bool y 319 depends on X86_32 && !M386 320 321config X86_PPRO_FENCE 322 bool "PentiumPro memory ordering errata workaround" 323 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1 324 help 325 Old PentiumPro multiprocessor systems had errata that could cause 326 memory operations to violate the x86 ordering standard in rare cases. 327 Enabling this option will attempt to work around some (but not all) 328 occurances of this problem, at the cost of much heavier spinlock and 329 memory barrier operations. 330 331 If unsure, say n here. Even distro kernels should think twice before 332 enabling this: there are few systems, and an unlikely bug. 333 334config X86_F00F_BUG 335 def_bool y 336 depends on M586MMX || M586TSC || M586 || M486 || M386 337 338config X86_WP_WORKS_OK 339 def_bool y 340 depends on !M386 341 342config X86_INVLPG 343 def_bool y 344 depends on X86_32 && !M386 345 346config X86_BSWAP 347 def_bool y 348 depends on X86_32 && !M386 349 350config X86_POPAD_OK 351 def_bool y 352 depends on X86_32 && !M386 353 354config X86_ALIGNMENT_16 355 def_bool y 356 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1 357 358config X86_INTEL_USERCOPY 359 def_bool y 360 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2 361 362config X86_USE_PPRO_CHECKSUM 363 def_bool y 364 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2 365 366config X86_USE_3DNOW 367 def_bool y 368 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML 369 370config X86_OOSTORE 371 def_bool y 372 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR 373 374# 375# P6_NOPs are a relatively minor optimization that require a family >= 376# 6 processor, except that it is broken on certain VIA chips. 377# Furthermore, AMD chips prefer a totally different sequence of NOPs 378# (which work on all CPUs). In addition, it looks like Virtual PC 379# does not understand them. 380# 381# As a result, disallow these if we're not compiling for X86_64 (these 382# NOPs do work on all x86-64 capable chips); the list of processors in 383# the right-hand clause are the cores that benefit from this optimization. 384# 385config X86_P6_NOP 386 def_bool y 387 depends on X86_64 388 depends on (MCORE2 || MPENTIUM4 || MPSC) 389 390config X86_TSC 391 def_bool y 392 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ) || X86_64 393 394config X86_CMPXCHG64 395 def_bool y 396 depends on X86_PAE || X86_64 397 398# this should be set for all -march=.. options where the compiler 399# generates cmov. 400config X86_CMOV 401 def_bool y 402 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64) 403 404config X86_MINIMUM_CPU_FAMILY 405 int 406 default "64" if X86_64 407 default "6" if X86_32 && X86_P6_NOP 408 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK) 409 default "3" 410 411config X86_DEBUGCTLMSR 412 def_bool y 413 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML 414 415menuconfig PROCESSOR_SELECT 416 bool "Supported processor vendors" if EMBEDDED 417 help 418 This lets you choose what x86 vendor support code your kernel 419 will include. 420 421config CPU_SUP_INTEL 422 default y 423 bool "Support Intel processors" if PROCESSOR_SELECT 424 help 425 This enables detection, tunings and quirks for Intel processors 426 427 You need this enabled if you want your kernel to run on an 428 Intel CPU. Disabling this option on other types of CPUs 429 makes the kernel a tiny bit smaller. Disabling it on an Intel 430 CPU might render the kernel unbootable. 431 432 If unsure, say N. 433 434config CPU_SUP_CYRIX_32 435 default y 436 bool "Support Cyrix processors" if PROCESSOR_SELECT 437 depends on !64BIT 438 help 439 This enables detection, tunings and quirks for Cyrix processors 440 441 You need this enabled if you want your kernel to run on a 442 Cyrix CPU. Disabling this option on other types of CPUs 443 makes the kernel a tiny bit smaller. Disabling it on a Cyrix 444 CPU might render the kernel unbootable. 445 446 If unsure, say N. 447 448config CPU_SUP_AMD 449 default y 450 bool "Support AMD processors" if PROCESSOR_SELECT 451 help 452 This enables detection, tunings and quirks for AMD processors 453 454 You need this enabled if you want your kernel to run on an 455 AMD CPU. Disabling this option on other types of CPUs 456 makes the kernel a tiny bit smaller. Disabling it on an AMD 457 CPU might render the kernel unbootable. 458 459 If unsure, say N. 460 461config CPU_SUP_CENTAUR_32 462 default y 463 bool "Support Centaur processors" if PROCESSOR_SELECT 464 depends on !64BIT 465 help 466 This enables detection, tunings and quirks for Centaur processors 467 468 You need this enabled if you want your kernel to run on a 469 Centaur CPU. Disabling this option on other types of CPUs 470 makes the kernel a tiny bit smaller. Disabling it on a Centaur 471 CPU might render the kernel unbootable. 472 473 If unsure, say N. 474 475config CPU_SUP_CENTAUR_64 476 default y 477 bool "Support Centaur processors" if PROCESSOR_SELECT 478 depends on 64BIT 479 help 480 This enables detection, tunings and quirks for Centaur processors 481 482 You need this enabled if you want your kernel to run on a 483 Centaur CPU. Disabling this option on other types of CPUs 484 makes the kernel a tiny bit smaller. Disabling it on a Centaur 485 CPU might render the kernel unbootable. 486 487 If unsure, say N. 488 489config CPU_SUP_TRANSMETA_32 490 default y 491 bool "Support Transmeta processors" if PROCESSOR_SELECT 492 depends on !64BIT 493 help 494 This enables detection, tunings and quirks for Transmeta processors 495 496 You need this enabled if you want your kernel to run on a 497 Transmeta CPU. Disabling this option on other types of CPUs 498 makes the kernel a tiny bit smaller. Disabling it on a Transmeta 499 CPU might render the kernel unbootable. 500 501 If unsure, say N. 502 503config CPU_SUP_UMC_32 504 default y 505 bool "Support UMC processors" if PROCESSOR_SELECT 506 depends on !64BIT 507 help 508 This enables detection, tunings and quirks for UMC processors 509 510 You need this enabled if you want your kernel to run on a 511 UMC CPU. Disabling this option on other types of CPUs 512 makes the kernel a tiny bit smaller. Disabling it on a UMC 513 CPU might render the kernel unbootable. 514 515 If unsure, say N. 516 517config X86_DS 518 def_bool X86_PTRACE_BTS 519 depends on X86_DEBUGCTLMSR 520 select HAVE_HW_BRANCH_TRACER 521 522config X86_PTRACE_BTS 523 bool "Branch Trace Store" 524 default y 525 depends on X86_DEBUGCTLMSR 526 help 527 This adds a ptrace interface to the hardware's branch trace store. 528 529 Debuggers may use it to collect an execution trace of the debugged 530 application in order to answer the question 'how did I get here?'. 531 Debuggers may trace user mode as well as kernel mode. 532 533 Say Y unless there is no application development on this machine 534 and you want to save a small amount of code size. 535