LXR linux/sound/soc/codecs/uda1380.c

   1/*
   2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 *
   8 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
   9 * Improved support for DAPM and audio routing/mixing capabilities,
  10 * added TLV support.
  11 *
  12 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
  13 * codec model.
  14 *
  15 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
  16 * Copyright 2005 Openedhand Ltd.
  17 */
  18
  19#include <linux/module.h>
  20#include <linux/init.h>
  21#include <linux/types.h>
  22#include <linux/string.h>
  23#include <linux/slab.h>
  24#include <linux/errno.h>
  25#include <linux/ioctl.h>
  26#include <linux/delay.h>
  27#include <linux/i2c.h>
  28#include <sound/core.h>
  29#include <sound/control.h>
  30#include <sound/initval.h>
  31#include <sound/info.h>
  32#include <sound/soc.h>
  33#include <sound/soc-dapm.h>
  34#include <sound/tlv.h>
  35
  36#include "uda1380.h"
  37
  38#define UDA1380_VERSION "0.6"
  39
  40/*
  41 * uda1380 register cache
  42 */
  43static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
  44        0x0502, 0x0000, 0x0000, 0x3f3f,
  45        0x0202, 0x0000, 0x0000, 0x0000,
  46        0x0000, 0x0000, 0x0000, 0x0000,
  47        0x0000, 0x0000, 0x0000, 0x0000,
  48        0x0000, 0xff00, 0x0000, 0x4800,
  49        0x0000, 0x0000, 0x0000, 0x0000,
  50        0x0000, 0x0000, 0x0000, 0x0000,
  51        0x0000, 0x0000, 0x0000, 0x0000,
  52        0x0000, 0x8000, 0x0002, 0x0000,
  53};
  54
  55/*
  56 * read uda1380 register cache
  57 */
  58static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
  59        unsigned int reg)
  60{
  61        u16 *cache = codec->reg_cache;
  62        if (reg == UDA1380_RESET)
  63                return 0;
  64        if (reg >= UDA1380_CACHEREGNUM)
  65                return -1;
  66        return cache[reg];
  67}
  68
  69/*
  70 * write uda1380 register cache
  71 */
  72static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
  73        u16 reg, unsigned int value)
  74{
  75        u16 *cache = codec->reg_cache;
  76        if (reg >= UDA1380_CACHEREGNUM)
  77                return;
  78        cache[reg] = value;
  79}
  80
  81/*
  82 * write to the UDA1380 register space
  83 */
  84static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
  85        unsigned int value)
  86{
  87        u8 data[3];
  88
  89        /* data is
  90         *   data[0] is register offset
  91         *   data[1] is MS byte
  92         *   data[2] is LS byte
  93         */
  94        data[0] = reg;
  95        data[1] = (value & 0xff00) >> 8;
  96        data[2] = value & 0x00ff;
  97
  98        uda1380_write_reg_cache(codec, reg, value);
  99
 100        /* the interpolator & decimator regs must only be written when the
 101         * codec DAI is active.
 102         */
 103        if (!codec->active && (reg >= UDA1380_MVOL))
 104                return 0;
 105        pr_debug("uda1380: hw write %x val %x\n", reg, value);
 106        if (codec->hw_write(codec->control_data, data, 3) == 3) {
 107                unsigned int val;
 108                i2c_master_send(codec->control_data, data, 1);
 109                i2c_master_recv(codec->control_data, data, 2);
 110                val = (data[0]<<8) | data[1];
 111                if (val != value) {
 112                        pr_debug("uda1380: READ BACK VAL %x\n",
 113                                        (data[0]<<8) | data[1]);
 114                        return -EIO;
 115                }
 116                return 0;
 117        } else
 118                return -EIO;
 119}
 120
 121#define uda1380_reset(c)        uda1380_write(c, UDA1380_RESET, 0)
 122
 123/* declarations of ALSA reg_elem_REAL controls */
 124static const char *uda1380_deemp[] = {
 125        "None",
 126        "32kHz",
 127        "44.1kHz",
 128        "48kHz",
 129        "96kHz",
 130};
 131static const char *uda1380_input_sel[] = {
 132        "Line",
 133        "Mic + Line R",
 134        "Line L",
 135        "Mic",
 136};
 137static const char *uda1380_output_sel[] = {
 138        "DAC",
 139        "Analog Mixer",
 140};
 141static const char *uda1380_spf_mode[] = {
 142        "Flat",
 143        "Minimum1",
 144        "Minimum2",
 145        "Maximum"
 146};
 147static const char *uda1380_capture_sel[] = {
 148        "ADC",
 149        "Digital Mixer"
 150};
 151static const char *uda1380_sel_ns[] = {
 152        "3rd-order",
 153        "5th-order"
 154};
 155static const char *uda1380_mix_control[] = {
 156        "off",
 157        "PCM only",
 158        "before sound processing",
 159        "after sound processing"
 160};
 161static const char *uda1380_sdet_setting[] = {
 162        "3200",
 163        "4800",
 164        "9600",
 165        "19200"
 166};
 167static const char *uda1380_os_setting[] = {
 168        "single-speed",
 169        "double-speed (no mixing)",
 170        "quad-speed (no mixing)"
 171};
 172
 173static const struct soc_enum uda1380_deemp_enum[] = {
 174        SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
 175        SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
 176};
 177static const struct soc_enum uda1380_input_sel_enum =
 178        SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel);          /* SEL_MIC, SEL_LNA */
 179static const struct soc_enum uda1380_output_sel_enum =
 180        SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel);          /* R02_EN_AVC */
 181static const struct soc_enum uda1380_spf_enum =
 182        SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode);         /* M */
 183static const struct soc_enum uda1380_capture_sel_enum =
 184        SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel);      /* SEL_SOURCE */
 185static const struct soc_enum uda1380_sel_ns_enum =
 186        SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns);          /* SEL_NS */
 187static const struct soc_enum uda1380_mix_enum =
 188        SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control);     /* MIX, MIX_POS */
 189static const struct soc_enum uda1380_sdet_enum =
 190        SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting);     /* SD_VALUE */
 191static const struct soc_enum uda1380_os_enum =
 192        SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting);       /* OS */
 193
 194/*
 195 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
 196 */
 197static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
 198
 199/*
 200 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
 201 * from -66 dB in 0.5 dB steps (2 dB steps, really) and
 202 * from -52 dB in 0.25 dB steps
 203 */
 204static const unsigned int mvol_tlv[] = {
 205        TLV_DB_RANGE_HEAD(3),
 206        0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
 207        16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
 208        44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
 209};
 210
 211/*
 212 * from -72 dB in 1.5 dB steps (6 dB steps really),
 213 * from -66 dB in 0.75 dB steps (3 dB steps really),
 214 * from -60 dB in 0.5 dB steps (2 dB steps really) and
 215 * from -46 dB in 0.25 dB steps
 216 */
 217static const unsigned int vc_tlv[] = {
 218        TLV_DB_RANGE_HEAD(4),
 219        0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
 220        8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
 221        16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
 222        44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
 223};
 224
 225/* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
 226static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
 227
 228/* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
 229 * off at 18 dB max) */
 230static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
 231
 232/* from -63 to 24 dB in 0.5 dB steps (-128...48) */
 233static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
 234
 235/* from 0 to 24 dB in 3 dB steps */
 236static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
 237
 238/* from 0 to 30 dB in 2 dB steps */
 239static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
 240
 241static const struct snd_kcontrol_new uda1380_snd_controls[] = {
 242        SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv),     /* AVCR, AVCL */
 243        SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
 244        SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv),       /* VC2 */
 245        SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv),       /* VC1 */
 246        SOC_ENUM("Sound Processing Filter", uda1380_spf_enum),                          /* M */
 247        SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv),     /* TRL, TRR */
 248        SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv),       /* BBL, BBR */
 249/**/    SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1),          /* MTM */
 250        SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1),             /* MT2 from decimation filter */
 251        SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]),            /* DE2 */
 252        SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1),              /* MT1, from digital data input */
 253        SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]),            /* DE1 */
 254        SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0),   /* DA_POL_INV */
 255        SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum),                          /* SEL_NS */
 256        SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum),             /* MIX_POS, MIX */
 257        SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0),                   /* SILENCE, force DAC output to silence */
 258        SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0),          /* SDET_ON */
 259        SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum),                /* SD_VALUE */
 260        SOC_ENUM("Oversampling Input", uda1380_os_enum),                        /* OS */
 261        SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv),        /* ML_DEC, MR_DEC */
 262/**/    SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1),                /* MT_ADC */
 263        SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
 264        SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0),     /* ADCPOL_INV */
 265        SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv),   /* VGA_CTRL */
 266        SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0),            /* SKIP_DCFIL (before decimator) */
 267        SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0),            /* EN_DCFIL (at output of decimator) */
 268        SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0),                 /* TODO: enum, see table 62 */
 269        SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1),                   /* AGC_LEVEL */
 270        /* -5.5, -8, -11.5, -14 dBFS */
 271        SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
 272};
 273
 274/* add non dapm controls */
 275static int uda1380_add_controls(struct snd_soc_codec *codec)
 276{
 277        int err, i;
 278
 279        for (i = 0; i < ARRAY_SIZE(uda1380_snd_controls); i++) {
 280                err = snd_ctl_add(codec->card,
 281                        snd_soc_cnew(&uda1380_snd_controls[i], codec, NULL));
 282                if (err < 0)
 283                        return err;
 284        }
 285
 286        return 0;
 287}
 288
 289/* Input mux */
 290static const struct snd_kcontrol_new uda1380_input_mux_control =
 291        SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
 292
 293/* Output mux */
 294static const struct snd_kcontrol_new uda1380_output_mux_control =
 295        SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
 296
 297/* Capture mux */
 298static const struct snd_kcontrol_new uda1380_capture_mux_control =
 299        SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
 300
 301
 302static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
 303        SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
 304                &uda1380_input_mux_control),
 305        SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
 306                &uda1380_output_mux_control),
 307        SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
 308                &uda1380_capture_mux_control),
 309        SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
 310        SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
 311        SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
 312        SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
 313        SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
 314        SND_SOC_DAPM_INPUT("VINM"),
 315        SND_SOC_DAPM_INPUT("VINL"),
 316        SND_SOC_DAPM_INPUT("VINR"),
 317        SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
 318        SND_SOC_DAPM_OUTPUT("VOUTLHP"),
 319        SND_SOC_DAPM_OUTPUT("VOUTRHP"),
 320        SND_SOC_DAPM_OUTPUT("VOUTL"),
 321        SND_SOC_DAPM_OUTPUT("VOUTR"),
 322        SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
 323        SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
 324};
 325
 326static const struct snd_soc_dapm_route audio_map[] = {
 327
 328        /* output mux */
 329        {"HeadPhone Driver", NULL, "Output Mux"},
 330        {"VOUTR", NULL, "Output Mux"},
 331        {"VOUTL", NULL, "Output Mux"},
 332
 333        {"Analog Mixer", NULL, "VINR"},
 334        {"Analog Mixer", NULL, "VINL"},
 335        {"Analog Mixer", NULL, "DAC"},
 336
 337        {"Output Mux", "DAC", "DAC"},
 338        {"Output Mux", "Analog Mixer", "Analog Mixer"},
 339
 340        /* {"DAC", "Digital Mixer", "I2S" } */
 341
 342        /* headphone driver */
 343        {"VOUTLHP", NULL, "HeadPhone Driver"},
 344        {"VOUTRHP", NULL, "HeadPhone Driver"},
 345
 346        /* input mux */
 347        {"Left ADC", NULL, "Input Mux"},
 348        {"Input Mux", "Mic", "Mic LNA"},
 349        {"Input Mux", "Mic + Line R", "Mic LNA"},
 350        {"Input Mux", "Line L", "Left PGA"},
 351        {"Input Mux", "Line", "Left PGA"},
 352
 353        /* right input */
 354        {"Right ADC", "Mic + Line R", "Right PGA"},
 355        {"Right ADC", "Line", "Right PGA"},
 356
 357        /* inputs */
 358        {"Mic LNA", NULL, "VINM"},
 359        {"Left PGA", NULL, "VINL"},
 360        {"Right PGA", NULL, "VINR"},
 361};
 362
 363static int uda1380_add_widgets(struct snd_soc_codec *codec)
 364{
 365        snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
 366                                  ARRAY_SIZE(uda1380_dapm_widgets));
 367
 368        snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
 369
 370        snd_soc_dapm_new_widgets(codec);
 371        return 0;
 372}
 373
 374static int uda1380_set_dai_fmt(struct snd_soc_dai *codec_dai,
 375                unsigned int fmt)
 376{
 377        struct snd_soc_codec *codec = codec_dai->codec;
 378        int iface;
 379
 380        /* set up DAI based upon fmt */
 381        iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 382        iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
 383
 384        /* FIXME: how to select I2S for DATAO and MSB for DATAI correctly? */
 385        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 386        case SND_SOC_DAIFMT_I2S:
 387                iface |= R01_SFORI_I2S | R01_SFORO_I2S;
 388                break;
 389        case SND_SOC_DAIFMT_LSB:
 390                iface |= R01_SFORI_LSB16 | R01_SFORO_I2S;
 391                break;
 392        case SND_SOC_DAIFMT_MSB:
 393                iface |= R01_SFORI_MSB | R01_SFORO_I2S;
 394        }
 395
 396        if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
 397                iface |= R01_SIM;
 398
 399        uda1380_write(codec, UDA1380_IFACE, iface);
 400
 401        return 0;
 402}
 403
 404/*
 405 * Flush reg cache
 406 * We can only write the interpolator and decimator registers
 407 * when the DAI is being clocked by the CPU DAI. It's up to the
 408 * machine and cpu DAI driver to do this before we are called.
 409 */
 410static int uda1380_pcm_prepare(struct snd_pcm_substream *substream)
 411{
 412        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 413        struct snd_soc_device *socdev = rtd->socdev;
 414        struct snd_soc_codec *codec = socdev->codec;
 415        int reg, reg_start, reg_end, clk;
 416
 417        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 418                reg_start = UDA1380_MVOL;
 419                reg_end = UDA1380_MIXER;
 420        } else {
 421                reg_start = UDA1380_DEC;
 422                reg_end = UDA1380_AGC;
 423        }
 424
 425        /* FIXME disable DAC_CLK */
 426        clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 427        uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
 428
 429        for (reg = reg_start; reg <= reg_end; reg++) {
 430                pr_debug("uda1380: flush reg %x val %x:", reg,
 431                                uda1380_read_reg_cache(codec, reg));
 432                uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
 433        }
 434
 435        /* FIXME enable DAC_CLK */
 436        uda1380_write(codec, UDA1380_CLK, clk | R00_DAC_CLK);
 437
 438        return 0;
 439}
 440
 441static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
 442        struct snd_pcm_hw_params *params)
 443{
 444        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 445        struct snd_soc_device *socdev = rtd->socdev;
 446        struct snd_soc_codec *codec = socdev->codec;
 447        u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 448
 449        /* set WSPLL power and divider if running from this clock */
 450        if (clk & R00_DAC_CLK) {
 451                int rate = params_rate(params);
 452                u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 453                clk &= ~0x3; /* clear SEL_LOOP_DIV */
 454                switch (rate) {
 455                case 6250 ... 12500:
 456                        clk |= 0x0;
 457                        break;
 458                case 12501 ... 25000:
 459                        clk |= 0x1;
 460                        break;
 461                case 25001 ... 50000:
 462                        clk |= 0x2;
 463                        break;
 464                case 50001 ... 100000:
 465                        clk |= 0x3;
 466                        break;
 467                }
 468                uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
 469        }
 470
 471        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 472                clk |= R00_EN_DAC | R00_EN_INT;
 473        else
 474                clk |= R00_EN_ADC | R00_EN_DEC;
 475
 476        uda1380_write(codec, UDA1380_CLK, clk);
 477        return 0;
 478}
 479
 480static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream)
 481{
 482        struct snd_soc_pcm_runtime *rtd = substream->private_data;
 483        struct snd_soc_device *socdev = rtd->socdev;
 484        struct snd_soc_codec *codec = socdev->codec;
 485        u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 486
 487        /* shut down WSPLL power if running from this clock */
 488        if (clk & R00_DAC_CLK) {
 489                u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 490                uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
 491        }
 492
 493        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 494                clk &= ~(R00_EN_DAC | R00_EN_INT);
 495        else
 496                clk &= ~(R00_EN_ADC | R00_EN_DEC);
 497
 498        uda1380_write(codec, UDA1380_CLK, clk);
 499}
 500
 501static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute)
 502{
 503        struct snd_soc_codec *codec = codec_dai->codec;
 504        u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
 505
 506        /* FIXME: mute(codec,0) is called when the magician clock is already
 507         * set to WSPLL, but for some unknown reason writing to interpolator
 508         * registers works only when clocked by SYSCLK */
 509        u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 510        uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
 511        if (mute)
 512                uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
 513        else
 514                uda1380_write(codec, UDA1380_DEEMP, mute_reg);
 515        uda1380_write(codec, UDA1380_CLK, clk);
 516        return 0;
 517}
 518
 519static int uda1380_set_bias_level(struct snd_soc_codec *codec,
 520        enum snd_soc_bias_level level)
 521{
 522        int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 523
 524        switch (level) {
 525        case SND_SOC_BIAS_ON:
 526        case SND_SOC_BIAS_PREPARE:
 527                uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
 528                break;
 529        case SND_SOC_BIAS_STANDBY:
 530                uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
 531                break;
 532        case SND_SOC_BIAS_OFF:
 533                uda1380_write(codec, UDA1380_PM, 0x0);
 534                break;
 535        }
 536        codec->bias_level = level;
 537        return 0;
 538}
 539
 540#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
 541                       SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
 542                       SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
 543
 544struct snd_soc_dai uda1380_dai[] = {
 545{
 546        .name = "UDA1380",
 547        .playback = {
 548                .stream_name = "Playback",
 549                .channels_min = 1,
 550                .channels_max = 2,
 551                .rates = UDA1380_RATES,
 552                .formats = SNDRV_PCM_FMTBIT_S16_LE,},
 553        .capture = {
 554                .stream_name = "Capture",
 555                .channels_min = 1,
 556                .channels_max = 2,
 557                .rates = UDA1380_RATES,
 558                .formats = SNDRV_PCM_FMTBIT_S16_LE,},
 559        .ops = {
 560                .hw_params = uda1380_pcm_hw_params,
 561                .shutdown = uda1380_pcm_shutdown,
 562                .prepare = uda1380_pcm_prepare,
 563        },
 564        .dai_ops = {
 565                .digital_mute = uda1380_mute,
 566                .set_fmt = uda1380_set_dai_fmt,
 567        },
 568},
 569{ /* playback only - dual interface */
 570        .name = "UDA1380",
 571        .playback = {
 572                .stream_name = "Playback",
 573                .channels_min = 1,
 574                .channels_max = 2,
 575                .rates = UDA1380_RATES,
 576                .formats = SNDRV_PCM_FMTBIT_S16_LE,
 577        },
 578        .ops = {
 579                .hw_params = uda1380_pcm_hw_params,
 580                .shutdown = uda1380_pcm_shutdown,
 581                .prepare = uda1380_pcm_prepare,
 582        },
 583        .dai_ops = {
 584                .digital_mute = uda1380_mute,
 585                .set_fmt = uda1380_set_dai_fmt,
 586        },
 587},
 588{ /* capture only - dual interface*/
 589        .name = "UDA1380",
 590        .capture = {
 591                .stream_name = "Capture",
 592                .channels_min = 1,
 593                .channels_max = 2,
 594                .rates = UDA1380_RATES,
 595                .formats = SNDRV_PCM_FMTBIT_S16_LE,
 596        },
 597        .ops = {
 598                .hw_params = uda1380_pcm_hw_params,
 599                .shutdown = uda1380_pcm_shutdown,
 600                .prepare = uda1380_pcm_prepare,
 601        },
 602        .dai_ops = {
 603                .set_fmt = uda1380_set_dai_fmt,
 604        },
 605},
 606};
 607EXPORT_SYMBOL_GPL(uda1380_dai);
 608
 609static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
 610{
 611        struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 612        struct snd_soc_codec *codec = socdev->codec;
 613
 614        uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
 615        return 0;
 616}
 617
 618static int uda1380_resume(struct platform_device *pdev)
 619{
 620        struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 621        struct snd_soc_codec *codec = socdev->codec;
 622        int i;
 623        u8 data[2];
 624        u16 *cache = codec->reg_cache;
 625
 626        /* Sync reg_cache with the hardware */
 627        for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
 628                data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
 629                data[1] = cache[i] & 0x00ff;
 630                codec->hw_write(codec->control_data, data, 2);
 631        }
 632        uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 633        uda1380_set_bias_level(codec, codec->suspend_bias_level);
 634        return 0;
 635}
 636
 637/*
 638 * initialise the UDA1380 driver
 639 * register mixer and dsp interfaces with the kernel
 640 */
 641static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
 642{
 643        struct snd_soc_codec *codec = socdev->codec;
 644        int ret = 0;
 645
 646        codec->name = "UDA1380";
 647        codec->owner = THIS_MODULE;
 648        codec->read = uda1380_read_reg_cache;
 649        codec->write = uda1380_write;
 650        codec->set_bias_level = uda1380_set_bias_level;
 651        codec->dai = uda1380_dai;
 652        codec->num_dai = ARRAY_SIZE(uda1380_dai);
 653        codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
 654                                   GFP_KERNEL);
 655        if (codec->reg_cache == NULL)
 656                return -ENOMEM;
 657        codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
 658        codec->reg_cache_step = 1;
 659        uda1380_reset(codec);
 660
 661        /* register pcms */
 662        ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
 663        if (ret < 0) {
 664                pr_err("uda1380: failed to create pcms\n");
 665                goto pcm_err;
 666        }
 667
 668        /* power on device */
 669        uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 670        /* set clock input */
 671        switch (dac_clk) {
 672        case UDA1380_DAC_CLK_SYSCLK:
 673                uda1380_write(codec, UDA1380_CLK, 0);
 674                break;
 675        case UDA1380_DAC_CLK_WSPLL:
 676                uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
 677                break;
 678        }
 679
 680        /* uda1380 init */
 681        uda1380_add_controls(codec);
 682        uda1380_add_widgets(codec);
 683        ret = snd_soc_register_card(socdev);
 684        if (ret < 0) {
 685                pr_err("uda1380: failed to register card\n");
 686                goto card_err;
 687        }
 688
 689        return ret;
 690
 691card_err:
 692        snd_soc_free_pcms(socdev);
 693        snd_soc_dapm_free(socdev);
 694pcm_err:
 695        kfree(codec->reg_cache);
 696        return ret;
 697}
 698
 699static struct snd_soc_device *uda1380_socdev;
 700
 701#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 702
 703static int uda1380_i2c_probe(struct i2c_client *i2c,
 704                             const struct i2c_device_id *id)
 705{
 706        struct snd_soc_device *socdev = uda1380_socdev;
 707        struct uda1380_setup_data *setup = socdev->codec_data;
 708        struct snd_soc_codec *codec = socdev->codec;
 709        int ret;
 710
 711        i2c_set_clientdata(i2c, codec);
 712        codec->control_data = i2c;
 713
 714        ret = uda1380_init(socdev, setup->dac_clk);
 715        if (ret < 0)
 716                pr_err("uda1380: failed to initialise UDA1380\n");
 717
 718        return ret;
 719}
 720
 721static int uda1380_i2c_remove(struct i2c_client *client)
 722{
 723        struct snd_soc_codec *codec = i2c_get_clientdata(client);
 724        kfree(codec->reg_cache);
 725        return 0;
 726}
 727
 728static const struct i2c_device_id uda1380_i2c_id[] = {
 729        { "uda1380", 0 },
 730        { }
 731};
 732MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
 733
 734static struct i2c_driver uda1380_i2c_driver = {
 735        .driver = {
 736                .name =  "UDA1380 I2C Codec",
 737                .owner = THIS_MODULE,
 738        },
 739        .probe =    uda1380_i2c_probe,
 740        .remove =   uda1380_i2c_remove,
 741        .id_table = uda1380_i2c_id,
 742};
 743
 744static int uda1380_add_i2c_device(struct platform_device *pdev,
 745                                  const struct uda1380_setup_data *setup)
 746{
 747        struct i2c_board_info info;
 748        struct i2c_adapter *adapter;
 749        struct i2c_client *client;
 750        int ret;
 751
 752        ret = i2c_add_driver(&uda1380_i2c_driver);
 753        if (ret != 0) {
 754                dev_err(&pdev->dev, "can't add i2c driver\n");
 755                return ret;
 756        }
 757
 758        memset(&info, 0, sizeof(struct i2c_board_info));
 759        info.addr = setup->i2c_address;
 760        strlcpy(info.type, "uda1380", I2C_NAME_SIZE);
 761
 762        adapter = i2c_get_adapter(setup->i2c_bus);
 763        if (!adapter) {
 764                dev_err(&pdev->dev, "can't get i2c adapter %d\n",
 765                        setup->i2c_bus);
 766                goto err_driver;
 767        }
 768
 769        client = i2c_new_device(adapter, &info);
 770        i2c_put_adapter(adapter);
 771        if (!client) {
 772                dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
 773                        (unsigned int)info.addr);
 774                goto err_driver;
 775        }
 776
 777        return 0;
 778
 779err_driver:
 780        i2c_del_driver(&uda1380_i2c_driver);
 781        return -ENODEV;
 782}
 783#endif
 784
 785static int uda1380_probe(struct platform_device *pdev)
 786{
 787        struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 788        struct uda1380_setup_data *setup;
 789        struct snd_soc_codec *codec;
 790        int ret;
 791
 792        pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION);
 793
 794        setup = socdev->codec_data;
 795        codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
 796        if (codec == NULL)
 797                return -ENOMEM;
 798
 799        socdev->codec = codec;
 800        mutex_init(&codec->mutex);
 801        INIT_LIST_HEAD(&codec->dapm_widgets);
 802        INIT_LIST_HEAD(&codec->dapm_paths);
 803
 804        uda1380_socdev = socdev;
 805        ret = -ENODEV;
 806
 807#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 808        if (setup->i2c_address) {
 809                codec->hw_write = (hw_write_t)i2c_master_send;
 810                ret = uda1380_add_i2c_device(pdev, setup);
 811        }
 812#endif
 813
 814        if (ret != 0)
 815                kfree(codec);
 816        return ret;
 817}
 818
 819/* power down chip */
 820static int uda1380_remove(struct platform_device *pdev)
 821{
 822        struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 823        struct snd_soc_codec *codec = socdev->codec;
 824
 825        if (codec->control_data)
 826                uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
 827
 828        snd_soc_free_pcms(socdev);
 829        snd_soc_dapm_free(socdev);
 830#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 831        i2c_unregister_device(codec->control_data);
 832        i2c_del_driver(&uda1380_i2c_driver);
 833#endif
 834        kfree(codec);
 835
 836        return 0;
 837}
 838
 839struct snd_soc_codec_device soc_codec_dev_uda1380 = {
 840        .probe =        uda1380_probe,
 841        .remove =       uda1380_remove,
 842        .suspend =      uda1380_suspend,
 843        .resume =       uda1380_resume,
 844};
 845EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380);
 846
 847MODULE_AUTHOR("Giorgio Padrin");
 848MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
 849MODULE_LICENSE("GPL");
 850