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13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
19#include <linux/serial_core.h>
20#include <linux/platform_device.h>
21#include <linux/sysdev.h>
22#include <linux/clk.h>
23#include <linux/io.h>
24
25#include <asm/mach/arch.h>
26#include <asm/mach/map.h>
27#include <asm/mach/irq.h>
28
29#include <mach/hardware.h>
30#include <asm/irq.h>
31
32#include <mach/regs-clock.h>
33#include <plat/regs-serial.h>
34#include <mach/regs-gpio.h>
35#include <mach/regs-gpioj.h>
36#include <mach/regs-dsc.h>
37
38#include <plat/s3c2410.h>
39#include <plat/s3c2440.h>
40#include "s3c244x.h"
41#include <plat/clock.h>
42#include <plat/devs.h>
43#include <plat/cpu.h>
44#include <plat/pm.h>
45
46static struct map_desc s3c244x_iodesc[] __initdata = {
47 IODESC_ENT(CLKPWR),
48 IODESC_ENT(TIMER),
49 IODESC_ENT(WATCHDOG),
50};
51
52
53
54void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
55{
56 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
57}
58
59void __init s3c244x_map_io(struct map_desc *mach_desc, int size)
60{
61
62
63 iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
64 iotable_init(mach_desc, size);
65
66
67
68 s3c_device_sdi.name = "s3c2440-sdi";
69 s3c_device_i2c.name = "s3c2440-i2c";
70 s3c_device_nand.name = "s3c2440-nand";
71 s3c_device_usbgadget.name = "s3c2440-usbgadget";
72}
73
74void __init s3c244x_init_clocks(int xtal)
75{
76 unsigned long clkdiv;
77 unsigned long camdiv;
78 unsigned long hclk, fclk, pclk;
79 int hdiv = 1;
80
81
82
83
84 fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
85
86 clkdiv = __raw_readl(S3C2410_CLKDIVN);
87 camdiv = __raw_readl(S3C2440_CAMDIVN);
88
89
90
91 switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
92 case S3C2440_CLKDIVN_HDIVN_1:
93 hdiv = 1;
94 break;
95
96 case S3C2440_CLKDIVN_HDIVN_2:
97 hdiv = 2;
98 break;
99
100 case S3C2440_CLKDIVN_HDIVN_4_8:
101 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
102 break;
103
104 case S3C2440_CLKDIVN_HDIVN_3_6:
105 hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
106 break;
107 }
108
109 hclk = fclk / hdiv;
110 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
111
112
113
114 printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
115 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
116
117
118
119
120
121 s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
122 s3c2410_baseclk_add();
123}
124
125#ifdef CONFIG_PM
126
127static struct sleep_save s3c244x_sleep[] = {
128 SAVE_ITEM(S3C2440_DSC0),
129 SAVE_ITEM(S3C2440_DSC1),
130 SAVE_ITEM(S3C2440_GPJDAT),
131 SAVE_ITEM(S3C2440_GPJCON),
132 SAVE_ITEM(S3C2440_GPJUP)
133};
134
135static int s3c244x_suspend(struct sys_device *dev, pm_message_t state)
136{
137 s3c2410_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
138 return 0;
139}
140
141static int s3c244x_resume(struct sys_device *dev)
142{
143 s3c2410_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
144 return 0;
145}
146
147#else
148#define s3c244x_suspend NULL
149#define s3c244x_resume NULL
150#endif
151
152
153
154struct sysdev_class s3c2440_sysclass = {
155 .name = "s3c2440-core",
156 .suspend = s3c244x_suspend,
157 .resume = s3c244x_resume
158};
159
160struct sysdev_class s3c2442_sysclass = {
161 .name = "s3c2442-core",
162 .suspend = s3c244x_suspend,
163 .resume = s3c244x_resume
164};
165
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170
171
172static int __init s3c2440_core_init(void)
173{
174 return sysdev_class_register(&s3c2440_sysclass);
175}
176
177core_initcall(s3c2440_core_init);
178
179static int __init s3c2442_core_init(void)
180{
181 return sysdev_class_register(&s3c2442_sysclass);
182}
183
184core_initcall(s3c2442_core_init);
185