linux/arch/arm/plat-omap/include/mach/clock.h
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   1/*
   2 *  arch/arm/plat-omap/include/mach/clock.h
   3 *
   4 *  Copyright (C) 2004 - 2005 Nokia corporation
   5 *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
   6 *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12
  13#ifndef __ARCH_ARM_OMAP_CLOCK_H
  14#define __ARCH_ARM_OMAP_CLOCK_H
  15
  16struct module;
  17struct clk;
  18struct clockdomain;
  19
  20#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  21
  22struct clksel_rate {
  23        u8                      div;
  24        u32                     val;
  25        u8                      flags;
  26};
  27
  28struct clksel {
  29        struct clk               *parent;
  30        const struct clksel_rate *rates;
  31};
  32
  33struct dpll_data {
  34        void __iomem            *mult_div1_reg;
  35        u32                     mult_mask;
  36        u32                     div1_mask;
  37        u16                     last_rounded_m;
  38        u8                      last_rounded_n;
  39        unsigned long           last_rounded_rate;
  40        unsigned int            rate_tolerance;
  41        u16                     max_multiplier;
  42        u8                      max_divider;
  43        u32                     max_tolerance;
  44#  if defined(CONFIG_ARCH_OMAP3)
  45        u8                      modes;
  46        void __iomem            *control_reg;
  47        u32                     enable_mask;
  48        u8                      auto_recal_bit;
  49        u8                      recal_en_bit;
  50        u8                      recal_st_bit;
  51        void __iomem            *autoidle_reg;
  52        u32                     autoidle_mask;
  53        void __iomem            *idlest_reg;
  54        u8                      idlest_bit;
  55#  endif
  56};
  57
  58#endif
  59
  60struct clk {
  61        struct list_head        node;
  62        struct module           *owner;
  63        const char              *name;
  64        int                     id;
  65        struct clk              *parent;
  66        unsigned long           rate;
  67        __u32                   flags;
  68        void __iomem            *enable_reg;
  69        __u8                    enable_bit;
  70        __s8                    usecount;
  71        void                    (*recalc)(struct clk *);
  72        int                     (*set_rate)(struct clk *, unsigned long);
  73        long                    (*round_rate)(struct clk *, unsigned long);
  74        void                    (*init)(struct clk *);
  75        int                     (*enable)(struct clk *);
  76        void                    (*disable)(struct clk *);
  77#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  78        u8                      fixed_div;
  79        void __iomem            *clksel_reg;
  80        u32                     clksel_mask;
  81        const struct clksel     *clksel;
  82        struct dpll_data        *dpll_data;
  83        const char              *clkdm_name;
  84        struct clockdomain      *clkdm;
  85#else
  86        __u8                    rate_offset;
  87        __u8                    src_offset;
  88#endif
  89#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
  90        struct dentry           *dent;  /* For visible tree hierarchy */
  91#endif
  92};
  93
  94struct cpufreq_frequency_table;
  95
  96struct clk_functions {
  97        int             (*clk_enable)(struct clk *clk);
  98        void            (*clk_disable)(struct clk *clk);
  99        long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
 100        int             (*clk_set_rate)(struct clk *clk, unsigned long rate);
 101        int             (*clk_set_parent)(struct clk *clk, struct clk *parent);
 102        struct clk *    (*clk_get_parent)(struct clk *clk);
 103        void            (*clk_allow_idle)(struct clk *clk);
 104        void            (*clk_deny_idle)(struct clk *clk);
 105        void            (*clk_disable_unused)(struct clk *clk);
 106#ifdef CONFIG_CPU_FREQ
 107        void            (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
 108#endif
 109};
 110
 111extern unsigned int mpurate;
 112
 113extern int clk_init(struct clk_functions * custom_clocks);
 114extern int clk_register(struct clk *clk);
 115extern void clk_unregister(struct clk *clk);
 116extern void propagate_rate(struct clk *clk);
 117extern void recalculate_root_clocks(void);
 118extern void followparent_recalc(struct clk * clk);
 119extern void clk_allow_idle(struct clk *clk);
 120extern void clk_deny_idle(struct clk *clk);
 121extern int clk_get_usecount(struct clk *clk);
 122extern void clk_enable_init_clocks(void);
 123
 124/* Clock flags */
 125#define RATE_CKCTL              (1 << 0)        /* Main fixed ratio clocks */
 126#define RATE_FIXED              (1 << 1)        /* Fixed clock rate */
 127#define RATE_PROPAGATES         (1 << 2)        /* Program children too */
 128#define VIRTUAL_CLOCK           (1 << 3)        /* Composite clock from table */
 129#define ALWAYS_ENABLED          (1 << 4)        /* Clock cannot be disabled */
 130#define ENABLE_REG_32BIT        (1 << 5)        /* Use 32-bit access */
 131#define VIRTUAL_IO_ADDRESS      (1 << 6)        /* Clock in virtual address */
 132#define CLOCK_IDLE_CONTROL      (1 << 7)
 133#define CLOCK_NO_IDLE_PARENT    (1 << 8)
 134#define DELAYED_APP             (1 << 9)        /* Delay application of clock */
 135#define CONFIG_PARTICIPANT      (1 << 10)       /* Fundamental clock */
 136#define ENABLE_ON_INIT          (1 << 11)       /* Enable upon framework init */
 137#define INVERT_ENABLE           (1 << 12)       /* 0 enables, 1 disables */
 138/* bits 13-20 are currently free */
 139#define CLOCK_IN_OMAP310        (1 << 21)
 140#define CLOCK_IN_OMAP730        (1 << 22)
 141#define CLOCK_IN_OMAP1510       (1 << 23)
 142#define CLOCK_IN_OMAP16XX       (1 << 24)
 143#define CLOCK_IN_OMAP242X       (1 << 25)
 144#define CLOCK_IN_OMAP243X       (1 << 26)
 145#define CLOCK_IN_OMAP343X       (1 << 27)       /* clocks common to all 343X */
 146#define PARENT_CONTROLS_CLOCK   (1 << 28)
 147#define CLOCK_IN_OMAP3430ES1    (1 << 29)       /* 3430ES1 clocks only */
 148#define CLOCK_IN_OMAP3430ES2    (1 << 30)       /* 3430ES2 clocks only */
 149
 150/* Clksel_rate flags */
 151#define DEFAULT_RATE            (1 << 0)
 152#define RATE_IN_242X            (1 << 1)
 153#define RATE_IN_243X            (1 << 2)
 154#define RATE_IN_343X            (1 << 3)        /* rates common to all 343X */
 155#define RATE_IN_3430ES2         (1 << 4)        /* 3430ES2 rates only */
 156
 157#define RATE_IN_24XX            (RATE_IN_242X | RATE_IN_243X)
 158
 159
 160/* CM_CLKSEL2_PLL.CORE_CLK_SRC options (24XX) */
 161#define CORE_CLK_SRC_32K                0
 162#define CORE_CLK_SRC_DPLL               1
 163#define CORE_CLK_SRC_DPLL_X2            2
 164
 165#endif
 166
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