linux/include/linux/spi/spi.h
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   1/*
   2 * Copyright (C) 2005 David Brownell
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License as published by
   6 * the Free Software Foundation; either version 2 of the License, or
   7 * (at your option) any later version.
   8 *
   9 * This program is distributed in the hope that it will be useful,
  10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 * GNU General Public License for more details.
  13 *
  14 * You should have received a copy of the GNU General Public License
  15 * along with this program; if not, write to the Free Software
  16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17 */
  18
  19#ifndef __LINUX_SPI_H
  20#define __LINUX_SPI_H
  21
  22/*
  23 * INTERFACES between SPI master-side drivers and SPI infrastructure.
  24 * (There's no SPI slave support for Linux yet...)
  25 */
  26extern struct bus_type spi_bus_type;
  27
  28/**
  29 * struct spi_device - Master side proxy for an SPI slave device
  30 * @dev: Driver model representation of the device.
  31 * @master: SPI controller used with the device.
  32 * @max_speed_hz: Maximum clock rate to be used with this chip
  33 *      (on this board); may be changed by the device's driver.
  34 *      The spi_transfer.speed_hz can override this for each transfer.
  35 * @chip_select: Chipselect, distinguishing chips handled by @master.
  36 * @mode: The spi mode defines how data is clocked out and in.
  37 *      This may be changed by the device's driver.
  38 *      The "active low" default for chipselect mode can be overridden
  39 *      (by specifying SPI_CS_HIGH) as can the "MSB first" default for
  40 *      each word in a transfer (by specifying SPI_LSB_FIRST).
  41 * @bits_per_word: Data transfers involve one or more words; word sizes
  42 *      like eight or 12 bits are common.  In-memory wordsizes are
  43 *      powers of two bytes (e.g. 20 bit samples use 32 bits).
  44 *      This may be changed by the device's driver, or left at the
  45 *      default (0) indicating protocol words are eight bit bytes.
  46 *      The spi_transfer.bits_per_word can override this for each transfer.
  47 * @irq: Negative, or the number passed to request_irq() to receive
  48 *      interrupts from this device.
  49 * @controller_state: Controller's runtime state
  50 * @controller_data: Board-specific definitions for controller, such as
  51 *      FIFO initialization parameters; from board_info.controller_data
  52 * @modalias: Name of the driver to use with this device, or an alias
  53 *      for that name.  This appears in the sysfs "modalias" attribute
  54 *      for driver coldplugging, and in uevents used for hotplugging
  55 *
  56 * A @spi_device is used to interchange data between an SPI slave
  57 * (usually a discrete chip) and CPU memory.
  58 *
  59 * In @dev, the platform_data is used to hold information about this
  60 * device that's meaningful to the device's protocol driver, but not
  61 * to its controller.  One example might be an identifier for a chip
  62 * variant with slightly different functionality; another might be
  63 * information about how this particular board wires the chip's pins.
  64 */
  65struct spi_device {
  66        struct device           dev;
  67        struct spi_master       *master;
  68        u32                     max_speed_hz;
  69        u8                      chip_select;
  70        u8                      mode;
  71#define SPI_CPHA        0x01                    /* clock phase */
  72#define SPI_CPOL        0x02                    /* clock polarity */
  73#define SPI_MODE_0      (0|0)                   /* (original MicroWire) */
  74#define SPI_MODE_1      (0|SPI_CPHA)
  75#define SPI_MODE_2      (SPI_CPOL|0)
  76#define SPI_MODE_3      (SPI_CPOL|SPI_CPHA)
  77#define SPI_CS_HIGH     0x04                    /* chipselect active high? */
  78#define SPI_LSB_FIRST   0x08                    /* per-word bits-on-wire */
  79#define SPI_3WIRE       0x10                    /* SI/SO signals shared */
  80#define SPI_LOOP        0x20                    /* loopback mode */
  81        u8                      bits_per_word;
  82        int                     irq;
  83        void                    *controller_state;
  84        void                    *controller_data;
  85        char                    modalias[32];
  86
  87        /*
  88         * likely need more hooks for more protocol options affecting how
  89         * the controller talks to each chip, like:
  90         *  - memory packing (12 bit samples into low bits, others zeroed)
  91         *  - priority
  92         *  - drop chipselect after each word
  93         *  - chipselect delays
  94         *  - ...
  95         */
  96};
  97
  98static inline struct spi_device *to_spi_device(struct device *dev)
  99{
 100        return dev ? container_of(dev, struct spi_device, dev) : NULL;
 101}
 102
 103/* most drivers won't need to care about device refcounting */
 104static inline struct spi_device *spi_dev_get(struct spi_device *spi)
 105{
 106        return (spi && get_device(&spi->dev)) ? spi : NULL;
 107}
 108
 109static inline void spi_dev_put(struct spi_device *spi)
 110{
 111        if (spi)
 112                put_device(&spi->dev);
 113}
 114
 115/* ctldata is for the bus_master driver's runtime state */
 116static inline void *spi_get_ctldata(struct spi_device *spi)
 117{
 118        return spi->controller_state;
 119}
 120
 121static inline void spi_set_ctldata(struct spi_device *spi, void *state)
 122{
 123        spi->controller_state = state;
 124}
 125
 126/* device driver data */
 127
 128static inline void spi_set_drvdata(struct spi_device *spi, void *data)
 129{
 130        dev_set_drvdata(&spi->dev, data);
 131}
 132
 133static inline void *spi_get_drvdata(struct spi_device *spi)
 134{
 135        return dev_get_drvdata(&spi->dev);
 136}
 137
 138struct spi_message;
 139
 140
 141
 142/**
 143 * struct spi_driver - Host side "protocol" driver
 144 * @probe: Binds this driver to the spi device.  Drivers can verify
 145 *      that the device is actually present, and may need to configure
 146 *      characteristics (such as bits_per_word) which weren't needed for
 147 *      the initial configuration done during system setup.
 148 * @remove: Unbinds this driver from the spi device
 149 * @shutdown: Standard shutdown callback used during system state
 150 *      transitions such as powerdown/halt and kexec
 151 * @suspend: Standard suspend callback used during system state transitions
 152 * @resume: Standard resume callback used during system state transitions
 153 * @driver: SPI device drivers should initialize the name and owner
 154 *      field of this structure.
 155 *
 156 * This represents the kind of device driver that uses SPI messages to
 157 * interact with the hardware at the other end of a SPI link.  It's called
 158 * a "protocol" driver because it works through messages rather than talking
 159 * directly to SPI hardware (which is what the underlying SPI controller
 160 * driver does to pass those messages).  These protocols are defined in the
 161 * specification for the device(s) supported by the driver.
 162 *
 163 * As a rule, those device protocols represent the lowest level interface
 164 * supported by a driver, and it will support upper level interfaces too.
 165 * Examples of such upper levels include frameworks like MTD, networking,
 166 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
 167 */
 168struct spi_driver {
 169        int                     (*probe)(struct spi_device *spi);
 170        int                     (*remove)(struct spi_device *spi);
 171        void                    (*shutdown)(struct spi_device *spi);
 172        int                     (*suspend)(struct spi_device *spi, pm_message_t mesg);
 173        int                     (*resume)(struct spi_device *spi);
 174        struct device_driver    driver;
 175};
 176
 177static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
 178{
 179        return drv ? container_of(drv, struct spi_driver, driver) : NULL;
 180}
 181
 182extern int spi_register_driver(struct spi_driver *sdrv);
 183
 184/**
 185 * spi_unregister_driver - reverse effect of spi_register_driver
 186 * @sdrv: the driver to unregister
 187 * Context: can sleep
 188 */
 189static inline void spi_unregister_driver(struct spi_driver *sdrv)
 190{
 191        if (sdrv)
 192                driver_unregister(&sdrv->driver);
 193}
 194
 195
 196/**
 197 * struct spi_master - interface to SPI master controller
 198 * @dev: device interface to this driver
 199 * @bus_num: board-specific (and often SOC-specific) identifier for a
 200 *      given SPI controller.
 201 * @num_chipselect: chipselects are used to distinguish individual
 202 *      SPI slaves, and are numbered from zero to num_chipselects.
 203 *      each slave has a chipselect signal, but it's common that not
 204 *      every chipselect is connected to a slave.
 205 * @setup: updates the device mode and clocking records used by a
 206 *      device's SPI controller; protocol code may call this.  This
 207 *      must fail if an unrecognized or unsupported mode is requested.
 208 *      It's always safe to call this unless transfers are pending on
 209 *      the device whose settings are being modified.
 210 * @transfer: adds a message to the controller's transfer queue.
 211 * @cleanup: frees controller-specific state
 212 *
 213 * Each SPI master controller can communicate with one or more @spi_device
 214 * children.  These make a small bus, sharing MOSI, MISO and SCK signals
 215 * but not chip select signals.  Each device may be configured to use a
 216 * different clock rate, since those shared signals are ignored unless
 217 * the chip is selected.
 218 *
 219 * The driver for an SPI controller manages access to those devices through
 220 * a queue of spi_message transactions, copying data between CPU memory and
 221 * an SPI slave device.  For each such message it queues, it calls the
 222 * message's completion function when the transaction completes.
 223 */
 224struct spi_master {
 225        struct device   dev;
 226
 227        /* other than negative (== assign one dynamically), bus_num is fully
 228         * board-specific.  usually that simplifies to being SOC-specific.
 229         * example:  one SOC has three SPI controllers, numbered 0..2,
 230         * and one board's schematics might show it using SPI-2.  software
 231         * would normally use bus_num=2 for that controller.
 232         */
 233        s16                     bus_num;
 234
 235        /* chipselects will be integral to many controllers; some others
 236         * might use board-specific GPIOs.
 237         */
 238        u16                     num_chipselect;
 239
 240        /* setup mode and clock, etc (spi driver may call many times) */
 241        int                     (*setup)(struct spi_device *spi);
 242
 243        /* bidirectional bulk transfers
 244         *
 245         * + The transfer() method may not sleep; its main role is
 246         *   just to add the message to the queue.
 247         * + For now there's no remove-from-queue operation, or
 248         *   any other request management
 249         * + To a given spi_device, message queueing is pure fifo
 250         *
 251         * + The master's main job is to process its message queue,
 252         *   selecting a chip then transferring data
 253         * + If there are multiple spi_device children, the i/o queue
 254         *   arbitration algorithm is unspecified (round robin, fifo,
 255         *   priority, reservations, preemption, etc)
 256         *
 257         * + Chipselect stays active during the entire message
 258         *   (unless modified by spi_transfer.cs_change != 0).
 259         * + The message transfers use clock and SPI mode parameters
 260         *   previously established by setup() for this device
 261         */
 262        int                     (*transfer)(struct spi_device *spi,
 263                                                struct spi_message *mesg);
 264
 265        /* called on release() to free memory provided by spi_master */
 266        void                    (*cleanup)(struct spi_device *spi);
 267};
 268
 269static inline void *spi_master_get_devdata(struct spi_master *master)
 270{
 271        return dev_get_drvdata(&master->dev);
 272}
 273
 274static inline void spi_master_set_devdata(struct spi_master *master, void *data)
 275{
 276        dev_set_drvdata(&master->dev, data);
 277}
 278
 279static inline struct spi_master *spi_master_get(struct spi_master *master)
 280{
 281        if (!master || !get_device(&master->dev))
 282                return NULL;
 283        return master;
 284}
 285
 286static inline void spi_master_put(struct spi_master *master)
 287{
 288        if (master)
 289                put_device(&master->dev);
 290}
 291
 292
 293/* the spi driver core manages memory for the spi_master classdev */
 294extern struct spi_master *
 295spi_alloc_master(struct device *host, unsigned size);
 296
 297extern int spi_register_master(struct spi_master *master);
 298extern void spi_unregister_master(struct spi_master *master);
 299
 300extern struct spi_master *spi_busnum_to_master(u16 busnum);
 301
 302/*---------------------------------------------------------------------------*/
 303
 304/*
 305 * I/O INTERFACE between SPI controller and protocol drivers
 306 *
 307 * Protocol drivers use a queue of spi_messages, each transferring data
 308 * between the controller and memory buffers.
 309 *
 310 * The spi_messages themselves consist of a series of read+write transfer
 311 * segments.  Those segments always read the same number of bits as they
 312 * write; but one or the other is easily ignored by passing a null buffer
 313 * pointer.  (This is unlike most types of I/O API, because SPI hardware
 314 * is full duplex.)
 315 *
 316 * NOTE:  Allocation of spi_transfer and spi_message memory is entirely
 317 * up to the protocol driver, which guarantees the integrity of both (as
 318 * well as the data buffers) for as long as the message is queued.
 319 */
 320
 321/**
 322 * struct spi_transfer - a read/write buffer pair
 323 * @tx_buf: data to be written (dma-safe memory), or NULL
 324 * @rx_buf: data to be read (dma-safe memory), or NULL
 325 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
 326 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
 327 * @len: size of rx and tx buffers (in bytes)
 328 * @speed_hz: Select a speed other then the device default for this
 329 *      transfer. If 0 the default (from @spi_device) is used.
 330 * @bits_per_word: select a bits_per_word other then the device default
 331 *      for this transfer. If 0 the default (from @spi_device) is used.
 332 * @cs_change: affects chipselect after this transfer completes
 333 * @delay_usecs: microseconds to delay after this transfer before
 334 *      (optionally) changing the chipselect status, then starting
 335 *      the next transfer or completing this @spi_message.
 336 * @transfer_list: transfers are sequenced through @spi_message.transfers
 337 *
 338 * SPI transfers always write the same number of bytes as they read.
 339 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
 340 * In some cases, they may also want to provide DMA addresses for
 341 * the data being transferred; that may reduce overhead, when the
 342 * underlying driver uses dma.
 343 *
 344 * If the transmit buffer is null, zeroes will be shifted out
 345 * while filling @rx_buf.  If the receive buffer is null, the data
 346 * shifted in will be discarded.  Only "len" bytes shift out (or in).
 347 * It's an error to try to shift out a partial word.  (For example, by
 348 * shifting out three bytes with word size of sixteen or twenty bits;
 349 * the former uses two bytes per word, the latter uses four bytes.)
 350 *
 351 * In-memory data values are always in native CPU byte order, translated
 352 * from the wire byte order (big-endian except with SPI_LSB_FIRST).  So
 353 * for example when bits_per_word is sixteen, buffers are 2N bytes long
 354 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
 355 *
 356 * When the word size of the SPI transfer is not a power-of-two multiple
 357 * of eight bits, those in-memory words include extra bits.  In-memory
 358 * words are always seen by protocol drivers as right-justified, so the
 359 * undefined (rx) or unused (tx) bits are always the most significant bits.
 360 *
 361 * All SPI transfers start with the relevant chipselect active.  Normally
 362 * it stays selected until after the last transfer in a message.  Drivers
 363 * can affect the chipselect signal using cs_change.
 364 *
 365 * (i) If the transfer isn't the last one in the message, this flag is
 366 * used to make the chipselect briefly go inactive in the middle of the
 367 * message.  Toggling chipselect in this way may be needed to terminate
 368 * a chip command, letting a single spi_message perform all of group of
 369 * chip transactions together.
 370 *
 371 * (ii) When the transfer is the last one in the message, the chip may
 372 * stay selected until the next transfer.  On multi-device SPI busses
 373 * with nothing blocking messages going to other devices, this is just
 374 * a performance hint; starting a message to another device deselects
 375 * this one.  But in other cases, this can be used to ensure correctness.
 376 * Some devices need protocol transactions to be built from a series of
 377 * spi_message submissions, where the content of one message is determined
 378 * by the results of previous messages and where the whole transaction
 379 * ends when the chipselect goes intactive.
 380 *
 381 * The code that submits an spi_message (and its spi_transfers)
 382 * to the lower layers is responsible for managing its memory.
 383 * Zero-initialize every field you don't set up explicitly, to
 384 * insulate against future API updates.  After you submit a message
 385 * and its transfers, ignore them until its completion callback.
 386 */
 387struct spi_transfer {
 388        /* it's ok if tx_buf == rx_buf (right?)
 389         * for MicroWire, one buffer must be null
 390         * buffers must work with dma_*map_single() calls, unless
 391         *   spi_message.is_dma_mapped reports a pre-existing mapping
 392         */
 393        const void      *tx_buf;
 394        void            *rx_buf;
 395        unsigned        len;
 396
 397        dma_addr_t      tx_dma;
 398        dma_addr_t      rx_dma;
 399
 400        unsigned        cs_change:1;
 401        u8              bits_per_word;
 402        u16             delay_usecs;
 403        u32             speed_hz;
 404
 405        struct list_head transfer_list;
 406};
 407
 408/**
 409 * struct spi_message - one multi-segment SPI transaction
 410 * @transfers: list of transfer segments in this transaction
 411 * @spi: SPI device to which the transaction is queued
 412 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
 413 *      addresses for each transfer buffer
 414 * @complete: called to report transaction completions
 415 * @context: the argument to complete() when it's called
 416 * @actual_length: the total number of bytes that were transferred in all
 417 *      successful segments
 418 * @status: zero for success, else negative errno
 419 * @queue: for use by whichever driver currently owns the message
 420 * @state: for use by whichever driver currently owns the message
 421 *
 422 * A @spi_message is used to execute an atomic sequence of data transfers,
 423 * each represented by a struct spi_transfer.  The sequence is "atomic"
 424 * in the sense that no other spi_message may use that SPI bus until that
 425 * sequence completes.  On some systems, many such sequences can execute as
 426 * as single programmed DMA transfer.  On all systems, these messages are
 427 * queued, and might complete after transactions to other devices.  Messages
 428 * sent to a given spi_device are alway executed in FIFO order.
 429 *
 430 * The code that submits an spi_message (and its spi_transfers)
 431 * to the lower layers is responsible for managing its memory.
 432 * Zero-initialize every field you don't set up explicitly, to
 433 * insulate against future API updates.  After you submit a message
 434 * and its transfers, ignore them until its completion callback.
 435 */
 436struct spi_message {
 437        struct list_head        transfers;
 438
 439        struct spi_device       *spi;
 440
 441        unsigned                is_dma_mapped:1;
 442
 443        /* REVISIT:  we might want a flag affecting the behavior of the
 444         * last transfer ... allowing things like "read 16 bit length L"
 445         * immediately followed by "read L bytes".  Basically imposing
 446         * a specific message scheduling algorithm.
 447         *
 448         * Some controller drivers (message-at-a-time queue processing)
 449         * could provide that as their default scheduling algorithm.  But
 450         * others (with multi-message pipelines) could need a flag to
 451         * tell them about such special cases.
 452         */
 453
 454        /* completion is reported through a callback */
 455        void                    (*complete)(void *context);
 456        void                    *context;
 457        unsigned                actual_length;
 458        int                     status;
 459
 460        /* for optional use by whatever driver currently owns the
 461         * spi_message ...  between calls to spi_async and then later
 462         * complete(), that's the spi_master controller driver.
 463         */
 464        struct list_head        queue;
 465        void                    *state;
 466};
 467
 468static inline void spi_message_init(struct spi_message *m)
 469{
 470        memset(m, 0, sizeof *m);
 471        INIT_LIST_HEAD(&m->transfers);
 472}
 473
 474static inline void
 475spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
 476{
 477        list_add_tail(&t->transfer_list, &m->transfers);
 478}
 479
 480static inline void
 481spi_transfer_del(struct spi_transfer *t)
 482{
 483        list_del(&t->transfer_list);
 484}
 485
 486/* It's fine to embed message and transaction structures in other data
 487 * structures so long as you don't free them while they're in use.
 488 */
 489
 490static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
 491{
 492        struct spi_message *m;
 493
 494        m = kzalloc(sizeof(struct spi_message)
 495                        + ntrans * sizeof(struct spi_transfer),
 496                        flags);
 497        if (m) {
 498                int i;
 499                struct spi_transfer *t = (struct spi_transfer *)(m + 1);
 500
 501                INIT_LIST_HEAD(&m->transfers);
 502                for (i = 0; i < ntrans; i++, t++)
 503                        spi_message_add_tail(t, m);
 504        }
 505        return m;
 506}
 507
 508static inline void spi_message_free(struct spi_message *m)
 509{
 510        kfree(m);
 511}
 512
 513/**
 514 * spi_setup - setup SPI mode and clock rate
 515 * @spi: the device whose settings are being modified
 516 * Context: can sleep, and no requests are queued to the device
 517 *
 518 * SPI protocol drivers may need to update the transfer mode if the
 519 * device doesn't work with its default.  They may likewise need
 520 * to update clock rates or word sizes from initial values.  This function
 521 * changes those settings, and must be called from a context that can sleep.
 522 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
 523 * effect the next time the device is selected and data is transferred to
 524 * or from it.  When this function returns, the spi device is deselected.
 525 *
 526 * Note that this call will fail if the protocol driver specifies an option
 527 * that the underlying controller or its driver does not support.  For
 528 * example, not all hardware supports wire transfers using nine bit words,
 529 * LSB-first wire encoding, or active-high chipselects.
 530 */
 531static inline int
 532spi_setup(struct spi_device *spi)
 533{
 534        return spi->master->setup(spi);
 535}
 536
 537
 538/**
 539 * spi_async - asynchronous SPI transfer
 540 * @spi: device with which data will be exchanged
 541 * @message: describes the data transfers, including completion callback
 542 * Context: any (irqs may be blocked, etc)
 543 *
 544 * This call may be used in_irq and other contexts which can't sleep,
 545 * as well as from task contexts which can sleep.
 546 *
 547 * The completion callback is invoked in a context which can't sleep.
 548 * Before that invocation, the value of message->status is undefined.
 549 * When the callback is issued, message->status holds either zero (to
 550 * indicate complete success) or a negative error code.  After that
 551 * callback returns, the driver which issued the transfer request may
 552 * deallocate the associated memory; it's no longer in use by any SPI
 553 * core or controller driver code.
 554 *
 555 * Note that although all messages to a spi_device are handled in
 556 * FIFO order, messages may go to different devices in other orders.
 557 * Some device might be higher priority, or have various "hard" access
 558 * time requirements, for example.
 559 *
 560 * On detection of any fault during the transfer, processing of
 561 * the entire message is aborted, and the device is deselected.
 562 * Until returning from the associated message completion callback,
 563 * no other spi_message queued to that device will be processed.
 564 * (This rule applies equally to all the synchronous transfer calls,
 565 * which are wrappers around this core asynchronous primitive.)
 566 */
 567static inline int
 568spi_async(struct spi_device *spi, struct spi_message *message)
 569{
 570        message->spi = spi;
 571        return spi->master->transfer(spi, message);
 572}
 573
 574/*---------------------------------------------------------------------------*/
 575
 576/* All these synchronous SPI transfer routines are utilities layered
 577 * over the core async transfer primitive.  Here, "synchronous" means
 578 * they will sleep uninterruptibly until the async transfer completes.
 579 */
 580
 581extern int spi_sync(struct spi_device *spi, struct spi_message *message);
 582
 583/**
 584 * spi_write - SPI synchronous write
 585 * @spi: device to which data will be written
 586 * @buf: data buffer
 587 * @len: data buffer size
 588 * Context: can sleep
 589 *
 590 * This writes the buffer and returns zero or a negative error code.
 591 * Callable only from contexts that can sleep.
 592 */
 593static inline int
 594spi_write(struct spi_device *spi, const u8 *buf, size_t len)
 595{
 596        struct spi_transfer     t = {
 597                        .tx_buf         = buf,
 598                        .len            = len,
 599                };
 600        struct spi_message      m;
 601
 602        spi_message_init(&m);
 603        spi_message_add_tail(&t, &m);
 604        return spi_sync(spi, &m);
 605}
 606
 607/**
 608 * spi_read - SPI synchronous read
 609 * @spi: device from which data will be read
 610 * @buf: data buffer
 611 * @len: data buffer size
 612 * Context: can sleep
 613 *
 614 * This reads the buffer and returns zero or a negative error code.
 615 * Callable only from contexts that can sleep.
 616 */
 617static inline int
 618spi_read(struct spi_device *spi, u8 *buf, size_t len)
 619{
 620        struct spi_transfer     t = {
 621                        .rx_buf         = buf,
 622                        .len            = len,
 623                };
 624        struct spi_message      m;
 625
 626        spi_message_init(&m);
 627        spi_message_add_tail(&t, &m);
 628        return spi_sync(spi, &m);
 629}
 630
 631/* this copies txbuf and rxbuf data; for small transfers only! */
 632extern int spi_write_then_read(struct spi_device *spi,
 633                const u8 *txbuf, unsigned n_tx,
 634                u8 *rxbuf, unsigned n_rx);
 635
 636/**
 637 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
 638 * @spi: device with which data will be exchanged
 639 * @cmd: command to be written before data is read back
 640 * Context: can sleep
 641 *
 642 * This returns the (unsigned) eight bit number returned by the
 643 * device, or else a negative error code.  Callable only from
 644 * contexts that can sleep.
 645 */
 646static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
 647{
 648        ssize_t                 status;
 649        u8                      result;
 650
 651        status = spi_write_then_read(spi, &cmd, 1, &result, 1);
 652
 653        /* return negative errno or unsigned value */
 654        return (status < 0) ? status : result;
 655}
 656
 657/**
 658 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
 659 * @spi: device with which data will be exchanged
 660 * @cmd: command to be written before data is read back
 661 * Context: can sleep
 662 *
 663 * This returns the (unsigned) sixteen bit number returned by the
 664 * device, or else a negative error code.  Callable only from
 665 * contexts that can sleep.
 666 *
 667 * The number is returned in wire-order, which is at least sometimes
 668 * big-endian.
 669 */
 670static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
 671{
 672        ssize_t                 status;
 673        u16                     result;
 674
 675        status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
 676
 677        /* return negative errno or unsigned value */
 678        return (status < 0) ? status : result;
 679}
 680
 681/*---------------------------------------------------------------------------*/
 682
 683/*
 684 * INTERFACE between board init code and SPI infrastructure.
 685 *
 686 * No SPI driver ever sees these SPI device table segments, but
 687 * it's how the SPI core (or adapters that get hotplugged) grows
 688 * the driver model tree.
 689 *
 690 * As a rule, SPI devices can't be probed.  Instead, board init code
 691 * provides a table listing the devices which are present, with enough
 692 * information to bind and set up the device's driver.  There's basic
 693 * support for nonstatic configurations too; enough to handle adding
 694 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
 695 */
 696
 697/**
 698 * struct spi_board_info - board-specific template for a SPI device
 699 * @modalias: Initializes spi_device.modalias; identifies the driver.
 700 * @platform_data: Initializes spi_device.platform_data; the particular
 701 *      data stored there is driver-specific.
 702 * @controller_data: Initializes spi_device.controller_data; some
 703 *      controllers need hints about hardware setup, e.g. for DMA.
 704 * @irq: Initializes spi_device.irq; depends on how the board is wired.
 705 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
 706 *      from the chip datasheet and board-specific signal quality issues.
 707 * @bus_num: Identifies which spi_master parents the spi_device; unused
 708 *      by spi_new_device(), and otherwise depends on board wiring.
 709 * @chip_select: Initializes spi_device.chip_select; depends on how
 710 *      the board is wired.
 711 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
 712 *      wiring (some devices support both 3WIRE and standard modes), and
 713 *      possibly presence of an inverter in the chipselect path.
 714 *
 715 * When adding new SPI devices to the device tree, these structures serve
 716 * as a partial device template.  They hold information which can't always
 717 * be determined by drivers.  Information that probe() can establish (such
 718 * as the default transfer wordsize) is not included here.
 719 *
 720 * These structures are used in two places.  Their primary role is to
 721 * be stored in tables of board-specific device descriptors, which are
 722 * declared early in board initialization and then used (much later) to
 723 * populate a controller's device tree after the that controller's driver
 724 * initializes.  A secondary (and atypical) role is as a parameter to
 725 * spi_new_device() call, which happens after those controller drivers
 726 * are active in some dynamic board configuration models.
 727 */
 728struct spi_board_info {
 729        /* the device name and module name are coupled, like platform_bus;
 730         * "modalias" is normally the driver name.
 731         *
 732         * platform_data goes to spi_device.dev.platform_data,
 733         * controller_data goes to spi_device.controller_data,
 734         * irq is copied too
 735         */
 736        char            modalias[32];
 737        const void      *platform_data;
 738        void            *controller_data;
 739        int             irq;
 740
 741        /* slower signaling on noisy or low voltage boards */
 742        u32             max_speed_hz;
 743
 744
 745        /* bus_num is board specific and matches the bus_num of some
 746         * spi_master that will probably be registered later.
 747         *
 748         * chip_select reflects how this chip is wired to that master;
 749         * it's less than num_chipselect.
 750         */
 751        u16             bus_num;
 752        u16             chip_select;
 753
 754        /* mode becomes spi_device.mode, and is essential for chips
 755         * where the default of SPI_CS_HIGH = 0 is wrong.
 756         */
 757        u8              mode;
 758
 759        /* ... may need additional spi_device chip config data here.
 760         * avoid stuff protocol drivers can set; but include stuff
 761         * needed to behave without being bound to a driver:
 762         *  - quirks like clock rate mattering when not selected
 763         */
 764};
 765
 766#ifdef  CONFIG_SPI
 767extern int
 768spi_register_board_info(struct spi_board_info const *info, unsigned n);
 769#else
 770/* board init code may ignore whether SPI is configured or not */
 771static inline int
 772spi_register_board_info(struct spi_board_info const *info, unsigned n)
 773        { return 0; }
 774#endif
 775
 776
 777/* If you're hotplugging an adapter with devices (parport, usb, etc)
 778 * use spi_new_device() to describe each device.  You can also call
 779 * spi_unregister_device() to start making that device vanish, but
 780 * normally that would be handled by spi_unregister_master().
 781 *
 782 * You can also use spi_alloc_device() and spi_add_device() to use a two
 783 * stage registration sequence for each spi_device.  This gives the caller
 784 * some more control over the spi_device structure before it is registered,
 785 * but requires that caller to initialize fields that would otherwise
 786 * be defined using the board info.
 787 */
 788extern struct spi_device *
 789spi_alloc_device(struct spi_master *master);
 790
 791extern int
 792spi_add_device(struct spi_device *spi);
 793
 794extern struct spi_device *
 795spi_new_device(struct spi_master *, struct spi_board_info *);
 796
 797static inline void
 798spi_unregister_device(struct spi_device *spi)
 799{
 800        if (spi)
 801                device_unregister(&spi->dev);
 802}
 803
 804#endif /* __LINUX_SPI_H */
 805
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