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22#include <linux/err.h>
23#include <linux/init.h>
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/proc_fs.h>
28
29#include <linux/sched.h>
30#include <linux/ptrace.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/in.h>
36#include <linux/bitops.h>
37#include <linux/scatterlist.h>
38#include <linux/crypto.h>
39#include <asm/io.h>
40#include <asm/system.h>
41#include <asm/unaligned.h>
42
43#include <linux/netdevice.h>
44#include <linux/etherdevice.h>
45#include <linux/skbuff.h>
46#include <linux/if_arp.h>
47#include <linux/ioport.h>
48#include <linux/pci.h>
49#include <asm/uaccess.h>
50#include <net/ieee80211.h>
51#include <linux/kthread.h>
52#include <linux/freezer.h>
53
54#include "airo.h"
55
56#define DRV_NAME "airo"
57
58#ifdef CONFIG_PCI
59static struct pci_device_id card_ids[] = {
60 { 0x14b9, 1, PCI_ANY_ID, PCI_ANY_ID, },
61 { 0x14b9, 0x4500, PCI_ANY_ID, PCI_ANY_ID },
62 { 0x14b9, 0x4800, PCI_ANY_ID, PCI_ANY_ID, },
63 { 0x14b9, 0x0340, PCI_ANY_ID, PCI_ANY_ID, },
64 { 0x14b9, 0x0350, PCI_ANY_ID, PCI_ANY_ID, },
65 { 0x14b9, 0x5000, PCI_ANY_ID, PCI_ANY_ID, },
66 { 0x14b9, 0xa504, PCI_ANY_ID, PCI_ANY_ID, },
67 { 0, }
68};
69MODULE_DEVICE_TABLE(pci, card_ids);
70
71static int airo_pci_probe(struct pci_dev *, const struct pci_device_id *);
72static void airo_pci_remove(struct pci_dev *);
73static int airo_pci_suspend(struct pci_dev *pdev, pm_message_t state);
74static int airo_pci_resume(struct pci_dev *pdev);
75
76static struct pci_driver airo_driver = {
77 .name = DRV_NAME,
78 .id_table = card_ids,
79 .probe = airo_pci_probe,
80 .remove = __devexit_p(airo_pci_remove),
81 .suspend = airo_pci_suspend,
82 .resume = airo_pci_resume,
83};
84#endif
85
86
87#include <linux/wireless.h>
88#define WIRELESS_SPY
89#include <net/iw_handler.h>
90
91#define CISCO_EXT
92#ifdef CISCO_EXT
93#include <linux/delay.h>
94#endif
95
96
97#define POWER_ON_DOWN
98
99
100
101
102
103
104
105#define IGNLABEL(comment) NULL
106static char *statsLabels[] = {
107 "RxOverrun",
108 IGNLABEL("RxPlcpCrcErr"),
109 IGNLABEL("RxPlcpFormatErr"),
110 IGNLABEL("RxPlcpLengthErr"),
111 "RxMacCrcErr",
112 "RxMacCrcOk",
113 "RxWepErr",
114 "RxWepOk",
115 "RetryLong",
116 "RetryShort",
117 "MaxRetries",
118 "NoAck",
119 "NoCts",
120 "RxAck",
121 "RxCts",
122 "TxAck",
123 "TxRts",
124 "TxCts",
125 "TxMc",
126 "TxBc",
127 "TxUcFrags",
128 "TxUcPackets",
129 "TxBeacon",
130 "RxBeacon",
131 "TxSinColl",
132 "TxMulColl",
133 "DefersNo",
134 "DefersProt",
135 "DefersEngy",
136 "DupFram",
137 "RxFragDisc",
138 "TxAged",
139 "RxAged",
140 "LostSync-MaxRetry",
141 "LostSync-MissedBeacons",
142 "LostSync-ArlExceeded",
143 "LostSync-Deauth",
144 "LostSync-Disassoced",
145 "LostSync-TsfTiming",
146 "HostTxMc",
147 "HostTxBc",
148 "HostTxUc",
149 "HostTxFail",
150 "HostRxMc",
151 "HostRxBc",
152 "HostRxUc",
153 "HostRxDiscard",
154 IGNLABEL("HmacTxMc"),
155 IGNLABEL("HmacTxBc"),
156 IGNLABEL("HmacTxUc"),
157 IGNLABEL("HmacTxFail"),
158 IGNLABEL("HmacRxMc"),
159 IGNLABEL("HmacRxBc"),
160 IGNLABEL("HmacRxUc"),
161 IGNLABEL("HmacRxDiscard"),
162 IGNLABEL("HmacRxAccepted"),
163 "SsidMismatch",
164 "ApMismatch",
165 "RatesMismatch",
166 "AuthReject",
167 "AuthTimeout",
168 "AssocReject",
169 "AssocTimeout",
170 IGNLABEL("ReasonOutsideTable"),
171 IGNLABEL("ReasonStatus1"),
172 IGNLABEL("ReasonStatus2"),
173 IGNLABEL("ReasonStatus3"),
174 IGNLABEL("ReasonStatus4"),
175 IGNLABEL("ReasonStatus5"),
176 IGNLABEL("ReasonStatus6"),
177 IGNLABEL("ReasonStatus7"),
178 IGNLABEL("ReasonStatus8"),
179 IGNLABEL("ReasonStatus9"),
180 IGNLABEL("ReasonStatus10"),
181 IGNLABEL("ReasonStatus11"),
182 IGNLABEL("ReasonStatus12"),
183 IGNLABEL("ReasonStatus13"),
184 IGNLABEL("ReasonStatus14"),
185 IGNLABEL("ReasonStatus15"),
186 IGNLABEL("ReasonStatus16"),
187 IGNLABEL("ReasonStatus17"),
188 IGNLABEL("ReasonStatus18"),
189 IGNLABEL("ReasonStatus19"),
190 "RxMan",
191 "TxMan",
192 "RxRefresh",
193 "TxRefresh",
194 "RxPoll",
195 "TxPoll",
196 "HostRetries",
197 "LostSync-HostReq",
198 "HostTxBytes",
199 "HostRxBytes",
200 "ElapsedUsec",
201 "ElapsedSec",
202 "LostSyncBetterAP",
203 "PrivacyMismatch",
204 "Jammed",
205 "DiscRxNotWepped",
206 "PhyEleMismatch",
207 (char*)-1 };
208#ifndef RUN_AT
209#define RUN_AT(x) (jiffies+(x))
210#endif
211
212
213
214
215
216
217static int rates[8];
218static int basic_rate;
219static char *ssids[3];
220
221static int io[4];
222static int irq[4];
223
224static
225int maxencrypt ;
226
227
228static int auto_wep ;
229static int aux_bap ;
230
231static int adhoc;
232
233static int probe = 1;
234
235static int proc_uid ;
236
237static int proc_gid ;
238
239static int airo_perm = 0555;
240
241static int proc_perm = 0644;
242
243MODULE_AUTHOR("Benjamin Reed");
244MODULE_DESCRIPTION("Support for Cisco/Aironet 802.11 wireless ethernet \
245cards. Direct support for ISA/PCI/MPI cards and support \
246for PCMCIA when used with airo_cs.");
247MODULE_LICENSE("Dual BSD/GPL");
248MODULE_SUPPORTED_DEVICE("Aironet 4500, 4800 and Cisco 340/350");
249module_param_array(io, int, NULL, 0);
250module_param_array(irq, int, NULL, 0);
251module_param(basic_rate, int, 0);
252module_param_array(rates, int, NULL, 0);
253module_param_array(ssids, charp, NULL, 0);
254module_param(auto_wep, int, 0);
255MODULE_PARM_DESC(auto_wep, "If non-zero, the driver will keep looping through \
256the authentication options until an association is made. The value of \
257auto_wep is number of the wep keys to check. A value of 2 will try using \
258the key at index 0 and index 1.");
259module_param(aux_bap, int, 0);
260MODULE_PARM_DESC(aux_bap, "If non-zero, the driver will switch into a mode \
261than seems to work better for older cards with some older buses. Before \
262switching it checks that the switch is needed.");
263module_param(maxencrypt, int, 0);
264MODULE_PARM_DESC(maxencrypt, "The maximum speed that the card can do \
265encryption. Units are in 512kbs. Zero (default) means there is no limit. \
266Older cards used to be limited to 2mbs (4).");
267module_param(adhoc, int, 0);
268MODULE_PARM_DESC(adhoc, "If non-zero, the card will start in adhoc mode.");
269module_param(probe, int, 0);
270MODULE_PARM_DESC(probe, "If zero, the driver won't start the card.");
271
272module_param(proc_uid, int, 0);
273MODULE_PARM_DESC(proc_uid, "The uid that the /proc files will belong to.");
274module_param(proc_gid, int, 0);
275MODULE_PARM_DESC(proc_gid, "The gid that the /proc files will belong to.");
276module_param(airo_perm, int, 0);
277MODULE_PARM_DESC(airo_perm, "The permission bits of /proc/[driver/]aironet.");
278module_param(proc_perm, int, 0);
279MODULE_PARM_DESC(proc_perm, "The permission bits of the files in /proc");
280
281
282
283
284static int do8bitIO ;
285
286
287#define SUCCESS 0
288#define ERROR -1
289#define NO_PACKET -2
290
291
292#define NOP2 0x0000
293#define MAC_ENABLE 0x0001
294#define MAC_DISABLE 0x0002
295#define CMD_LOSE_SYNC 0x0003
296#define CMD_SOFTRESET 0x0004
297#define HOSTSLEEP 0x0005
298#define CMD_MAGIC_PKT 0x0006
299#define CMD_SETWAKEMASK 0x0007
300#define CMD_READCFG 0x0008
301#define CMD_SETMODE 0x0009
302#define CMD_ALLOCATETX 0x000a
303#define CMD_TRANSMIT 0x000b
304#define CMD_DEALLOCATETX 0x000c
305#define NOP 0x0010
306#define CMD_WORKAROUND 0x0011
307#define CMD_ALLOCATEAUX 0x0020
308#define CMD_ACCESS 0x0021
309#define CMD_PCIBAP 0x0022
310#define CMD_PCIAUX 0x0023
311#define CMD_ALLOCBUF 0x0028
312#define CMD_GETTLV 0x0029
313#define CMD_PUTTLV 0x002a
314#define CMD_DELTLV 0x002b
315#define CMD_FINDNEXTTLV 0x002c
316#define CMD_PSPNODES 0x0030
317#define CMD_SETCW 0x0031
318#define CMD_SETPCF 0x0032
319#define CMD_SETPHYREG 0x003e
320#define CMD_TXTEST 0x003f
321#define MAC_ENABLETX 0x0101
322#define CMD_LISTBSS 0x0103
323#define CMD_SAVECFG 0x0108
324#define CMD_ENABLEAUX 0x0111
325#define CMD_WRITERID 0x0121
326#define CMD_USEPSPNODES 0x0130
327#define MAC_ENABLERX 0x0201
328
329
330#define ERROR_QUALIF 0x00
331#define ERROR_ILLCMD 0x01
332#define ERROR_ILLFMT 0x02
333#define ERROR_INVFID 0x03
334#define ERROR_INVRID 0x04
335#define ERROR_LARGE 0x05
336#define ERROR_NDISABL 0x06
337#define ERROR_ALLOCBSY 0x07
338#define ERROR_NORD 0x0B
339#define ERROR_NOWR 0x0C
340#define ERROR_INVFIDTX 0x0D
341#define ERROR_TESTACT 0x0E
342#define ERROR_TAGNFND 0x12
343#define ERROR_DECODE 0x20
344#define ERROR_DESCUNAV 0x21
345#define ERROR_BADLEN 0x22
346#define ERROR_MODE 0x80
347#define ERROR_HOP 0x81
348#define ERROR_BINTER 0x82
349#define ERROR_RXMODE 0x83
350#define ERROR_MACADDR 0x84
351#define ERROR_RATES 0x85
352#define ERROR_ORDER 0x86
353#define ERROR_SCAN 0x87
354#define ERROR_AUTH 0x88
355#define ERROR_PSMODE 0x89
356#define ERROR_RTYPE 0x8A
357#define ERROR_DIVER 0x8B
358#define ERROR_SSID 0x8C
359#define ERROR_APLIST 0x8D
360#define ERROR_AUTOWAKE 0x8E
361#define ERROR_LEAP 0x8F
362
363
364#define COMMAND 0x00
365#define PARAM0 0x02
366#define PARAM1 0x04
367#define PARAM2 0x06
368#define STATUS 0x08
369#define RESP0 0x0a
370#define RESP1 0x0c
371#define RESP2 0x0e
372#define LINKSTAT 0x10
373#define SELECT0 0x18
374#define OFFSET0 0x1c
375#define RXFID 0x20
376#define TXALLOCFID 0x22
377#define TXCOMPLFID 0x24
378#define DATA0 0x36
379#define EVSTAT 0x30
380#define EVINTEN 0x32
381#define EVACK 0x34
382#define SWS0 0x28
383#define SWS1 0x2a
384#define SWS2 0x2c
385#define SWS3 0x2e
386#define AUXPAGE 0x3A
387#define AUXOFF 0x3C
388#define AUXDATA 0x3E
389
390#define FID_TX 1
391#define FID_RX 2
392
393#define AUX_OFFSET 0x800
394
395#define PKTSIZE 1840
396#define RIDSIZE 2048
397
398#define MAXTXQ 64
399
400
401#define BAP0 0
402#define BAP1 2
403
404
405#define COMMAND_BUSY 0x8000
406
407#define BAP_BUSY 0x8000
408#define BAP_ERR 0x4000
409#define BAP_DONE 0x2000
410
411#define PROMISC 0xffff
412#define NOPROMISC 0x0000
413
414#define EV_CMD 0x10
415#define EV_CLEARCOMMANDBUSY 0x4000
416#define EV_RX 0x01
417#define EV_TX 0x02
418#define EV_TXEXC 0x04
419#define EV_ALLOC 0x08
420#define EV_LINK 0x80
421#define EV_AWAKE 0x100
422#define EV_TXCPY 0x400
423#define EV_UNKNOWN 0x800
424#define EV_MIC 0x1000
425#define EV_AWAKEN 0x2000
426#define STATUS_INTS (EV_AWAKE|EV_LINK|EV_TXEXC|EV_TX|EV_TXCPY|EV_RX|EV_MIC)
427
428#ifdef CHECK_UNKNOWN_INTS
429#define IGNORE_INTS ( EV_CMD | EV_UNKNOWN)
430#else
431#define IGNORE_INTS (~STATUS_INTS)
432#endif
433
434
435#define RID_RW 0x20
436
437
438#define RID_CAPABILITIES 0xFF00
439#define RID_APINFO 0xFF01
440#define RID_RADIOINFO 0xFF02
441#define RID_UNKNOWN3 0xFF03
442#define RID_RSSI 0xFF04
443#define RID_CONFIG 0xFF10
444#define RID_SSID 0xFF11
445#define RID_APLIST 0xFF12
446#define RID_DRVNAME 0xFF13
447#define RID_ETHERENCAP 0xFF14
448#define RID_WEP_TEMP 0xFF15
449#define RID_WEP_PERM 0xFF16
450#define RID_MODULATION 0xFF17
451#define RID_OPTIONS 0xFF18
452#define RID_ACTUALCONFIG 0xFF20
453#define RID_FACTORYCONFIG 0xFF21
454#define RID_UNKNOWN22 0xFF22
455#define RID_LEAPUSERNAME 0xFF23
456#define RID_LEAPPASSWORD 0xFF24
457#define RID_STATUS 0xFF50
458#define RID_BEACON_HST 0xFF51
459#define RID_BUSY_HST 0xFF52
460#define RID_RETRIES_HST 0xFF53
461#define RID_UNKNOWN54 0xFF54
462#define RID_UNKNOWN55 0xFF55
463#define RID_UNKNOWN56 0xFF56
464#define RID_MIC 0xFF57
465#define RID_STATS16 0xFF60
466#define RID_STATS16DELTA 0xFF61
467#define RID_STATS16DELTACLEAR 0xFF62
468#define RID_STATS 0xFF68
469#define RID_STATSDELTA 0xFF69
470#define RID_STATSDELTACLEAR 0xFF6A
471#define RID_ECHOTEST_RID 0xFF70
472#define RID_ECHOTEST_RESULTS 0xFF71
473#define RID_BSSLISTFIRST 0xFF72
474#define RID_BSSLISTNEXT 0xFF73
475#define RID_WPA_BSSLISTFIRST 0xFF74
476#define RID_WPA_BSSLISTNEXT 0xFF75
477
478typedef struct {
479 u16 cmd;
480 u16 parm0;
481 u16 parm1;
482 u16 parm2;
483} Cmd;
484
485typedef struct {
486 u16 status;
487 u16 rsp0;
488 u16 rsp1;
489 u16 rsp2;
490} Resp;
491
492
493
494
495
496
497
498
499#pragma pack(1)
500
501
502
503typedef struct {
504 __le16 len;
505 __le16 kindex;
506 u8 mac[ETH_ALEN];
507 __le16 klen;
508 u8 key[16];
509} WepKeyRid;
510
511
512typedef struct {
513 __le16 len;
514 u8 ssid[32];
515} Ssid;
516
517typedef struct {
518 __le16 len;
519 Ssid ssids[3];
520} SsidRid;
521
522typedef struct {
523 __le16 len;
524 __le16 modulation;
525#define MOD_DEFAULT cpu_to_le16(0)
526#define MOD_CCK cpu_to_le16(1)
527#define MOD_MOK cpu_to_le16(2)
528} ModulationRid;
529
530typedef struct {
531 __le16 len;
532 __le16 opmode;
533#define MODE_STA_IBSS cpu_to_le16(0)
534#define MODE_STA_ESS cpu_to_le16(1)
535#define MODE_AP cpu_to_le16(2)
536#define MODE_AP_RPTR cpu_to_le16(3)
537#define MODE_CFG_MASK cpu_to_le16(0xff)
538#define MODE_ETHERNET_HOST cpu_to_le16(0<<8)
539#define MODE_LLC_HOST cpu_to_le16(1<<8)
540#define MODE_AIRONET_EXTEND cpu_to_le16(1<<9)
541#define MODE_AP_INTERFACE cpu_to_le16(1<<10)
542#define MODE_ANTENNA_ALIGN cpu_to_le16(1<<11)
543#define MODE_ETHER_LLC cpu_to_le16(1<<12)
544#define MODE_LEAF_NODE cpu_to_le16(1<<13)
545#define MODE_CF_POLLABLE cpu_to_le16(1<<14)
546#define MODE_MIC cpu_to_le16(1<<15)
547 __le16 rmode;
548#define RXMODE_BC_MC_ADDR cpu_to_le16(0)
549#define RXMODE_BC_ADDR cpu_to_le16(1)
550#define RXMODE_ADDR cpu_to_le16(2)
551#define RXMODE_RFMON cpu_to_le16(3)
552#define RXMODE_RFMON_ANYBSS cpu_to_le16(4)
553#define RXMODE_LANMON cpu_to_le16(5)
554#define RXMODE_MASK cpu_to_le16(255)
555#define RXMODE_DISABLE_802_3_HEADER cpu_to_le16(1<<8)
556#define RXMODE_FULL_MASK (RXMODE_MASK | RXMODE_DISABLE_802_3_HEADER)
557#define RXMODE_NORMALIZED_RSSI cpu_to_le16(1<<9)
558 __le16 fragThresh;
559 __le16 rtsThres;
560 u8 macAddr[ETH_ALEN];
561 u8 rates[8];
562 __le16 shortRetryLimit;
563 __le16 longRetryLimit;
564 __le16 txLifetime;
565 __le16 rxLifetime;
566 __le16 stationary;
567 __le16 ordering;
568 __le16 u16deviceType;
569 __le16 cfpRate;
570 __le16 cfpDuration;
571 __le16 _reserved1[3];
572
573 __le16 scanMode;
574#define SCANMODE_ACTIVE cpu_to_le16(0)
575#define SCANMODE_PASSIVE cpu_to_le16(1)
576#define SCANMODE_AIROSCAN cpu_to_le16(2)
577 __le16 probeDelay;
578 __le16 probeEnergyTimeout;
579 __le16 probeResponseTimeout;
580 __le16 beaconListenTimeout;
581 __le16 joinNetTimeout;
582 __le16 authTimeout;
583 __le16 authType;
584#define AUTH_OPEN cpu_to_le16(0x1)
585#define AUTH_ENCRYPT cpu_to_le16(0x101)
586#define AUTH_SHAREDKEY cpu_to_le16(0x102)
587#define AUTH_ALLOW_UNENCRYPTED cpu_to_le16(0x200)
588 __le16 associationTimeout;
589 __le16 specifiedApTimeout;
590 __le16 offlineScanInterval;
591 __le16 offlineScanDuration;
592 __le16 linkLossDelay;
593 __le16 maxBeaconLostTime;
594 __le16 refreshInterval;
595#define DISABLE_REFRESH cpu_to_le16(0xFFFF)
596 __le16 _reserved1a[1];
597
598 __le16 powerSaveMode;
599#define POWERSAVE_CAM cpu_to_le16(0)
600#define POWERSAVE_PSP cpu_to_le16(1)
601#define POWERSAVE_PSPCAM cpu_to_le16(2)
602 __le16 sleepForDtims;
603 __le16 listenInterval;
604 __le16 fastListenInterval;
605 __le16 listenDecay;
606 __le16 fastListenDelay;
607 __le16 _reserved2[2];
608
609 __le16 beaconPeriod;
610 __le16 atimDuration;
611 __le16 hopPeriod;
612 __le16 channelSet;
613 __le16 channel;
614 __le16 dtimPeriod;
615 __le16 bridgeDistance;
616 __le16 radioID;
617
618 __le16 radioType;
619#define RADIOTYPE_DEFAULT cpu_to_le16(0)
620#define RADIOTYPE_802_11 cpu_to_le16(1)
621#define RADIOTYPE_LEGACY cpu_to_le16(2)
622 u8 rxDiversity;
623 u8 txDiversity;
624 __le16 txPower;
625#define TXPOWER_DEFAULT 0
626 __le16 rssiThreshold;
627#define RSSI_DEFAULT 0
628 __le16 modulation;
629#define PREAMBLE_AUTO cpu_to_le16(0)
630#define PREAMBLE_LONG cpu_to_le16(1)
631#define PREAMBLE_SHORT cpu_to_le16(2)
632 __le16 preamble;
633 __le16 homeProduct;
634 __le16 radioSpecific;
635
636 u8 nodeName[16];
637 __le16 arlThreshold;
638 __le16 arlDecay;
639 __le16 arlDelay;
640 __le16 _reserved4[1];
641
642 u8 magicAction;
643#define MAGIC_ACTION_STSCHG 1
644#define MAGIC_ACTION_RESUME 2
645#define MAGIC_IGNORE_MCAST (1<<8)
646#define MAGIC_IGNORE_BCAST (1<<9)
647#define MAGIC_SWITCH_TO_PSP (0<<10)
648#define MAGIC_STAY_IN_CAM (1<<10)
649 u8 magicControl;
650 __le16 autoWake;
651} ConfigRid;
652
653typedef struct {
654 __le16 len;
655 u8 mac[ETH_ALEN];
656 __le16 mode;
657 __le16 errorCode;
658 __le16 sigQuality;
659 __le16 SSIDlen;
660 char SSID[32];
661 char apName[16];
662 u8 bssid[4][ETH_ALEN];
663 __le16 beaconPeriod;
664 __le16 dimPeriod;
665 __le16 atimDuration;
666 __le16 hopPeriod;
667 __le16 channelSet;
668 __le16 channel;
669 __le16 hopsToBackbone;
670 __le16 apTotalLoad;
671 __le16 generatedLoad;
672 __le16 accumulatedArl;
673 __le16 signalQuality;
674 __le16 currentXmitRate;
675 __le16 apDevExtensions;
676 __le16 normalizedSignalStrength;
677 __le16 shortPreamble;
678 u8 apIP[4];
679 u8 noisePercent;
680 u8 noisedBm;
681 u8 noiseAvePercent;
682 u8 noiseAvedBm;
683 u8 noiseMaxPercent;
684 u8 noiseMaxdBm;
685 __le16 load;
686 u8 carrier[4];
687 __le16 assocStatus;
688#define STAT_NOPACKETS 0
689#define STAT_NOCARRIERSET 10
690#define STAT_GOTCARRIERSET 11
691#define STAT_WRONGSSID 20
692#define STAT_BADCHANNEL 25
693#define STAT_BADBITRATES 30
694#define STAT_BADPRIVACY 35
695#define STAT_APFOUND 40
696#define STAT_APREJECTED 50
697#define STAT_AUTHENTICATING 60
698#define STAT_DEAUTHENTICATED 61
699#define STAT_AUTHTIMEOUT 62
700#define STAT_ASSOCIATING 70
701#define STAT_DEASSOCIATED 71
702#define STAT_ASSOCTIMEOUT 72
703#define STAT_NOTAIROAP 73
704#define STAT_ASSOCIATED 80
705#define STAT_LEAPING 90
706#define STAT_LEAPFAILED 91
707#define STAT_LEAPTIMEDOUT 92
708#define STAT_LEAPCOMPLETE 93
709} StatusRid;
710
711typedef struct {
712 __le16 len;
713 __le16 spacer;
714 __le32 vals[100];
715} StatsRid;
716
717
718typedef struct {
719 __le16 len;
720 u8 ap[4][ETH_ALEN];
721} APListRid;
722
723typedef struct {
724 __le16 len;
725 char oui[3];
726 char zero;
727 __le16 prodNum;
728 char manName[32];
729 char prodName[16];
730 char prodVer[8];
731 char factoryAddr[ETH_ALEN];
732 char aironetAddr[ETH_ALEN];
733 __le16 radioType;
734 __le16 country;
735 char callid[ETH_ALEN];
736 char supportedRates[8];
737 char rxDiversity;
738 char txDiversity;
739 __le16 txPowerLevels[8];
740 __le16 hardVer;
741 __le16 hardCap;
742 __le16 tempRange;
743 __le16 softVer;
744 __le16 softSubVer;
745 __le16 interfaceVer;
746 __le16 softCap;
747 __le16 bootBlockVer;
748 __le16 requiredHard;
749 __le16 extSoftCap;
750} CapabilityRid;
751
752
753
754typedef struct {
755 __le16 unknown[4];
756 u8 fixed[12];
757 u8 iep[624];
758} BSSListRidExtra;
759
760typedef struct {
761 __le16 len;
762 __le16 index;
763#define RADIO_FH 1
764#define RADIO_DS 2
765#define RADIO_TMA 4
766 __le16 radioType;
767 u8 bssid[ETH_ALEN];
768 u8 zero;
769 u8 ssidLen;
770 u8 ssid[32];
771 __le16 dBm;
772#define CAP_ESS cpu_to_le16(1<<0)
773#define CAP_IBSS cpu_to_le16(1<<1)
774#define CAP_PRIVACY cpu_to_le16(1<<4)
775#define CAP_SHORTHDR cpu_to_le16(1<<5)
776 __le16 cap;
777 __le16 beaconInterval;
778 u8 rates[8];
779 struct {
780 __le16 dwell;
781 u8 hopSet;
782 u8 hopPattern;
783 u8 hopIndex;
784 u8 fill;
785 } fh;
786 __le16 dsChannel;
787 __le16 atimWindow;
788
789
790 BSSListRidExtra extra;
791} BSSListRid;
792
793typedef struct {
794 BSSListRid bss;
795 struct list_head list;
796} BSSListElement;
797
798typedef struct {
799 u8 rssipct;
800 u8 rssidBm;
801} tdsRssiEntry;
802
803typedef struct {
804 u16 len;
805 tdsRssiEntry x[256];
806} tdsRssiRid;
807
808typedef struct {
809 u16 len;
810 u16 state;
811 u16 multicastValid;
812 u8 multicast[16];
813 u16 unicastValid;
814 u8 unicast[16];
815} MICRid;
816
817typedef struct {
818 __be16 typelen;
819
820 union {
821 u8 snap[8];
822 struct {
823 u8 dsap;
824 u8 ssap;
825 u8 control;
826 u8 orgcode[3];
827 u8 fieldtype[2];
828 } llc;
829 } u;
830 __be32 mic;
831 __be32 seq;
832} MICBuffer;
833
834typedef struct {
835 u8 da[ETH_ALEN];
836 u8 sa[ETH_ALEN];
837} etherHead;
838
839#pragma pack()
840
841#define TXCTL_TXOK (1<<1)
842#define TXCTL_TXEX (1<<2)
843#define TXCTL_802_3 (0<<3)
844#define TXCTL_802_11 (1<<3)
845#define TXCTL_ETHERNET (0<<4)
846#define TXCTL_LLC (1<<4)
847#define TXCTL_RELEASE (0<<5)
848#define TXCTL_NORELEASE (1<<5)
849
850#define BUSY_FID 0x10000
851
852#ifdef CISCO_EXT
853#define AIROMAGIC 0xa55a
854
855#ifdef SIOCIWFIRSTPRIV
856#ifdef SIOCDEVPRIVATE
857#define AIROOLDIOCTL SIOCDEVPRIVATE
858#define AIROOLDIDIFC AIROOLDIOCTL + 1
859#endif
860#else
861#define SIOCIWFIRSTPRIV SIOCDEVPRIVATE
862#endif
863
864
865
866
867#define AIROIOCTL SIOCIWFIRSTPRIV
868#define AIROIDIFC AIROIOCTL + 1
869
870
871
872#define AIROGCAP 0
873#define AIROGCFG 1
874#define AIROGSLIST 2
875#define AIROGVLIST 3
876#define AIROGDRVNAM 4
877#define AIROGEHTENC 5
878#define AIROGWEPKTMP 6
879#define AIROGWEPKNV 7
880#define AIROGSTAT 8
881#define AIROGSTATSC32 9
882#define AIROGSTATSD32 10
883#define AIROGMICRID 11
884#define AIROGMICSTATS 12
885#define AIROGFLAGS 13
886#define AIROGID 14
887#define AIRORRID 15
888#define AIRORSWVERSION 17
889
890
891
892#define AIROPCAP AIROGSTATSD32 + 40
893#define AIROPVLIST AIROPCAP + 1
894#define AIROPSLIST AIROPVLIST + 1
895#define AIROPCFG AIROPSLIST + 1
896#define AIROPSIDS AIROPCFG + 1
897#define AIROPAPLIST AIROPSIDS + 1
898#define AIROPMACON AIROPAPLIST + 1
899#define AIROPMACOFF AIROPMACON + 1
900#define AIROPSTCLR AIROPMACOFF + 1
901#define AIROPWEPKEY AIROPSTCLR + 1
902#define AIROPWEPKEYNV AIROPWEPKEY + 1
903#define AIROPLEAPPWD AIROPWEPKEYNV + 1
904#define AIROPLEAPUSR AIROPLEAPPWD + 1
905
906
907
908#define AIROFLSHRST AIROPWEPKEYNV + 40
909#define AIROFLSHGCHR AIROFLSHRST + 1
910#define AIROFLSHSTFL AIROFLSHGCHR + 1
911#define AIROFLSHPCHR AIROFLSHSTFL + 1
912#define AIROFLPUTBUF AIROFLSHPCHR + 1
913#define AIRORESTART AIROFLPUTBUF + 1
914
915#define FLASHSIZE 32768
916#define AUXMEMSIZE (256 * 1024)
917
918typedef struct aironet_ioctl {
919 unsigned short command;
920 unsigned short len;
921 unsigned short ridnum;
922 unsigned char __user *data;
923} aironet_ioctl;
924
925static char swversion[] = "2.1";
926#endif
927
928#define NUM_MODULES 2
929#define MIC_MSGLEN_MAX 2400
930#define EMMH32_MSGLEN_MAX MIC_MSGLEN_MAX
931#define AIRO_DEF_MTU 2312
932
933typedef struct {
934 u32 size;
935 u8 enabled;
936 u32 rxSuccess;
937 u32 rxIncorrectMIC;
938 u32 rxNotMICed;
939 u32 rxMICPlummed;
940 u32 rxWrongSequence;
941 u32 reserve[32];
942} mic_statistics;
943
944typedef struct {
945 u32 coeff[((EMMH32_MSGLEN_MAX)+3)>>2];
946 u64 accum;
947 int position;
948 union {
949 u8 d8[4];
950 __be32 d32;
951 } part;
952} emmh32_context;
953
954typedef struct {
955 emmh32_context seed;
956 u32 rx;
957 u32 tx;
958 u32 window;
959 u8 valid;
960 u8 key[16];
961} miccntx;
962
963typedef struct {
964 miccntx mCtx;
965 miccntx uCtx;
966} mic_module;
967
968typedef struct {
969 unsigned int rid: 16;
970 unsigned int len: 15;
971 unsigned int valid: 1;
972 dma_addr_t host_addr;
973} Rid;
974
975typedef struct {
976 unsigned int offset: 15;
977 unsigned int eoc: 1;
978 unsigned int len: 15;
979 unsigned int valid: 1;
980 dma_addr_t host_addr;
981} TxFid;
982
983typedef struct {
984 unsigned int ctl: 15;
985 unsigned int rdy: 1;
986 unsigned int len: 15;
987 unsigned int valid: 1;
988 dma_addr_t host_addr;
989} RxFid;
990
991
992
993
994typedef struct {
995 unsigned char __iomem *card_ram_off;
996
997 RxFid rx_desc;
998 char *virtual_host_addr;
999
1000 int pending;
1001} HostRxDesc;
1002
1003
1004
1005
1006typedef struct {
1007 unsigned char __iomem *card_ram_off;
1008
1009 TxFid tx_desc;
1010 char *virtual_host_addr;
1011
1012 int pending;
1013} HostTxDesc;
1014
1015
1016
1017
1018typedef struct {
1019 unsigned char __iomem *card_ram_off;
1020
1021 Rid rid_desc;
1022 char *virtual_host_addr;
1023
1024} HostRidDesc;
1025
1026typedef struct {
1027 u16 sw0;
1028 u16 sw1;
1029 u16 status;
1030 u16 len;
1031#define HOST_SET (1 << 0)
1032#define HOST_INT_TX (1 << 1)
1033#define HOST_INT_TXERR (1 << 2)
1034#define HOST_LCC_PAYLOAD (1 << 4)
1035#define HOST_DONT_RLSE (1 << 5)
1036#define HOST_DONT_RETRY (1 << 6)
1037#define HOST_CLR_AID (1 << 7)
1038#define HOST_RTS (1 << 9)
1039#define HOST_SHORT (1 << 10)
1040 u16 ctl;
1041 u16 aid;
1042 u16 retries;
1043 u16 fill;
1044} TxCtlHdr;
1045
1046typedef struct {
1047 u16 ctl;
1048 u16 duration;
1049 char addr1[6];
1050 char addr2[6];
1051 char addr3[6];
1052 u16 seq;
1053 char addr4[6];
1054} WifiHdr;
1055
1056
1057typedef struct {
1058 TxCtlHdr ctlhdr;
1059 u16 fill1;
1060 u16 fill2;
1061 WifiHdr wifihdr;
1062 u16 gaplen;
1063 u16 status;
1064} WifiCtlHdr;
1065
1066static WifiCtlHdr wifictlhdr8023 = {
1067 .ctlhdr = {
1068 .ctl = HOST_DONT_RLSE,
1069 }
1070};
1071
1072
1073static const long frequency_list[] = { 2412, 2417, 2422, 2427, 2432, 2437, 2442,
1074 2447, 2452, 2457, 2462, 2467, 2472, 2484 };
1075
1076
1077#define MAX_KEY_SIZE 13
1078#define MIN_KEY_SIZE 5
1079typedef struct wep_key_t {
1080 u16 len;
1081 u8 key[16];
1082} wep_key_t;
1083
1084
1085#ifndef IW_ENCODE_NOKEY
1086#define IW_ENCODE_NOKEY 0x0800
1087#define IW_ENCODE_MODE (IW_ENCODE_DISABLED | IW_ENCODE_RESTRICTED | IW_ENCODE_OPEN)
1088#endif
1089
1090
1091static const struct iw_handler_def airo_handler_def;
1092
1093static const char version[] = "airo.c 0.6 (Ben Reed & Javier Achirica)";
1094
1095struct airo_info;
1096
1097static int get_dec_u16( char *buffer, int *start, int limit );
1098static void OUT4500( struct airo_info *, u16 register, u16 value );
1099static unsigned short IN4500( struct airo_info *, u16 register );
1100static u16 setup_card(struct airo_info*, u8 *mac, int lock);
1101static int enable_MAC(struct airo_info *ai, int lock);
1102static void disable_MAC(struct airo_info *ai, int lock);
1103static void enable_interrupts(struct airo_info*);
1104static void disable_interrupts(struct airo_info*);
1105static u16 issuecommand(struct airo_info*, Cmd *pCmd, Resp *pRsp);
1106static int bap_setup(struct airo_info*, u16 rid, u16 offset, int whichbap);
1107static int aux_bap_read(struct airo_info*, __le16 *pu16Dst, int bytelen,
1108 int whichbap);
1109static int fast_bap_read(struct airo_info*, __le16 *pu16Dst, int bytelen,
1110 int whichbap);
1111static int bap_write(struct airo_info*, const __le16 *pu16Src, int bytelen,
1112 int whichbap);
1113static int PC4500_accessrid(struct airo_info*, u16 rid, u16 accmd);
1114static int PC4500_readrid(struct airo_info*, u16 rid, void *pBuf, int len, int lock);
1115static int PC4500_writerid(struct airo_info*, u16 rid, const void
1116 *pBuf, int len, int lock);
1117static int do_writerid( struct airo_info*, u16 rid, const void *rid_data,
1118 int len, int dummy );
1119static u16 transmit_allocate(struct airo_info*, int lenPayload, int raw);
1120static int transmit_802_3_packet(struct airo_info*, int len, char *pPacket);
1121static int transmit_802_11_packet(struct airo_info*, int len, char *pPacket);
1122
1123static int mpi_send_packet (struct net_device *dev);
1124static void mpi_unmap_card(struct pci_dev *pci);
1125static void mpi_receive_802_3(struct airo_info *ai);
1126static void mpi_receive_802_11(struct airo_info *ai);
1127static int waitbusy (struct airo_info *ai);
1128
1129static irqreturn_t airo_interrupt( int irq, void* dev_id);
1130static int airo_thread(void *data);
1131static void timer_func( struct net_device *dev );
1132static int airo_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1133static struct iw_statistics *airo_get_wireless_stats (struct net_device *dev);
1134static void airo_read_wireless_stats (struct airo_info *local);
1135#ifdef CISCO_EXT
1136static int readrids(struct net_device *dev, aironet_ioctl *comp);
1137static int writerids(struct net_device *dev, aironet_ioctl *comp);
1138static int flashcard(struct net_device *dev, aironet_ioctl *comp);
1139#endif
1140static void micinit(struct airo_info *ai);
1141static int micsetup(struct airo_info *ai);
1142static int encapsulate(struct airo_info *ai, etherHead *pPacket, MICBuffer *buffer, int len);
1143static int decapsulate(struct airo_info *ai, MICBuffer *mic, etherHead *pPacket, u16 payLen);
1144
1145static u8 airo_rssi_to_dbm (tdsRssiEntry *rssi_rid, u8 rssi);
1146static u8 airo_dbm_to_pct (tdsRssiEntry *rssi_rid, u8 dbm);
1147
1148static void airo_networks_free(struct airo_info *ai);
1149
1150struct airo_info {
1151 struct net_device *dev;
1152 struct list_head dev_list;
1153
1154
1155#define MAX_FIDS 6
1156#define MPI_MAX_FIDS 1
1157 int fids[MAX_FIDS];
1158 ConfigRid config;
1159 char keyindex;
1160 char defindex;
1161 struct proc_dir_entry *proc_entry;
1162 spinlock_t aux_lock;
1163#define FLAG_RADIO_OFF 0
1164#define FLAG_RADIO_DOWN 1
1165#define FLAG_RADIO_MASK 0x03
1166#define FLAG_ENABLED 2
1167#define FLAG_ADHOC 3
1168#define FLAG_MIC_CAPABLE 4
1169#define FLAG_UPDATE_MULTI 5
1170#define FLAG_UPDATE_UNI 6
1171#define FLAG_802_11 7
1172#define FLAG_PROMISC 8
1173#define FLAG_PENDING_XMIT 9
1174#define FLAG_PENDING_XMIT11 10
1175#define FLAG_MPI 11
1176#define FLAG_REGISTERED 12
1177#define FLAG_COMMIT 13
1178#define FLAG_RESET 14
1179#define FLAG_FLASHING 15
1180#define FLAG_WPA_CAPABLE 16
1181 unsigned long flags;
1182#define JOB_DIE 0
1183#define JOB_XMIT 1
1184#define JOB_XMIT11 2
1185#define JOB_STATS 3
1186#define JOB_PROMISC 4
1187#define JOB_MIC 5
1188#define JOB_EVENT 6
1189#define JOB_AUTOWEP 7
1190#define JOB_WSTATS 8
1191#define JOB_SCAN_RESULTS 9
1192 unsigned long jobs;
1193 int (*bap_read)(struct airo_info*, __le16 *pu16Dst, int bytelen,
1194 int whichbap);
1195 unsigned short *flash;
1196 tdsRssiEntry *rssi;
1197 struct task_struct *list_bss_task;
1198 struct task_struct *airo_thread_task;
1199 struct semaphore sem;
1200 wait_queue_head_t thr_wait;
1201 unsigned long expires;
1202 struct {
1203 struct sk_buff *skb;
1204 int fid;
1205 } xmit, xmit11;
1206 struct net_device *wifidev;
1207 struct iw_statistics wstats;
1208 unsigned long scan_timeout;
1209 struct iw_spy_data spy_data;
1210 struct iw_public_data wireless_data;
1211
1212 struct crypto_cipher *tfm;
1213 mic_module mod[2];
1214 mic_statistics micstats;
1215 HostRxDesc rxfids[MPI_MAX_FIDS];
1216 HostTxDesc txfids[MPI_MAX_FIDS];
1217 HostRidDesc config_desc;
1218 unsigned long ridbus;
1219 struct sk_buff_head txq;
1220 struct pci_dev *pci;
1221 unsigned char __iomem *pcimem;
1222 unsigned char __iomem *pciaux;
1223 unsigned char *shared;
1224 dma_addr_t shared_dma;
1225 pm_message_t power;
1226 SsidRid *SSID;
1227 APListRid *APList;
1228#define PCI_SHARED_LEN 2*MPI_MAX_FIDS*PKTSIZE+RIDSIZE
1229 char proc_name[IFNAMSIZ];
1230
1231
1232 unsigned int bssListFirst;
1233 unsigned int bssListNext;
1234 unsigned int bssListRidLen;
1235
1236 struct list_head network_list;
1237 struct list_head network_free_list;
1238 BSSListElement *networks;
1239};
1240
1241static inline int bap_read(struct airo_info *ai, __le16 *pu16Dst, int bytelen,
1242 int whichbap)
1243{
1244 return ai->bap_read(ai, pu16Dst, bytelen, whichbap);
1245}
1246
1247static int setup_proc_entry( struct net_device *dev,
1248 struct airo_info *apriv );
1249static int takedown_proc_entry( struct net_device *dev,
1250 struct airo_info *apriv );
1251
1252static int cmdreset(struct airo_info *ai);
1253static int setflashmode (struct airo_info *ai);
1254static int flashgchar(struct airo_info *ai,int matchbyte,int dwelltime);
1255static int flashputbuf(struct airo_info *ai);
1256static int flashrestart(struct airo_info *ai,struct net_device *dev);
1257
1258#define airo_print(type, name, fmt, args...) \
1259 printk(type DRV_NAME "(%s): " fmt "\n", name, ##args)
1260
1261#define airo_print_info(name, fmt, args...) \
1262 airo_print(KERN_INFO, name, fmt, ##args)
1263
1264#define airo_print_dbg(name, fmt, args...) \
1265 airo_print(KERN_DEBUG, name, fmt, ##args)
1266
1267#define airo_print_warn(name, fmt, args...) \
1268 airo_print(KERN_WARNING, name, fmt, ##args)
1269
1270#define airo_print_err(name, fmt, args...) \
1271 airo_print(KERN_ERR, name, fmt, ##args)
1272
1273
1274
1275
1276
1277
1278
1279static int RxSeqValid (struct airo_info *ai,miccntx *context,int mcast,u32 micSeq);
1280static void MoveWindow(miccntx *context, u32 micSeq);
1281static void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen,
1282 struct crypto_cipher *tfm);
1283static void emmh32_init(emmh32_context *context);
1284static void emmh32_update(emmh32_context *context, u8 *pOctets, int len);
1285static void emmh32_final(emmh32_context *context, u8 digest[4]);
1286static int flashpchar(struct airo_info *ai,int byte,int dwelltime);
1287
1288
1289
1290static void micinit(struct airo_info *ai)
1291{
1292 MICRid mic_rid;
1293
1294 clear_bit(JOB_MIC, &ai->jobs);
1295 PC4500_readrid(ai, RID_MIC, &mic_rid, sizeof(mic_rid), 0);
1296 up(&ai->sem);
1297
1298 ai->micstats.enabled = (mic_rid.state & 0x00FF) ? 1 : 0;
1299
1300 if (ai->micstats.enabled) {
1301
1302 if (mic_rid.multicastValid && (!ai->mod[0].mCtx.valid ||
1303 (memcmp (ai->mod[0].mCtx.key, mic_rid.multicast,
1304 sizeof(ai->mod[0].mCtx.key)) != 0))) {
1305
1306 memcpy(&ai->mod[1].mCtx,&ai->mod[0].mCtx,sizeof(miccntx));
1307
1308 memcpy(&ai->mod[0].mCtx.key,mic_rid.multicast,sizeof(mic_rid.multicast));
1309 ai->mod[0].mCtx.window = 33;
1310 ai->mod[0].mCtx.rx = 0;
1311 ai->mod[0].mCtx.tx = 0;
1312 ai->mod[0].mCtx.valid = 1;
1313
1314
1315 emmh32_setseed(&ai->mod[0].mCtx.seed,mic_rid.multicast,sizeof(mic_rid.multicast), ai->tfm);
1316 }
1317
1318
1319 if (mic_rid.unicastValid && (!ai->mod[0].uCtx.valid ||
1320 (memcmp(ai->mod[0].uCtx.key, mic_rid.unicast,
1321 sizeof(ai->mod[0].uCtx.key)) != 0))) {
1322
1323 memcpy(&ai->mod[1].uCtx,&ai->mod[0].uCtx,sizeof(miccntx));
1324
1325 memcpy(&ai->mod[0].uCtx.key,mic_rid.unicast,sizeof(mic_rid.unicast));
1326
1327 ai->mod[0].uCtx.window = 33;
1328 ai->mod[0].uCtx.rx = 0;
1329 ai->mod[0].uCtx.tx = 0;
1330 ai->mod[0].uCtx.valid = 1;
1331
1332
1333 emmh32_setseed(&ai->mod[0].uCtx.seed, mic_rid.unicast, sizeof(mic_rid.unicast), ai->tfm);
1334 }
1335 } else {
1336
1337
1338
1339 ai->mod[0].uCtx.valid = 0;
1340 ai->mod[0].mCtx.valid = 0;
1341 }
1342}
1343
1344
1345
1346static int micsetup(struct airo_info *ai) {
1347 int i;
1348
1349 if (ai->tfm == NULL)
1350 ai->tfm = crypto_alloc_cipher("aes", 0, CRYPTO_ALG_ASYNC);
1351
1352 if (IS_ERR(ai->tfm)) {
1353 airo_print_err(ai->dev->name, "failed to load transform for AES");
1354 ai->tfm = NULL;
1355 return ERROR;
1356 }
1357
1358 for (i=0; i < NUM_MODULES; i++) {
1359 memset(&ai->mod[i].mCtx,0,sizeof(miccntx));
1360 memset(&ai->mod[i].uCtx,0,sizeof(miccntx));
1361 }
1362 return SUCCESS;
1363}
1364
1365static char micsnap[] = {0xAA,0xAA,0x03,0x00,0x40,0x96,0x00,0x02};
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383static int encapsulate(struct airo_info *ai ,etherHead *frame, MICBuffer *mic, int payLen)
1384{
1385 miccntx *context;
1386
1387
1388
1389
1390 if (test_bit(FLAG_ADHOC, &ai->flags) && (frame->da[0] & 0x1))
1391 context = &ai->mod[0].mCtx;
1392 else
1393 context = &ai->mod[0].uCtx;
1394
1395 if (!context->valid)
1396 return ERROR;
1397
1398 mic->typelen = htons(payLen + 16);
1399
1400 memcpy(&mic->u.snap, micsnap, sizeof(micsnap));
1401
1402
1403 mic->seq = htonl(context->tx);
1404 context->tx += 2;
1405
1406 emmh32_init(&context->seed);
1407 emmh32_update(&context->seed,frame->da,ETH_ALEN * 2);
1408 emmh32_update(&context->seed,(u8*)&mic->typelen,10);
1409 emmh32_update(&context->seed,(u8*)&mic->seq,sizeof(mic->seq));
1410 emmh32_update(&context->seed,frame->da + ETH_ALEN * 2,payLen);
1411 emmh32_final(&context->seed, (u8*)&mic->mic);
1412
1413
1414 mic->typelen = 0;
1415 return SUCCESS;
1416}
1417
1418typedef enum {
1419 NONE,
1420 NOMIC,
1421 NOMICPLUMMED,
1422 SEQUENCE,
1423 INCORRECTMIC,
1424} mic_error;
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439static int decapsulate(struct airo_info *ai, MICBuffer *mic, etherHead *eth, u16 payLen)
1440{
1441 int i;
1442 u32 micSEQ;
1443 miccntx *context;
1444 u8 digest[4];
1445 mic_error micError = NONE;
1446
1447
1448
1449 if (!ai->micstats.enabled) {
1450
1451 if (memcmp ((u8*)eth + 14, micsnap, sizeof(micsnap)) == 0) {
1452 ai->micstats.rxMICPlummed++;
1453 return ERROR;
1454 }
1455 return SUCCESS;
1456 }
1457
1458 if (ntohs(mic->typelen) == 0x888E)
1459 return SUCCESS;
1460
1461 if (memcmp (mic->u.snap, micsnap, sizeof(micsnap)) != 0) {
1462
1463 ai->micstats.rxMICPlummed++;
1464 return ERROR;
1465 }
1466
1467 micSEQ = ntohl(mic->seq);
1468
1469
1470
1471
1472
1473 if ( (micSEQ & 1) == 0 ) {
1474 ai->micstats.rxWrongSequence++;
1475 return ERROR;
1476 }
1477
1478 for (i = 0; i < NUM_MODULES; i++) {
1479 int mcast = eth->da[0] & 1;
1480
1481 context = mcast ? &ai->mod[i].mCtx : &ai->mod[i].uCtx;
1482
1483
1484 if (!context->valid) {
1485 if (i == 0)
1486 micError = NOMICPLUMMED;
1487 continue;
1488 }
1489
1490
1491 if (!mic->typelen)
1492 mic->typelen = htons(payLen + sizeof(MICBuffer) - 2);
1493
1494 emmh32_init(&context->seed);
1495 emmh32_update(&context->seed, eth->da, ETH_ALEN*2);
1496 emmh32_update(&context->seed, (u8 *)&mic->typelen, sizeof(mic->typelen)+sizeof(mic->u.snap));
1497 emmh32_update(&context->seed, (u8 *)&mic->seq,sizeof(mic->seq));
1498 emmh32_update(&context->seed, eth->da + ETH_ALEN*2,payLen);
1499
1500 emmh32_final(&context->seed, digest);
1501
1502 if (memcmp(digest, &mic->mic, 4)) {
1503
1504 if (i == 0)
1505 micError = INCORRECTMIC;
1506 continue;
1507 }
1508
1509
1510 if (RxSeqValid(ai, context, mcast, micSEQ) == SUCCESS) {
1511 ai->micstats.rxSuccess++;
1512 return SUCCESS;
1513 }
1514 if (i == 0)
1515 micError = SEQUENCE;
1516 }
1517
1518
1519 switch (micError) {
1520 case NOMICPLUMMED: ai->micstats.rxMICPlummed++; break;
1521 case SEQUENCE: ai->micstats.rxWrongSequence++; break;
1522 case INCORRECTMIC: ai->micstats.rxIncorrectMIC++; break;
1523 case NONE: break;
1524 case NOMIC: break;
1525 }
1526 return ERROR;
1527}
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543static int RxSeqValid (struct airo_info *ai,miccntx *context,int mcast,u32 micSeq)
1544{
1545 u32 seq,index;
1546
1547
1548
1549
1550 if (mcast) {
1551 if (test_bit(FLAG_UPDATE_MULTI, &ai->flags)) {
1552 clear_bit (FLAG_UPDATE_MULTI, &ai->flags);
1553 context->window = (micSeq > 33) ? micSeq : 33;
1554 context->rx = 0;
1555 }
1556 } else if (test_bit(FLAG_UPDATE_UNI, &ai->flags)) {
1557 clear_bit (FLAG_UPDATE_UNI, &ai->flags);
1558 context->window = (micSeq > 33) ? micSeq : 33;
1559 context->rx = 0;
1560 }
1561
1562
1563 seq = micSeq - (context->window - 33);
1564
1565
1566 if ((s32)seq < 0)
1567 return ERROR;
1568
1569 if ( seq > 64 ) {
1570
1571 MoveWindow(context,micSeq);
1572 return SUCCESS;
1573 }
1574
1575
1576 seq >>= 1;
1577 index = 1 << seq;
1578
1579 if (!(context->rx & index)) {
1580
1581
1582 context->rx |= index;
1583
1584 MoveWindow(context,micSeq);
1585
1586 return SUCCESS;
1587 }
1588 return ERROR;
1589}
1590
1591static void MoveWindow(miccntx *context, u32 micSeq)
1592{
1593 u32 shift;
1594
1595
1596 if (micSeq > context->window) {
1597 shift = (micSeq - context->window) >> 1;
1598
1599
1600 if (shift < 32)
1601 context->rx >>= shift;
1602 else
1603 context->rx = 0;
1604
1605 context->window = micSeq;
1606 }
1607}
1608
1609
1610
1611
1612
1613
1614#define MIC_ACCUM(val) \
1615 context->accum += (u64)(val) * context->coeff[coeff_position++];
1616
1617static unsigned char aes_counter[16];
1618
1619
1620static void emmh32_setseed(emmh32_context *context, u8 *pkey, int keylen,
1621 struct crypto_cipher *tfm)
1622{
1623
1624
1625
1626 int i,j;
1627 u32 counter;
1628 u8 *cipher, plain[16];
1629
1630 crypto_cipher_setkey(tfm, pkey, 16);
1631 counter = 0;
1632 for (i = 0; i < ARRAY_SIZE(context->coeff); ) {
1633 aes_counter[15] = (u8)(counter >> 0);
1634 aes_counter[14] = (u8)(counter >> 8);
1635 aes_counter[13] = (u8)(counter >> 16);
1636 aes_counter[12] = (u8)(counter >> 24);
1637 counter++;
1638 memcpy (plain, aes_counter, 16);
1639 crypto_cipher_encrypt_one(tfm, plain, plain);
1640 cipher = plain;
1641 for (j = 0; (j < 16) && (i < ARRAY_SIZE(context->coeff)); ) {
1642 context->coeff[i++] = ntohl(*(__be32 *)&cipher[j]);
1643 j += 4;
1644 }
1645 }
1646}
1647
1648
1649static void emmh32_init(emmh32_context *context)
1650{
1651
1652 context->accum = 0;
1653 context->position = 0;
1654}
1655
1656
1657static void emmh32_update(emmh32_context *context, u8 *pOctets, int len)
1658{
1659 int coeff_position, byte_position;
1660
1661 if (len == 0) return;
1662
1663 coeff_position = context->position >> 2;
1664
1665
1666 byte_position = context->position & 3;
1667 if (byte_position) {
1668
1669 do {
1670 if (len == 0) return;
1671 context->part.d8[byte_position++] = *pOctets++;
1672 context->position++;
1673 len--;
1674 } while (byte_position < 4);
1675 MIC_ACCUM(ntohl(context->part.d32));
1676 }
1677
1678
1679 while (len >= 4) {
1680 MIC_ACCUM(ntohl(*(__be32 *)pOctets));
1681 context->position += 4;
1682 pOctets += 4;
1683 len -= 4;
1684 }
1685
1686
1687 byte_position = 0;
1688 while (len > 0) {
1689 context->part.d8[byte_position++] = *pOctets++;
1690 context->position++;
1691 len--;
1692 }
1693}
1694
1695
1696static u32 mask32[4] = { 0x00000000L, 0xFF000000L, 0xFFFF0000L, 0xFFFFFF00L };
1697
1698
1699static void emmh32_final(emmh32_context *context, u8 digest[4])
1700{
1701 int coeff_position, byte_position;
1702 u32 val;
1703
1704 u64 sum, utmp;
1705 s64 stmp;
1706
1707 coeff_position = context->position >> 2;
1708
1709
1710 byte_position = context->position & 3;
1711 if (byte_position) {
1712
1713 val = ntohl(context->part.d32);
1714 MIC_ACCUM(val & mask32[byte_position]);
1715 }
1716
1717
1718 sum = context->accum;
1719 stmp = (sum & 0xffffffffLL) - ((sum >> 32) * 15);
1720 utmp = (stmp & 0xffffffffLL) - ((stmp >> 32) * 15);
1721 sum = utmp & 0xffffffffLL;
1722 if (utmp > 0x10000000fLL)
1723 sum -= 15;
1724
1725 val = (u32)sum;
1726 digest[0] = (val>>24) & 0xFF;
1727 digest[1] = (val>>16) & 0xFF;
1728 digest[2] = (val>>8) & 0xFF;
1729 digest[3] = val & 0xFF;
1730}
1731
1732static int readBSSListRid(struct airo_info *ai, int first,
1733 BSSListRid *list)
1734{
1735 Cmd cmd;
1736 Resp rsp;
1737
1738 if (first == 1) {
1739 if (ai->flags & FLAG_RADIO_MASK) return -ENETDOWN;
1740 memset(&cmd, 0, sizeof(cmd));
1741 cmd.cmd=CMD_LISTBSS;
1742 if (down_interruptible(&ai->sem))
1743 return -ERESTARTSYS;
1744 ai->list_bss_task = current;
1745 issuecommand(ai, &cmd, &rsp);
1746 up(&ai->sem);
1747
1748 schedule_timeout_uninterruptible(3 * HZ);
1749 ai->list_bss_task = NULL;
1750 }
1751 return PC4500_readrid(ai, first ? ai->bssListFirst : ai->bssListNext,
1752 list, ai->bssListRidLen, 1);
1753}
1754
1755static int readWepKeyRid(struct airo_info *ai, WepKeyRid *wkr, int temp, int lock)
1756{
1757 return PC4500_readrid(ai, temp ? RID_WEP_TEMP : RID_WEP_PERM,
1758 wkr, sizeof(*wkr), lock);
1759}
1760
1761static int writeWepKeyRid(struct airo_info *ai, WepKeyRid *wkr, int perm, int lock)
1762{
1763 int rc;
1764 rc = PC4500_writerid(ai, RID_WEP_TEMP, wkr, sizeof(*wkr), lock);
1765 if (rc!=SUCCESS)
1766 airo_print_err(ai->dev->name, "WEP_TEMP set %x", rc);
1767 if (perm) {
1768 rc = PC4500_writerid(ai, RID_WEP_PERM, wkr, sizeof(*wkr), lock);
1769 if (rc!=SUCCESS)
1770 airo_print_err(ai->dev->name, "WEP_PERM set %x", rc);
1771 }
1772 return rc;
1773}
1774
1775static int readSsidRid(struct airo_info*ai, SsidRid *ssidr)
1776{
1777 return PC4500_readrid(ai, RID_SSID, ssidr, sizeof(*ssidr), 1);
1778}
1779
1780static int writeSsidRid(struct airo_info*ai, SsidRid *pssidr, int lock)
1781{
1782 return PC4500_writerid(ai, RID_SSID, pssidr, sizeof(*pssidr), lock);
1783}
1784
1785static int readConfigRid(struct airo_info *ai, int lock)
1786{
1787 int rc;
1788 ConfigRid cfg;
1789
1790 if (ai->config.len)
1791 return SUCCESS;
1792
1793 rc = PC4500_readrid(ai, RID_ACTUALCONFIG, &cfg, sizeof(cfg), lock);
1794 if (rc != SUCCESS)
1795 return rc;
1796
1797 ai->config = cfg;
1798 return SUCCESS;
1799}
1800
1801static inline void checkThrottle(struct airo_info *ai)
1802{
1803 int i;
1804
1805 if (ai->config.authType != AUTH_OPEN && maxencrypt) {
1806 for(i=0; i<8; i++) {
1807 if (ai->config.rates[i] > maxencrypt) {
1808 ai->config.rates[i] = 0;
1809 }
1810 }
1811 }
1812}
1813
1814static int writeConfigRid(struct airo_info *ai, int lock)
1815{
1816 ConfigRid cfgr;
1817
1818 if (!test_bit (FLAG_COMMIT, &ai->flags))
1819 return SUCCESS;
1820
1821 clear_bit (FLAG_COMMIT, &ai->flags);
1822 clear_bit (FLAG_RESET, &ai->flags);
1823 checkThrottle(ai);
1824 cfgr = ai->config;
1825
1826 if ((cfgr.opmode & MODE_CFG_MASK) == MODE_STA_IBSS)
1827 set_bit(FLAG_ADHOC, &ai->flags);
1828 else
1829 clear_bit(FLAG_ADHOC, &ai->flags);
1830
1831 return PC4500_writerid( ai, RID_CONFIG, &cfgr, sizeof(cfgr), lock);
1832}
1833
1834static int readStatusRid(struct airo_info *ai, StatusRid *statr, int lock)
1835{
1836 return PC4500_readrid(ai, RID_STATUS, statr, sizeof(*statr), lock);
1837}
1838
1839static int readAPListRid(struct airo_info *ai, APListRid *aplr)
1840{
1841 return PC4500_readrid(ai, RID_APLIST, aplr, sizeof(*aplr), 1);
1842}
1843
1844static int writeAPListRid(struct airo_info *ai, APListRid *aplr, int lock)
1845{
1846 return PC4500_writerid(ai, RID_APLIST, aplr, sizeof(*aplr), lock);
1847}
1848
1849static int readCapabilityRid(struct airo_info *ai, CapabilityRid *capr, int lock)
1850{
1851 return PC4500_readrid(ai, RID_CAPABILITIES, capr, sizeof(*capr), lock);
1852}
1853
1854static int readStatsRid(struct airo_info*ai, StatsRid *sr, int rid, int lock)
1855{
1856 return PC4500_readrid(ai, rid, sr, sizeof(*sr), lock);
1857}
1858
1859static void try_auto_wep(struct airo_info *ai)
1860{
1861 if (auto_wep && !(ai->flags & FLAG_RADIO_DOWN)) {
1862 ai->expires = RUN_AT(3*HZ);
1863 wake_up_interruptible(&ai->thr_wait);
1864 }
1865}
1866
1867static int airo_open(struct net_device *dev) {
1868 struct airo_info *ai = dev->priv;
1869 int rc = 0;
1870
1871 if (test_bit(FLAG_FLASHING, &ai->flags))
1872 return -EIO;
1873
1874
1875
1876
1877
1878 if (test_bit(FLAG_COMMIT, &ai->flags)) {
1879 disable_MAC(ai, 1);
1880 writeConfigRid(ai, 1);
1881 }
1882
1883 if (ai->wifidev != dev) {
1884 clear_bit(JOB_DIE, &ai->jobs);
1885 ai->airo_thread_task = kthread_run(airo_thread, dev, dev->name);
1886 if (IS_ERR(ai->airo_thread_task))
1887 return (int)PTR_ERR(ai->airo_thread_task);
1888
1889 rc = request_irq(dev->irq, airo_interrupt, IRQF_SHARED,
1890 dev->name, dev);
1891 if (rc) {
1892 airo_print_err(dev->name,
1893 "register interrupt %d failed, rc %d",
1894 dev->irq, rc);
1895 set_bit(JOB_DIE, &ai->jobs);
1896 kthread_stop(ai->airo_thread_task);
1897 return rc;
1898 }
1899
1900
1901 clear_bit(FLAG_RADIO_DOWN, &ai->flags);
1902 enable_interrupts(ai);
1903
1904 try_auto_wep(ai);
1905 }
1906 enable_MAC(ai, 1);
1907
1908 netif_start_queue(dev);
1909 return 0;
1910}
1911
1912static int mpi_start_xmit(struct sk_buff *skb, struct net_device *dev) {
1913 int npacks, pending;
1914 unsigned long flags;
1915 struct airo_info *ai = dev->priv;
1916
1917 if (!skb) {
1918 airo_print_err(dev->name, "%s: skb == NULL!",__func__);
1919 return 0;
1920 }
1921 npacks = skb_queue_len (&ai->txq);
1922
1923 if (npacks >= MAXTXQ - 1) {
1924 netif_stop_queue (dev);
1925 if (npacks > MAXTXQ) {
1926 dev->stats.tx_fifo_errors++;
1927 return 1;
1928 }
1929 skb_queue_tail (&ai->txq, skb);
1930 return 0;
1931 }
1932
1933 spin_lock_irqsave(&ai->aux_lock, flags);
1934 skb_queue_tail (&ai->txq, skb);
1935 pending = test_bit(FLAG_PENDING_XMIT, &ai->flags);
1936 spin_unlock_irqrestore(&ai->aux_lock,flags);
1937 netif_wake_queue (dev);
1938
1939 if (pending == 0) {
1940 set_bit(FLAG_PENDING_XMIT, &ai->flags);
1941 mpi_send_packet (dev);
1942 }
1943 return 0;
1944}
1945
1946
1947
1948
1949
1950
1951
1952
1953static int mpi_send_packet (struct net_device *dev)
1954{
1955 struct sk_buff *skb;
1956 unsigned char *buffer;
1957 s16 len;
1958 __le16 *payloadLen;
1959 struct airo_info *ai = dev->priv;
1960 u8 *sendbuf;
1961
1962
1963
1964 if ((skb = skb_dequeue(&ai->txq)) == NULL) {
1965 airo_print_err(dev->name,
1966 "%s: Dequeue'd zero in send_packet()",
1967 __func__);
1968 return 0;
1969 }
1970
1971
1972 len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1973 buffer = skb->data;
1974
1975 ai->txfids[0].tx_desc.offset = 0;
1976 ai->txfids[0].tx_desc.valid = 1;
1977 ai->txfids[0].tx_desc.eoc = 1;
1978 ai->txfids[0].tx_desc.len =len+sizeof(WifiHdr);
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988 memcpy((char *)ai->txfids[0].virtual_host_addr,
1989 (char *)&wifictlhdr8023, sizeof(wifictlhdr8023));
1990
1991 payloadLen = (__le16 *)(ai->txfids[0].virtual_host_addr +
1992 sizeof(wifictlhdr8023));
1993 sendbuf = ai->txfids[0].virtual_host_addr +
1994 sizeof(wifictlhdr8023) + 2 ;
1995
1996
1997
1998
1999
2000 if (test_bit(FLAG_MIC_CAPABLE, &ai->flags) && ai->micstats.enabled &&
2001 (ntohs(((__be16 *)buffer)[6]) != 0x888E)) {
2002 MICBuffer pMic;
2003
2004 if (encapsulate(ai, (etherHead *)buffer, &pMic, len - sizeof(etherHead)) != SUCCESS)
2005 return ERROR;
2006
2007 *payloadLen = cpu_to_le16(len-sizeof(etherHead)+sizeof(pMic));
2008 ai->txfids[0].tx_desc.len += sizeof(pMic);
2009
2010 memcpy (sendbuf, buffer, sizeof(etherHead));
2011 buffer += sizeof(etherHead);
2012 sendbuf += sizeof(etherHead);
2013 memcpy (sendbuf, &pMic, sizeof(pMic));
2014 sendbuf += sizeof(pMic);
2015 memcpy (sendbuf, buffer, len - sizeof(etherHead));
2016 } else {
2017 *payloadLen = cpu_to_le16(len - sizeof(etherHead));
2018
2019 dev->trans_start = jiffies;
2020
2021
2022 memcpy(sendbuf, buffer, len);
2023 }
2024
2025 memcpy_toio(ai->txfids[0].card_ram_off,
2026 &ai->txfids[0].tx_desc, sizeof(TxFid));
2027
2028 OUT4500(ai, EVACK, 8);
2029
2030 dev_kfree_skb_any(skb);
2031 return 1;
2032}
2033
2034static void get_tx_error(struct airo_info *ai, s32 fid)
2035{
2036 __le16 status;
2037
2038 if (fid < 0)
2039 status = ((WifiCtlHdr *)ai->txfids[0].virtual_host_addr)->ctlhdr.status;
2040 else {
2041 if (bap_setup(ai, ai->fids[fid] & 0xffff, 4, BAP0) != SUCCESS)
2042 return;
2043 bap_read(ai, &status, 2, BAP0);
2044 }
2045 if (le16_to_cpu(status) & 2)
2046 ai->dev->stats.tx_aborted_errors++;
2047 if (le16_to_cpu(status) & 4)
2048 ai->dev->stats.tx_heartbeat_errors++;
2049 if (le16_to_cpu(status) & 8)
2050 { }
2051 if (le16_to_cpu(status) & 0x10)
2052 ai->dev->stats.tx_carrier_errors++;
2053 if (le16_to_cpu(status) & 0x20)
2054 { }
2055
2056
2057
2058
2059 if ((le16_to_cpu(status) & 2) ||
2060 (le16_to_cpu(status) & 4)) {
2061 union iwreq_data wrqu;
2062 char junk[0x18];
2063
2064
2065
2066
2067 bap_read(ai, (__le16 *) junk, 0x18, BAP0);
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077 memcpy(wrqu.addr.sa_data, junk + 0x12, ETH_ALEN);
2078 wrqu.addr.sa_family = ARPHRD_ETHER;
2079
2080
2081 wireless_send_event(ai->dev, IWEVTXDROP, &wrqu, NULL);
2082 }
2083}
2084
2085static void airo_end_xmit(struct net_device *dev) {
2086 u16 status;
2087 int i;
2088 struct airo_info *priv = dev->priv;
2089 struct sk_buff *skb = priv->xmit.skb;
2090 int fid = priv->xmit.fid;
2091 u32 *fids = priv->fids;
2092
2093 clear_bit(JOB_XMIT, &priv->jobs);
2094 clear_bit(FLAG_PENDING_XMIT, &priv->flags);
2095 status = transmit_802_3_packet (priv, fids[fid], skb->data);
2096 up(&priv->sem);
2097
2098 i = 0;
2099 if ( status == SUCCESS ) {
2100 dev->trans_start = jiffies;
2101 for (; i < MAX_FIDS / 2 && (priv->fids[i] & 0xffff0000); i++);
2102 } else {
2103 priv->fids[fid] &= 0xffff;
2104 dev->stats.tx_window_errors++;
2105 }
2106 if (i < MAX_FIDS / 2)
2107 netif_wake_queue(dev);
2108 dev_kfree_skb(skb);
2109}
2110
2111static int airo_start_xmit(struct sk_buff *skb, struct net_device *dev) {
2112 s16 len;
2113 int i, j;
2114 struct airo_info *priv = dev->priv;
2115 u32 *fids = priv->fids;
2116
2117 if ( skb == NULL ) {
2118 airo_print_err(dev->name, "%s: skb == NULL!", __func__);
2119 return 0;
2120 }
2121
2122
2123 for( i = 0; i < MAX_FIDS / 2 && (fids[i] & 0xffff0000); i++ );
2124 for( j = i + 1; j < MAX_FIDS / 2 && (fids[j] & 0xffff0000); j++ );
2125
2126 if ( j >= MAX_FIDS / 2 ) {
2127 netif_stop_queue(dev);
2128
2129 if (i == MAX_FIDS / 2) {
2130 dev->stats.tx_fifo_errors++;
2131 return 1;
2132 }
2133 }
2134
2135 len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
2136
2137 fids[i] |= (len << 16);
2138 priv->xmit.skb = skb;
2139 priv->xmit.fid = i;
2140 if (down_trylock(&priv->sem) != 0) {
2141 set_bit(FLAG_PENDING_XMIT, &priv->flags);
2142 netif_stop_queue(dev);
2143 set_bit(JOB_XMIT, &priv->jobs);
2144 wake_up_interruptible(&priv->thr_wait);
2145 } else
2146 airo_end_xmit(dev);
2147 return 0;
2148}
2149
2150static void airo_end_xmit11(struct net_device *dev) {
2151 u16 status;
2152 int i;
2153 struct airo_info *priv = dev->priv;
2154 struct sk_buff *skb = priv->xmit11.skb;
2155 int fid = priv->xmit11.fid;
2156 u32 *fids = priv->fids;
2157
2158 clear_bit(JOB_XMIT11, &priv->jobs);
2159 clear_bit(FLAG_PENDING_XMIT11, &priv->flags);
2160 status = transmit_802_11_packet (priv, fids[fid], skb->data);
2161 up(&priv->sem);
2162
2163 i = MAX_FIDS / 2;
2164 if ( status == SUCCESS ) {
2165 dev->trans_start = jiffies;
2166 for (; i < MAX_FIDS && (priv->fids[i] & 0xffff0000); i++);
2167 } else {
2168 priv->fids[fid] &= 0xffff;
2169 dev->stats.tx_window_errors++;
2170 }
2171 if (i < MAX_FIDS)
2172 netif_wake_queue(dev);
2173 dev_kfree_skb(skb);
2174}
2175
2176static int airo_start_xmit11(struct sk_buff *skb, struct net_device *dev) {
2177 s16 len;
2178 int i, j;
2179 struct airo_info *priv = dev->priv;
2180 u32 *fids = priv->fids;
2181
2182 if (test_bit(FLAG_MPI, &priv->flags)) {
2183
2184 netif_stop_queue(dev);
2185 return -ENETDOWN;
2186 }
2187
2188 if ( skb == NULL ) {
2189 airo_print_err(dev->name, "%s: skb == NULL!", __func__);
2190 return 0;
2191 }
2192
2193
2194 for( i = MAX_FIDS / 2; i < MAX_FIDS && (fids[i] & 0xffff0000); i++ );
2195 for( j = i + 1; j < MAX_FIDS && (fids[j] & 0xffff0000); j++ );
2196
2197 if ( j >= MAX_FIDS ) {
2198 netif_stop_queue(dev);
2199
2200 if (i == MAX_FIDS) {
2201 dev->stats.tx_fifo_errors++;
2202 return 1;
2203 }
2204 }
2205
2206 len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
2207
2208 fids[i] |= (len << 16);
2209 priv->xmit11.skb = skb;
2210 priv->xmit11.fid = i;
2211 if (down_trylock(&priv->sem) != 0) {
2212 set_bit(FLAG_PENDING_XMIT11, &priv->flags);
2213 netif_stop_queue(dev);
2214 set_bit(JOB_XMIT11, &priv->jobs);
2215 wake_up_interruptible(&priv->thr_wait);
2216 } else
2217 airo_end_xmit11(dev);
2218 return 0;
2219}
2220
2221static void airo_read_stats(struct net_device *dev)
2222{
2223 struct airo_info *ai = dev->priv;
2224 StatsRid stats_rid;
2225 __le32 *vals = stats_rid.vals;
2226
2227 clear_bit(JOB_STATS, &ai->jobs);
2228 if (ai->power.event) {
2229 up(&ai->sem);
2230 return;
2231 }
2232 readStatsRid(ai, &stats_rid, RID_STATS, 0);
2233 up(&ai->sem);
2234
2235 dev->stats.rx_packets = le32_to_cpu(vals[43]) + le32_to_cpu(vals[44]) +
2236 le32_to_cpu(vals[45]);
2237 dev->stats.tx_packets = le32_to_cpu(vals[39]) + le32_to_cpu(vals[40]) +
2238 le32_to_cpu(vals[41]);
2239 dev->stats.rx_bytes = le32_to_cpu(vals[92]);
2240 dev->stats.tx_bytes = le32_to_cpu(vals[91]);
2241 dev->stats.rx_errors = le32_to_cpu(vals[0]) + le32_to_cpu(vals[2]) +
2242 le32_to_cpu(vals[3]) + le32_to_cpu(vals[4]);
2243 dev->stats.tx_errors = le32_to_cpu(vals[42]) +
2244 dev->stats.tx_fifo_errors;
2245 dev->stats.multicast = le32_to_cpu(vals[43]);
2246 dev->stats.collisions = le32_to_cpu(vals[89]);
2247
2248
2249 dev->stats.rx_length_errors = le32_to_cpu(vals[3]);
2250 dev->stats.rx_crc_errors = le32_to_cpu(vals[4]);
2251 dev->stats.rx_frame_errors = le32_to_cpu(vals[2]);
2252 dev->stats.rx_fifo_errors = le32_to_cpu(vals[0]);
2253}
2254
2255static struct net_device_stats *airo_get_stats(struct net_device *dev)
2256{
2257 struct airo_info *local = dev->priv;
2258
2259 if (!test_bit(JOB_STATS, &local->jobs)) {
2260
2261 if (down_trylock(&local->sem) != 0) {
2262 set_bit(JOB_STATS, &local->jobs);
2263 wake_up_interruptible(&local->thr_wait);
2264 } else
2265 airo_read_stats(dev);
2266 }
2267
2268 return &dev->stats;
2269}
2270
2271static void airo_set_promisc(struct airo_info *ai) {
2272 Cmd cmd;
2273 Resp rsp;
2274
2275 memset(&cmd, 0, sizeof(cmd));
2276 cmd.cmd=CMD_SETMODE;
2277 clear_bit(JOB_PROMISC, &ai->jobs);
2278 cmd.parm0=(ai->flags&IFF_PROMISC) ? PROMISC : NOPROMISC;
2279 issuecommand(ai, &cmd, &rsp);
2280 up(&ai->sem);
2281}
2282
2283static void airo_set_multicast_list(struct net_device *dev) {
2284 struct airo_info *ai = dev->priv;
2285
2286 if ((dev->flags ^ ai->flags) & IFF_PROMISC) {
2287 change_bit(FLAG_PROMISC, &ai->flags);
2288 if (down_trylock(&ai->sem) != 0) {
2289 set_bit(JOB_PROMISC, &ai->jobs);
2290 wake_up_interruptible(&ai->thr_wait);
2291 } else
2292 airo_set_promisc(ai);
2293 }
2294
2295 if ((dev->flags&IFF_ALLMULTI)||dev->mc_count>0) {
2296
2297 }
2298}
2299
2300static int airo_set_mac_address(struct net_device *dev, void *p)
2301{
2302 struct airo_info *ai = dev->priv;
2303 struct sockaddr *addr = p;
2304
2305 readConfigRid(ai, 1);
2306 memcpy (ai->config.macAddr, addr->sa_data, dev->addr_len);
2307 set_bit (FLAG_COMMIT, &ai->flags);
2308 disable_MAC(ai, 1);
2309 writeConfigRid (ai, 1);
2310 enable_MAC(ai, 1);
2311 memcpy (ai->dev->dev_addr, addr->sa_data, dev->addr_len);
2312 if (ai->wifidev)
2313 memcpy (ai->wifidev->dev_addr, addr->sa_data, dev->addr_len);
2314 return 0;
2315}
2316
2317static int airo_change_mtu(struct net_device *dev, int new_mtu)
2318{
2319 if ((new_mtu < 68) || (new_mtu > 2400))
2320 return -EINVAL;
2321 dev->mtu = new_mtu;
2322 return 0;
2323}
2324
2325static LIST_HEAD(airo_devices);
2326
2327static void add_airo_dev(struct airo_info *ai)
2328{
2329
2330
2331 if (!ai->pci)
2332 list_add_tail(&ai->dev_list, &airo_devices);
2333}
2334
2335static void del_airo_dev(struct airo_info *ai)
2336{
2337 if (!ai->pci)
2338 list_del(&ai->dev_list);
2339}
2340
2341static int airo_close(struct net_device *dev) {
2342 struct airo_info *ai = dev->priv;
2343
2344 netif_stop_queue(dev);
2345
2346 if (ai->wifidev != dev) {
2347#ifdef POWER_ON_DOWN
2348
2349
2350
2351
2352
2353 set_bit(FLAG_RADIO_DOWN, &ai->flags);
2354 disable_MAC(ai, 1);
2355#endif
2356 disable_interrupts( ai );
2357
2358 free_irq(dev->irq, dev);
2359
2360 set_bit(JOB_DIE, &ai->jobs);
2361 kthread_stop(ai->airo_thread_task);
2362 }
2363 return 0;
2364}
2365
2366void stop_airo_card( struct net_device *dev, int freeres )
2367{
2368 struct airo_info *ai = dev->priv;
2369
2370 set_bit(FLAG_RADIO_DOWN, &ai->flags);
2371 disable_MAC(ai, 1);
2372 disable_interrupts(ai);
2373 takedown_proc_entry( dev, ai );
2374 if (test_bit(FLAG_REGISTERED, &ai->flags)) {
2375 unregister_netdev( dev );
2376 if (ai->wifidev) {
2377 unregister_netdev(ai->wifidev);
2378 free_netdev(ai->wifidev);
2379 ai->wifidev = NULL;
2380 }
2381 clear_bit(FLAG_REGISTERED, &ai->flags);
2382 }
2383
2384
2385
2386 if (test_bit(FLAG_MPI, &ai->flags) && !skb_queue_empty(&ai->txq)) {
2387 struct sk_buff *skb = NULL;
2388 for (;(skb = skb_dequeue(&ai->txq));)
2389 dev_kfree_skb(skb);
2390 }
2391
2392 airo_networks_free (ai);
2393
2394 kfree(ai->flash);
2395 kfree(ai->rssi);
2396 kfree(ai->APList);
2397 kfree(ai->SSID);
2398 if (freeres) {
2399
2400 release_region( dev->base_addr, 64 );
2401 if (test_bit(FLAG_MPI, &ai->flags)) {
2402 if (ai->pci)
2403 mpi_unmap_card(ai->pci);
2404 if (ai->pcimem)
2405 iounmap(ai->pcimem);
2406 if (ai->pciaux)
2407 iounmap(ai->pciaux);
2408 pci_free_consistent(ai->pci, PCI_SHARED_LEN,
2409 ai->shared, ai->shared_dma);
2410 }
2411 }
2412 crypto_free_cipher(ai->tfm);
2413 del_airo_dev(ai);
2414 free_netdev( dev );
2415}
2416
2417EXPORT_SYMBOL(stop_airo_card);
2418
2419static int wll_header_parse(const struct sk_buff *skb, unsigned char *haddr)
2420{
2421 memcpy(haddr, skb_mac_header(skb) + 10, ETH_ALEN);
2422 return ETH_ALEN;
2423}
2424
2425static void mpi_unmap_card(struct pci_dev *pci)
2426{
2427 unsigned long mem_start = pci_resource_start(pci, 1);
2428 unsigned long mem_len = pci_resource_len(pci, 1);
2429 unsigned long aux_start = pci_resource_start(pci, 2);
2430 unsigned long aux_len = AUXMEMSIZE;
2431
2432 release_mem_region(aux_start, aux_len);
2433 release_mem_region(mem_start, mem_len);
2434}
2435
2436
2437
2438
2439
2440
2441
2442
2443static int mpi_init_descriptors (struct airo_info *ai)
2444{
2445 Cmd cmd;
2446 Resp rsp;
2447 int i;
2448 int rc = SUCCESS;
2449
2450
2451 netif_stop_queue(ai->dev);
2452
2453 memset(&rsp,0,sizeof(rsp));
2454 memset(&cmd,0,sizeof(cmd));
2455
2456 cmd.cmd = CMD_ALLOCATEAUX;
2457 cmd.parm0 = FID_RX;
2458 cmd.parm1 = (ai->rxfids[0].card_ram_off - ai->pciaux);
2459 cmd.parm2 = MPI_MAX_FIDS;
2460 rc=issuecommand(ai, &cmd, &rsp);
2461 if (rc != SUCCESS) {
2462 airo_print_err(ai->dev->name, "Couldn't allocate RX FID");
2463 return rc;
2464 }
2465
2466 for (i=0; i<MPI_MAX_FIDS; i++) {
2467 memcpy_toio(ai->rxfids[i].card_ram_off,
2468 &ai->rxfids[i].rx_desc, sizeof(RxFid));
2469 }
2470
2471
2472
2473 memset(&rsp,0,sizeof(rsp));
2474 memset(&cmd,0,sizeof(cmd));
2475
2476 cmd.cmd = CMD_ALLOCATEAUX;
2477 cmd.parm0 = FID_TX;
2478 cmd.parm1 = (ai->txfids[0].card_ram_off - ai->pciaux);
2479 cmd.parm2 = MPI_MAX_FIDS;
2480
2481 for (i=0; i<MPI_MAX_FIDS; i++) {
2482 ai->txfids[i].tx_desc.valid = 1;
2483 memcpy_toio(ai->txfids[i].card_ram_off,
2484 &ai->txfids[i].tx_desc, sizeof(TxFid));
2485 }
2486 ai->txfids[i-1].tx_desc.eoc = 1;
2487
2488 rc=issuecommand(ai, &cmd, &rsp);
2489 if (rc != SUCCESS) {
2490 airo_print_err(ai->dev->name, "Couldn't allocate TX FID");
2491 return rc;
2492 }
2493
2494
2495 memset(&rsp,0,sizeof(rsp));
2496 memset(&cmd,0,sizeof(cmd));
2497
2498 cmd.cmd = CMD_ALLOCATEAUX;
2499 cmd.parm0 = RID_RW;
2500 cmd.parm1 = (ai->config_desc.card_ram_off - ai->pciaux);
2501 cmd.parm2 = 1;
2502 rc=issuecommand(ai, &cmd, &rsp);
2503 if (rc != SUCCESS) {
2504 airo_print_err(ai->dev->name, "Couldn't allocate RID");
2505 return rc;
2506 }
2507
2508 memcpy_toio(ai->config_desc.card_ram_off,
2509 &ai->config_desc.rid_desc, sizeof(Rid));
2510
2511 return rc;
2512}
2513
2514
2515
2516
2517
2518
2519
2520static int mpi_map_card(struct airo_info *ai, struct pci_dev *pci)
2521{
2522 unsigned long mem_start, mem_len, aux_start, aux_len;
2523 int rc = -1;
2524 int i;
2525 dma_addr_t busaddroff;
2526 unsigned char *vpackoff;
2527 unsigned char __iomem *pciaddroff;
2528
2529 mem_start = pci_resource_start(pci, 1);
2530 mem_len = pci_resource_len(pci, 1);
2531 aux_start = pci_resource_start(pci, 2);
2532 aux_len = AUXMEMSIZE;
2533
2534 if (!request_mem_region(mem_start, mem_len, DRV_NAME)) {
2535 airo_print_err("", "Couldn't get region %x[%x]",
2536 (int)mem_start, (int)mem_len);
2537 goto out;
2538 }
2539 if (!request_mem_region(aux_start, aux_len, DRV_NAME)) {
2540 airo_print_err("", "Couldn't get region %x[%x]",
2541 (int)aux_start, (int)aux_len);
2542 goto free_region1;
2543 }
2544
2545 ai->pcimem = ioremap(mem_start, mem_len);
2546 if (!ai->pcimem) {
2547 airo_print_err("", "Couldn't map region %x[%x]",
2548 (int)mem_start, (int)mem_len);
2549 goto free_region2;
2550 }
2551 ai->pciaux = ioremap(aux_start, aux_len);
2552 if (!ai->pciaux) {
2553 airo_print_err("", "Couldn't map region %x[%x]",
2554 (int)aux_start, (int)aux_len);
2555 goto free_memmap;
2556 }
2557
2558
2559 ai->shared = pci_alloc_consistent(pci, PCI_SHARED_LEN, &ai->shared_dma);
2560 if (!ai->shared) {
2561 airo_print_err("", "Couldn't alloc_consistent %d",
2562 PCI_SHARED_LEN);
2563 goto free_auxmap;
2564 }
2565
2566
2567
2568
2569 busaddroff = ai->shared_dma;
2570 pciaddroff = ai->pciaux + AUX_OFFSET;
2571 vpackoff = ai->shared;
2572
2573
2574 for(i = 0; i < MPI_MAX_FIDS; i++) {
2575 ai->rxfids[i].pending = 0;
2576 ai->rxfids[i].card_ram_off = pciaddroff;
2577 ai->rxfids[i].virtual_host_addr = vpackoff;
2578 ai->rxfids[i].rx_desc.host_addr = busaddroff;
2579 ai->rxfids[i].rx_desc.valid = 1;
2580 ai->rxfids[i].rx_desc.len = PKTSIZE;
2581 ai->rxfids[i].rx_desc.rdy = 0;
2582
2583 pciaddroff += sizeof(RxFid);
2584 busaddroff += PKTSIZE;
2585 vpackoff += PKTSIZE;
2586 }
2587
2588
2589 for(i = 0; i < MPI_MAX_FIDS; i++) {
2590 ai->txfids[i].card_ram_off = pciaddroff;
2591 ai->txfids[i].virtual_host_addr = vpackoff;
2592 ai->txfids[i].tx_desc.valid = 1;
2593 ai->txfids[i].tx_desc.host_addr = busaddroff;
2594 memcpy(ai->txfids[i].virtual_host_addr,
2595 &wifictlhdr8023, sizeof(wifictlhdr8023));
2596
2597 pciaddroff += sizeof(TxFid);
2598 busaddroff += PKTSIZE;
2599 vpackoff += PKTSIZE;
2600 }
2601 ai->txfids[i-1].tx_desc.eoc = 1;
2602
2603
2604 ai->config_desc.card_ram_off = pciaddroff;
2605 ai->config_desc.virtual_host_addr = vpackoff;
2606 ai->config_desc.rid_desc.host_addr = busaddroff;
2607 ai->ridbus = busaddroff;
2608 ai->config_desc.rid_desc.rid = 0;
2609 ai->config_desc.rid_desc.len = RIDSIZE;
2610 ai->config_desc.rid_desc.valid = 1;
2611 pciaddroff += sizeof(Rid);
2612 busaddroff += RIDSIZE;
2613 vpackoff += RIDSIZE;
2614
2615
2616 if (mpi_init_descriptors (ai) != SUCCESS)
2617 goto free_shared;
2618
2619 return 0;
2620 free_shared:
2621 pci_free_consistent(pci, PCI_SHARED_LEN, ai->shared, ai->shared_dma);
2622 free_auxmap:
2623 iounmap(ai->pciaux);
2624 free_memmap:
2625 iounmap(ai->pcimem);
2626 free_region2:
2627 release_mem_region(aux_start, aux_len);
2628 free_region1:
2629 release_mem_region(mem_start, mem_len);
2630 out:
2631 return rc;
2632}
2633
2634static const struct header_ops airo_header_ops = {
2635 .parse = wll_header_parse,
2636};
2637
2638static void wifi_setup(struct net_device *dev)
2639{
2640 dev->header_ops = &airo_header_ops;
2641 dev->hard_start_xmit = &airo_start_xmit11;
2642 dev->get_stats = &airo_get_stats;
2643 dev->set_mac_address = &airo_set_mac_address;
2644 dev->do_ioctl = &airo_ioctl;
2645 dev->wireless_handlers = &airo_handler_def;
2646 dev->change_mtu = &airo_change_mtu;
2647 dev->open = &airo_open;
2648 dev->stop = &airo_close;
2649
2650 dev->type = ARPHRD_IEEE80211;
2651 dev->hard_header_len = ETH_HLEN;
2652 dev->mtu = AIRO_DEF_MTU;
2653 dev->addr_len = ETH_ALEN;
2654 dev->tx_queue_len = 100;
2655
2656 memset(dev->broadcast,0xFF, ETH_ALEN);
2657
2658 dev->flags = IFF_BROADCAST|IFF_MULTICAST;
2659}
2660
2661static struct net_device *init_wifidev(struct airo_info *ai,
2662 struct net_device *ethdev)
2663{
2664 int err;
2665 struct net_device *dev = alloc_netdev(0, "wifi%d", wifi_setup);
2666 if (!dev)
2667 return NULL;
2668 dev->priv = ethdev->priv;
2669 dev->irq = ethdev->irq;
2670 dev->base_addr = ethdev->base_addr;
2671 dev->wireless_data = ethdev->wireless_data;
2672 SET_NETDEV_DEV(dev, ethdev->dev.parent);
2673 memcpy(dev->dev_addr, ethdev->dev_addr, dev->addr_len);
2674 err = register_netdev(dev);
2675 if (err<0) {
2676 free_netdev(dev);
2677 return NULL;
2678 }
2679 return dev;
2680}
2681
2682static int reset_card( struct net_device *dev , int lock) {
2683 struct airo_info *ai = dev->priv;
2684
2685 if (lock && down_interruptible(&ai->sem))
2686 return -1;
2687 waitbusy (ai);
2688 OUT4500(ai,COMMAND,CMD_SOFTRESET);
2689 msleep(200);
2690 waitbusy (ai);
2691 msleep(200);
2692 if (lock)
2693 up(&ai->sem);
2694 return 0;
2695}
2696
2697#define AIRO_MAX_NETWORK_COUNT 64
2698static int airo_networks_allocate(struct airo_info *ai)
2699{
2700 if (ai->networks)
2701 return 0;
2702
2703 ai->networks =
2704 kzalloc(AIRO_MAX_NETWORK_COUNT * sizeof(BSSListElement),
2705 GFP_KERNEL);
2706 if (!ai->networks) {
2707 airo_print_warn("", "Out of memory allocating beacons");
2708 return -ENOMEM;
2709 }
2710
2711 return 0;
2712}
2713
2714static void airo_networks_free(struct airo_info *ai)
2715{
2716 kfree(ai->networks);
2717 ai->networks = NULL;
2718}
2719
2720static void airo_networks_initialize(struct airo_info *ai)
2721{
2722 int i;
2723
2724 INIT_LIST_HEAD(&ai->network_free_list);
2725 INIT_LIST_HEAD(&ai->network_list);
2726 for (i = 0; i < AIRO_MAX_NETWORK_COUNT; i++)
2727 list_add_tail(&ai->networks[i].list,
2728 &ai->network_free_list);
2729}
2730
2731static int airo_test_wpa_capable(struct airo_info *ai)
2732{
2733 int status;
2734 CapabilityRid cap_rid;
2735
2736 status = readCapabilityRid(ai, &cap_rid, 1);
2737 if (status != SUCCESS) return 0;
2738
2739
2740 if (le16_to_cpu(cap_rid.softVer) > 0x530
2741 || (le16_to_cpu(cap_rid.softVer) == 0x530
2742 && le16_to_cpu(cap_rid.softSubVer) >= 17)) {
2743 airo_print_info("", "WPA is supported.");
2744 return 1;
2745 }
2746
2747
2748 airo_print_info("", "WPA unsupported (only firmware versions 5.30.17"
2749 " and greater support WPA. Detected %s)", cap_rid.prodVer);
2750 return 0;
2751}
2752
2753static struct net_device *_init_airo_card( unsigned short irq, int port,
2754 int is_pcmcia, struct pci_dev *pci,
2755 struct device *dmdev )
2756{
2757 struct net_device *dev;
2758 struct airo_info *ai;
2759 int i, rc;
2760 DECLARE_MAC_BUF(mac);
2761
2762
2763 dev = alloc_netdev(sizeof(*ai), "", ether_setup);
2764 if (!dev) {
2765 airo_print_err("", "Couldn't alloc_etherdev");
2766 return NULL;
2767 }
2768
2769 ai = dev->priv;
2770 ai->wifidev = NULL;
2771 ai->flags = 1 << FLAG_RADIO_DOWN;
2772 ai->jobs = 0;
2773 ai->dev = dev;
2774 if (pci && (pci->device == 0x5000 || pci->device == 0xa504)) {
2775 airo_print_dbg("", "Found an MPI350 card");
2776 set_bit(FLAG_MPI, &ai->flags);
2777 }
2778 spin_lock_init(&ai->aux_lock);
2779 sema_init(&ai->sem, 1);
2780 ai->config.len = 0;
2781 ai->pci = pci;
2782 init_waitqueue_head (&ai->thr_wait);
2783 ai->tfm = NULL;
2784 add_airo_dev(ai);
2785
2786 if (airo_networks_allocate (ai))
2787 goto err_out_free;
2788 airo_networks_initialize (ai);
2789
2790
2791 if (test_bit(FLAG_MPI,&ai->flags)) {
2792 skb_queue_head_init (&ai->txq);
2793 dev->hard_start_xmit = &mpi_start_xmit;
2794 } else
2795 dev->hard_start_xmit = &airo_start_xmit;
2796 dev->get_stats = &airo_get_stats;
2797 dev->set_multicast_list = &airo_set_multicast_list;
2798 dev->set_mac_address = &airo_set_mac_address;
2799 dev->do_ioctl = &airo_ioctl;
2800 dev->wireless_handlers = &airo_handler_def;
2801 ai->wireless_data.spy_data = &ai->spy_data;
2802 dev->wireless_data = &ai->wireless_data;
2803 dev->change_mtu = &airo_change_mtu;
2804 dev->open = &airo_open;
2805 dev->stop = &airo_close;
2806 dev->irq = irq;
2807 dev->base_addr = port;
2808
2809 SET_NETDEV_DEV(dev, dmdev);
2810
2811 reset_card (dev, 1);
2812 msleep(400);
2813
2814 if (!is_pcmcia) {
2815 if (!request_region(dev->base_addr, 64, DRV_NAME)) {
2816 rc = -EBUSY;
2817 airo_print_err(dev->name, "Couldn't request region");
2818 goto err_out_nets;
2819 }
2820 }
2821
2822 if (test_bit(FLAG_MPI,&ai->flags)) {
2823 if (mpi_map_card(ai, pci)) {
2824 airo_print_err("", "Could not map memory");
2825 goto err_out_res;
2826 }
2827 }
2828
2829 if (probe) {
2830 if ( setup_card( ai, dev->dev_addr, 1 ) != SUCCESS ) {
2831 airo_print_err(dev->name, "MAC could not be enabled" );
2832 rc = -EIO;
2833 goto err_out_map;
2834 }
2835 } else if (!test_bit(FLAG_MPI,&ai->flags)) {
2836 ai->bap_read = fast_bap_read;
2837 set_bit(FLAG_FLASHING, &ai->flags);
2838 }
2839
2840
2841 if (airo_test_wpa_capable(ai)) {
2842 set_bit(FLAG_WPA_CAPABLE, &ai->flags);
2843 ai->bssListFirst = RID_WPA_BSSLISTFIRST;
2844 ai->bssListNext = RID_WPA_BSSLISTNEXT;
2845 ai->bssListRidLen = sizeof(BSSListRid);
2846 } else {
2847 ai->bssListFirst = RID_BSSLISTFIRST;
2848 ai->bssListNext = RID_BSSLISTNEXT;
2849 ai->bssListRidLen = sizeof(BSSListRid) - sizeof(BSSListRidExtra);
2850 }
2851
2852 strcpy(dev->name, "eth%d");
2853 rc = register_netdev(dev);
2854 if (rc) {
2855 airo_print_err(dev->name, "Couldn't register_netdev");
2856 goto err_out_map;
2857 }
2858 ai->wifidev = init_wifidev(ai, dev);
2859 if (!ai->wifidev)
2860 goto err_out_reg;
2861
2862 set_bit(FLAG_REGISTERED,&ai->flags);
2863 airo_print_info(dev->name, "MAC enabled %s",
2864 print_mac(mac, dev->dev_addr));
2865
2866
2867 if (probe && !test_bit(FLAG_MPI,&ai->flags))
2868 for( i = 0; i < MAX_FIDS; i++ )
2869 ai->fids[i] = transmit_allocate(ai,AIRO_DEF_MTU,i>=MAX_FIDS/2);
2870
2871 if (setup_proc_entry(dev, dev->priv) < 0)
2872 goto err_out_wifi;
2873
2874 return dev;
2875
2876err_out_wifi:
2877 unregister_netdev(ai->wifidev);
2878 free_netdev(ai->wifidev);
2879err_out_reg:
2880 unregister_netdev(dev);
2881err_out_map:
2882 if (test_bit(FLAG_MPI,&ai->flags) && pci) {
2883 pci_free_consistent(pci, PCI_SHARED_LEN, ai->shared, ai->shared_dma);
2884 iounmap(ai->pciaux);
2885 iounmap(ai->pcimem);
2886 mpi_unmap_card(ai->pci);
2887 }
2888err_out_res:
2889 if (!is_pcmcia)
2890 release_region( dev->base_addr, 64 );
2891err_out_nets:
2892 airo_networks_free(ai);
2893 del_airo_dev(ai);
2894err_out_free:
2895 free_netdev(dev);
2896 return NULL;
2897}
2898
2899struct net_device *init_airo_card( unsigned short irq, int port, int is_pcmcia,
2900 struct device *dmdev)
2901{
2902 return _init_airo_card ( irq, port, is_pcmcia, NULL, dmdev);
2903}
2904
2905EXPORT_SYMBOL(init_airo_card);
2906
2907static int waitbusy (struct airo_info *ai) {
2908 int delay = 0;
2909 while ((IN4500(ai, COMMAND) & COMMAND_BUSY) && (delay < 10000)) {
2910 udelay (10);
2911 if ((++delay % 20) == 0)
2912 OUT4500(ai, EVACK, EV_CLEARCOMMANDBUSY);
2913 }
2914 return delay < 10000;
2915}
2916
2917int reset_airo_card( struct net_device *dev )
2918{
2919 int i;
2920 struct airo_info *ai = dev->priv;
2921 DECLARE_MAC_BUF(mac);
2922
2923 if (reset_card (dev, 1))
2924 return -1;
2925
2926 if ( setup_card(ai, dev->dev_addr, 1 ) != SUCCESS ) {
2927 airo_print_err(dev->name, "MAC could not be enabled");
2928 return -1;
2929 }
2930 airo_print_info(dev->name, "MAC enabled %s",
2931 print_mac(mac, dev->dev_addr));
2932
2933 if (!test_bit(FLAG_MPI,&ai->flags))
2934 for( i = 0; i < MAX_FIDS; i++ )
2935 ai->fids[i] = transmit_allocate (ai,AIRO_DEF_MTU,i>=MAX_FIDS/2);
2936
2937 enable_interrupts( ai );
2938 netif_wake_queue(dev);
2939 return 0;
2940}
2941
2942EXPORT_SYMBOL(reset_airo_card);
2943
2944static void airo_send_event(struct net_device *dev) {
2945 struct airo_info *ai = dev->priv;
2946 union iwreq_data wrqu;
2947 StatusRid status_rid;
2948
2949 clear_bit(JOB_EVENT, &ai->jobs);
2950 PC4500_readrid(ai, RID_STATUS, &status_rid, sizeof(status_rid), 0);
2951 up(&ai->sem);
2952 wrqu.data.length = 0;
2953 wrqu.data.flags = 0;
2954 memcpy(wrqu.ap_addr.sa_data, status_rid.bssid[0], ETH_ALEN);
2955 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
2956
2957
2958 wireless_send_event(dev, SIOCGIWAP, &wrqu, NULL);
2959}
2960
2961static void airo_process_scan_results (struct airo_info *ai) {
2962 union iwreq_data wrqu;
2963 BSSListRid bss;
2964 int rc;
2965 BSSListElement * loop_net;
2966 BSSListElement * tmp_net;
2967
2968
2969 list_for_each_entry_safe (loop_net, tmp_net, &ai->network_list, list) {
2970 list_move_tail (&loop_net->list, &ai->network_free_list);
2971
2972 memset (loop_net, 0, sizeof (loop_net->bss));
2973 }
2974
2975
2976 rc = PC4500_readrid(ai, ai->bssListFirst, &bss, ai->bssListRidLen, 0);
2977 if((rc) || (bss.index == cpu_to_le16(0xffff))) {
2978
2979 goto out;
2980 }
2981
2982
2983 tmp_net = NULL;
2984 while((!rc) && (bss.index != cpu_to_le16(0xffff))) {
2985
2986 if (!list_empty(&ai->network_free_list)) {
2987 tmp_net = list_entry(ai->network_free_list.next,
2988 BSSListElement, list);
2989 list_del(ai->network_free_list.next);
2990 }
2991
2992 if (tmp_net != NULL) {
2993 memcpy(tmp_net, &bss, sizeof(tmp_net->bss));
2994 list_add_tail(&tmp_net->list, &ai->network_list);
2995 tmp_net = NULL;
2996 }
2997
2998
2999 rc = PC4500_readrid(ai, ai->bssListNext,
3000 &bss, ai->bssListRidLen, 0);
3001 }
3002
3003out:
3004 ai->scan_timeout = 0;
3005 clear_bit(JOB_SCAN_RESULTS, &ai->jobs);
3006 up(&ai->sem);
3007
3008
3009
3010
3011
3012
3013
3014
3015 wrqu.data.length = 0;
3016 wrqu.data.flags = 0;
3017 wireless_send_event(ai->dev, SIOCGIWSCAN, &wrqu, NULL);
3018}
3019
3020static int airo_thread(void *data) {
3021 struct net_device *dev = data;
3022 struct airo_info *ai = dev->priv;
3023 int locked;
3024
3025 set_freezable();
3026 while(1) {
3027
3028 try_to_freeze();
3029
3030 if (test_bit(JOB_DIE, &ai->jobs))
3031 break;
3032
3033 if (ai->jobs) {
3034 locked = down_interruptible(&ai->sem);
3035 } else {
3036 wait_queue_t wait;
3037
3038 init_waitqueue_entry(&wait, current);
3039 add_wait_queue(&ai->thr_wait, &wait);
3040 for (;;) {
3041 set_current_state(TASK_INTERRUPTIBLE);
3042 if (ai->jobs)
3043 break;
3044 if (ai->expires || ai->scan_timeout) {
3045 if (ai->scan_timeout &&
3046 time_after_eq(jiffies,ai->scan_timeout)){
3047 set_bit(JOB_SCAN_RESULTS, &ai->jobs);
3048 break;
3049 } else if (ai->expires &&
3050 time_after_eq(jiffies,ai->expires)){
3051 set_bit(JOB_AUTOWEP, &ai->jobs);
3052 break;
3053 }
3054 if (!kthread_should_stop() &&
3055 !freezing(current)) {
3056 unsigned long wake_at;
3057 if (!ai->expires || !ai->scan_timeout) {
3058 wake_at = max(ai->expires,
3059 ai->scan_timeout);
3060 } else {
3061 wake_at = min(ai->expires,
3062 ai->scan_timeout);
3063 }
3064 schedule_timeout(wake_at - jiffies);
3065 continue;
3066 }
3067 } else if (!kthread_should_stop() &&
3068 !freezing(current)) {
3069 schedule();
3070 continue;
3071 }
3072 break;
3073 }
3074 current->state = TASK_RUNNING;
3075 remove_wait_queue(&ai->thr_wait, &wait);
3076 locked = 1;
3077 }
3078
3079 if (locked)
3080 continue;
3081
3082 if (test_bit(JOB_DIE, &ai->jobs)) {
3083 up(&ai->sem);
3084 break;
3085 }
3086
3087 if (ai->power.event || test_bit(FLAG_FLASHING, &ai->flags)) {
3088 up(&ai->sem);
3089 continue;
3090 }
3091
3092 if (test_bit(JOB_XMIT, &ai->jobs))
3093 airo_end_xmit(dev);
3094 else if (test_bit(JOB_XMIT11, &ai->jobs))
3095 airo_end_xmit11(dev);
3096 else if (test_bit(JOB_STATS, &ai->jobs))
3097 airo_read_stats(dev);
3098 else if (test_bit(JOB_WSTATS, &ai->jobs))
3099 airo_read_wireless_stats(ai);
3100 else if (test_bit(JOB_PROMISC, &ai->jobs))
3101 airo_set_promisc(ai);
3102 else if (test_bit(JOB_MIC, &ai->jobs))
3103 micinit(ai);
3104 else if (test_bit(JOB_EVENT, &ai->jobs))
3105 airo_send_event(dev);
3106 else if (test_bit(JOB_AUTOWEP, &ai->jobs))
3107 timer_func(dev);
3108 else if (test_bit(JOB_SCAN_RESULTS, &ai->jobs))
3109 airo_process_scan_results(ai);
3110 else
3111 up(&ai->sem);
3112 }
3113
3114 return 0;
3115}
3116
3117static int header_len(__le16 ctl)
3118{
3119 u16 fc = le16_to_cpu(ctl);
3120 switch (fc & 0xc) {
3121 case 4:
3122 if ((fc & 0xe0) == 0xc0)
3123 return 10;
3124 return 16;
3125 case 8:
3126 if ((fc & 0x300) == 0x300)
3127 return 30;
3128 }
3129 return 24;
3130}
3131
3132static irqreturn_t airo_interrupt(int irq, void *dev_id)
3133{
3134 struct net_device *dev = dev_id;
3135 u16 status;
3136 u16 fid;
3137 struct airo_info *apriv = dev->priv;
3138 u16 savedInterrupts = 0;
3139 int handled = 0;
3140
3141 if (!netif_device_present(dev))
3142 return IRQ_NONE;
3143
3144 for (;;) {
3145 status = IN4500( apriv, EVSTAT );
3146 if ( !(status & STATUS_INTS) || status == 0xffff ) break;
3147
3148 handled = 1;
3149
3150 if ( status & EV_AWAKE ) {
3151 OUT4500( apriv, EVACK, EV_AWAKE );
3152 OUT4500( apriv, EVACK, EV_AWAKE );
3153 }
3154
3155 if (!savedInterrupts) {
3156 savedInterrupts = IN4500( apriv, EVINTEN );
3157 OUT4500( apriv, EVINTEN, 0 );
3158 }
3159
3160 if ( status & EV_MIC ) {
3161 OUT4500( apriv, EVACK, EV_MIC );
3162 if (test_bit(FLAG_MIC_CAPABLE, &apriv->flags)) {
3163 set_bit(JOB_MIC, &apriv->jobs);
3164 wake_up_interruptible(&apriv->thr_wait);
3165 }
3166 }
3167 if ( status & EV_LINK ) {
3168 union iwreq_data wrqu;
3169 int scan_forceloss = 0;
3170
3171
3172
3173
3174 u16 newStatus = IN4500(apriv, LINKSTAT);
3175 OUT4500( apriv, EVACK, EV_LINK);
3176
3177#define NOBEACON 0x8000
3178#define MAXRETRIES 0x8001
3179#define MAXARL 0x8002
3180#define FORCELOSS 0x8003
3181#define TSFSYNC 0x8004
3182#define DEAUTH 0x8100
3183#define DISASS 0x8200
3184#define ASSFAIL 0x8400
3185
3186#define AUTHFAIL 0x0300
3187
3188#define ASSOCIATED 0x0400
3189#define REASSOCIATED 0x0600
3190#define RC_RESERVED 0
3191#define RC_NOREASON 1
3192#define RC_AUTHINV 2
3193#define RC_DEAUTH 3
3194
3195#define RC_NOACT 4
3196#define RC_MAXLOAD 5
3197
3198#define RC_BADCLASS2 6
3199
3200#define RC_BADCLASS3 7
3201
3202#define RC_STATLEAVE 8
3203
3204#define RC_NOAUTH 9
3205
3206 if (newStatus == FORCELOSS && apriv->scan_timeout > 0)
3207 scan_forceloss = 1;
3208 if(newStatus == ASSOCIATED || newStatus == REASSOCIATED) {
3209 if (auto_wep)
3210 apriv->expires = 0;
3211 if (apriv->list_bss_task)
3212 wake_up_process(apriv->list_bss_task);
3213 set_bit(FLAG_UPDATE_UNI, &apriv->flags);
3214 set_bit(FLAG_UPDATE_MULTI, &apriv->flags);
3215
3216 if (down_trylock(&apriv->sem) != 0) {
3217 set_bit(JOB_EVENT, &apriv->jobs);
3218 wake_up_interruptible(&apriv->thr_wait);
3219 } else
3220 airo_send_event(dev);
3221 } else if (!scan_forceloss) {
3222 if (auto_wep && !apriv->expires) {
3223 apriv->expires = RUN_AT(3*HZ);
3224 wake_up_interruptible(&apriv->thr_wait);
3225 }
3226
3227
3228 memset(wrqu.ap_addr.sa_data, '\0', ETH_ALEN);
3229 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3230 wireless_send_event(dev, SIOCGIWAP, &wrqu,NULL);
3231 }
3232 }
3233
3234
3235 if ( status & EV_RX ) {
3236 struct sk_buff *skb = NULL;
3237 __le16 fc, v;
3238 u16 len, hdrlen = 0;
3239#pragma pack(1)
3240 struct {
3241 __le16 status, len;
3242 u8 rssi[2];
3243 u8 rate;
3244 u8 freq;
3245 __le16 tmp[4];
3246 } hdr;
3247#pragma pack()
3248 u16 gap;
3249 __le16 tmpbuf[4];
3250 __le16 *buffer;
3251
3252 if (test_bit(FLAG_MPI,&apriv->flags)) {
3253 if (test_bit(FLAG_802_11, &apriv->flags))
3254 mpi_receive_802_11(apriv);
3255 else
3256 mpi_receive_802_3(apriv);
3257 OUT4500(apriv, EVACK, EV_RX);
3258 goto exitrx;
3259 }
3260
3261 fid = IN4500( apriv, RXFID );
3262
3263
3264 if (test_bit(FLAG_802_11, &apriv->flags)) {
3265 bap_setup (apriv, fid, 4, BAP0);
3266 bap_read (apriv, (__le16*)&hdr, sizeof(hdr), BAP0);
3267
3268 if (le16_to_cpu(hdr.status) & 2)
3269 hdr.len = 0;
3270 if (apriv->wifidev == NULL)
3271 hdr.len = 0;
3272 } else {
3273 bap_setup (apriv, fid, 0x36, BAP0);
3274 bap_read (apriv, &hdr.len, 2, BAP0);
3275 }
3276 len = le16_to_cpu(hdr.len);
3277
3278 if (len > AIRO_DEF_MTU) {
3279 airo_print_err(apriv->dev->name, "Bad size %d", len);
3280 goto badrx;
3281 }
3282 if (len == 0)
3283 goto badrx;
3284
3285 if (test_bit(FLAG_802_11, &apriv->flags)) {
3286 bap_read (apriv, &fc, sizeof(fc), BAP0);
3287 hdrlen = header_len(fc);
3288 } else
3289 hdrlen = ETH_ALEN * 2;
3290
3291 skb = dev_alloc_skb( len + hdrlen + 2 + 2 );
3292 if ( !skb ) {
3293 dev->stats.rx_dropped++;
3294 goto badrx;
3295 }
3296 skb_reserve(skb, 2);
3297 buffer = (__le16*)skb_put (skb, len + hdrlen);
3298 if (test_bit(FLAG_802_11, &apriv->flags)) {
3299 buffer[0] = fc;
3300 bap_read (apriv, buffer + 1, hdrlen - 2, BAP0);
3301 if (hdrlen == 24)
3302 bap_read (apriv, tmpbuf, 6, BAP0);
3303
3304 bap_read (apriv, &v, sizeof(v), BAP0);
3305 gap = le16_to_cpu(v);
3306 if (gap) {
3307 if (gap <= 8) {
3308 bap_read (apriv, tmpbuf, gap, BAP0);
3309 } else {
3310 airo_print_err(apriv->dev->name, "gaplen too "
3311 "big. Problems will follow...");
3312 }
3313 }
3314 bap_read (apriv, buffer + hdrlen/2, len, BAP0);
3315 } else {
3316 MICBuffer micbuf;
3317 bap_read (apriv, buffer, ETH_ALEN*2, BAP0);
3318 if (apriv->micstats.enabled) {
3319 bap_read (apriv,(__le16*)&micbuf,sizeof(micbuf),BAP0);
3320 if (ntohs(micbuf.typelen) > 0x05DC)
3321 bap_setup (apriv, fid, 0x44, BAP0);
3322 else {
3323 if (len <= sizeof(micbuf))
3324 goto badmic;
3325
3326 len -= sizeof(micbuf);
3327 skb_trim (skb, len + hdrlen);
3328 }
3329 }
3330 bap_read(apriv,buffer+ETH_ALEN,len,BAP0);
3331 if (decapsulate(apriv,&micbuf,(etherHead*)buffer,len)) {
3332badmic:
3333 dev_kfree_skb_irq (skb);
3334badrx:
3335 OUT4500( apriv, EVACK, EV_RX);
3336 goto exitrx;
3337 }
3338 }
3339#ifdef WIRELESS_SPY
3340 if (apriv->spy_data.spy_number > 0) {
3341 char *sa;
3342 struct iw_quality wstats;
3343
3344 if (!test_bit(FLAG_802_11, &apriv->flags)) {
3345 sa = (char*)buffer + 6;
3346 bap_setup (apriv, fid, 8, BAP0);
3347 bap_read (apriv, (__le16*)hdr.rssi, 2, BAP0);
3348 } else
3349 sa = (char*)buffer + 10;
3350 wstats.qual = hdr.rssi[0];
3351 if (apriv->rssi)
3352 wstats.level = 0x100 - apriv->rssi[hdr.rssi[1]].rssidBm;
3353 else
3354 wstats.level = (hdr.rssi[1] + 321) / 2;
3355 wstats.noise = apriv->wstats.qual.noise;
3356 wstats.updated = IW_QUAL_LEVEL_UPDATED
3357 | IW_QUAL_QUAL_UPDATED
3358 | IW_QUAL_DBM;
3359
3360 wireless_spy_update(dev, sa, &wstats);
3361 }
3362#endif
3363 OUT4500( apriv, EVACK, EV_RX);
3364
3365 if (test_bit(FLAG_802_11, &apriv->flags)) {
3366 skb_reset_mac_header(skb);
3367 skb->pkt_type = PACKET_OTHERHOST;
3368 skb->dev = apriv->wifidev;
3369 skb->protocol = htons(ETH_P_802_2);
3370 } else
3371 skb->protocol = eth_type_trans(skb,dev);
3372 skb->dev->last_rx = jiffies;
3373 skb->ip_summed = CHECKSUM_NONE;
3374
3375 netif_rx( skb );
3376 }
3377exitrx:
3378
3379
3380 if ( status & ( EV_TX|EV_TXCPY|EV_TXEXC ) ) {
3381 int i;
3382 int len = 0;
3383 int index = -1;
3384
3385 if (test_bit(FLAG_MPI,&apriv->flags)) {
3386 unsigned long flags;
3387
3388 if (status & EV_TXEXC)
3389 get_tx_error(apriv, -1);
3390 spin_lock_irqsave(&apriv->aux_lock, flags);
3391 if (!skb_queue_empty(&apriv->txq)) {
3392 spin_unlock_irqrestore(&apriv->aux_lock,flags);
3393 mpi_send_packet (dev);
3394 } else {
3395 clear_bit(FLAG_PENDING_XMIT, &apriv->flags);
3396 spin_unlock_irqrestore(&apriv->aux_lock,flags);
3397 netif_wake_queue (dev);
3398 }
3399 OUT4500( apriv, EVACK,
3400 status & (EV_TX|EV_TXCPY|EV_TXEXC));
3401 goto exittx;
3402 }
3403
3404 fid = IN4500(apriv, TXCOMPLFID);
3405
3406 for( i = 0; i < MAX_FIDS; i++ ) {
3407 if ( ( apriv->fids[i] & 0xffff ) == fid ) {
3408 len = apriv->fids[i] >> 16;
3409 index = i;
3410 }
3411 }
3412 if (index != -1) {
3413 if (status & EV_TXEXC)
3414 get_tx_error(apriv, index);
3415 OUT4500( apriv, EVACK, status & (EV_TX | EV_TXEXC));
3416
3417 apriv->fids[index] &= 0xffff;
3418 if (index < MAX_FIDS / 2) {
3419 if (!test_bit(FLAG_PENDING_XMIT, &apriv->flags))
3420 netif_wake_queue(dev);
3421 } else {
3422 if (!test_bit(FLAG_PENDING_XMIT11, &apriv->flags))
3423 netif_wake_queue(apriv->wifidev);
3424 }
3425 } else {
3426 OUT4500( apriv, EVACK, status & (EV_TX | EV_TXCPY | EV_TXEXC));
3427 airo_print_err(apriv->dev->name, "Unallocated FID was "
3428 "used to xmit" );
3429 }
3430 }
3431exittx:
3432 if ( status & ~STATUS_INTS & ~IGNORE_INTS )
3433 airo_print_warn(apriv->dev->name, "Got weird status %x",
3434 status & ~STATUS_INTS & ~IGNORE_INTS );
3435 }
3436
3437 if (savedInterrupts)
3438 OUT4500( apriv, EVINTEN, savedInterrupts );
3439
3440
3441 return IRQ_RETVAL(handled);
3442}
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453static void OUT4500( struct airo_info *ai, u16 reg, u16 val ) {
3454 if (test_bit(FLAG_MPI,&ai->flags))
3455 reg <<= 1;
3456 if ( !do8bitIO )
3457 outw( val, ai->dev->base_addr + reg );
3458 else {
3459 outb( val & 0xff, ai->dev->base_addr + reg );
3460 outb( val >> 8, ai->dev->base_addr + reg + 1 );
3461 }
3462}
3463
3464static u16 IN4500( struct airo_info *ai, u16 reg ) {
3465 unsigned short rc;
3466
3467 if (test_bit(FLAG_MPI,&ai->flags))
3468 reg <<= 1;
3469 if ( !do8bitIO )
3470 rc = inw( ai->dev->base_addr + reg );
3471 else {
3472 rc = inb( ai->dev->base_addr + reg );
3473 rc += ((int)inb( ai->dev->base_addr + reg + 1 )) << 8;
3474 }
3475 return rc;
3476}
3477
3478static int enable_MAC(struct airo_info *ai, int lock)
3479{
3480 int rc;
3481 Cmd cmd;
3482 Resp rsp;
3483
3484
3485
3486
3487
3488
3489
3490 if (ai->flags & FLAG_RADIO_MASK) return SUCCESS;
3491
3492 if (lock && down_interruptible(&ai->sem))
3493 return -ERESTARTSYS;
3494
3495 if (!test_bit(FLAG_ENABLED, &ai->flags)) {
3496 memset(&cmd, 0, sizeof(cmd));
3497 cmd.cmd = MAC_ENABLE;
3498 rc = issuecommand(ai, &cmd, &rsp);
3499 if (rc == SUCCESS)
3500 set_bit(FLAG_ENABLED, &ai->flags);
3501 } else
3502 rc = SUCCESS;
3503
3504 if (lock)
3505 up(&ai->sem);
3506
3507 if (rc)
3508 airo_print_err(ai->dev->name, "Cannot enable MAC");
3509 else if ((rsp.status & 0xFF00) != 0) {
3510 airo_print_err(ai->dev->name, "Bad MAC enable reason=%x, "
3511 "rid=%x, offset=%d", rsp.rsp0, rsp.rsp1, rsp.rsp2);
3512 rc = ERROR;
3513 }
3514 return rc;
3515}
3516
3517static void disable_MAC( struct airo_info *ai, int lock ) {
3518 Cmd cmd;
3519 Resp rsp;
3520
3521 if (lock && down_interruptible(&ai->sem))
3522 return;
3523
3524 if (test_bit(FLAG_ENABLED, &ai->flags)) {
3525 memset(&cmd, 0, sizeof(cmd));
3526 cmd.cmd = MAC_DISABLE;
3527 issuecommand(ai, &cmd, &rsp);
3528 clear_bit(FLAG_ENABLED, &ai->flags);
3529 }
3530 if (lock)
3531 up(&ai->sem);
3532}
3533
3534static void enable_interrupts( struct airo_info *ai ) {
3535
3536 OUT4500( ai, EVINTEN, STATUS_INTS );
3537}
3538
3539static void disable_interrupts( struct airo_info *ai ) {
3540 OUT4500( ai, EVINTEN, 0 );
3541}
3542
3543static void mpi_receive_802_3(struct airo_info *ai)
3544{
3545 RxFid rxd;
3546 int len = 0;
3547 struct sk_buff *skb;
3548 char *buffer;
3549 int off = 0;
3550 MICBuffer micbuf;
3551
3552 memcpy_fromio(&rxd, ai->rxfids[0].card_ram_off, sizeof(rxd));
3553
3554 if (rxd.rdy && rxd.valid == 0) {
3555 len = rxd.len + 12;
3556 if (len < 12 || len > 2048)
3557 goto badrx;
3558
3559 skb = dev_alloc_skb(len);
3560 if (!skb) {
3561 ai->dev->stats.rx_dropped++;
3562 goto badrx;
3563 }
3564 buffer = skb_put(skb,len);
3565 memcpy(buffer, ai->rxfids[0].virtual_host_addr, ETH_ALEN * 2);
3566 if (ai->micstats.enabled) {
3567 memcpy(&micbuf,
3568 ai->rxfids[0].virtual_host_addr + ETH_ALEN * 2,
3569 sizeof(micbuf));
3570 if (ntohs(micbuf.typelen) <= 0x05DC) {
3571 if (len <= sizeof(micbuf) + ETH_ALEN * 2)
3572 goto badmic;
3573
3574 off = sizeof(micbuf);
3575 skb_trim (skb, len - off);
3576 }
3577 }
3578 memcpy(buffer + ETH_ALEN * 2,
3579 ai->rxfids[0].virtual_host_addr + ETH_ALEN * 2 + off,
3580 len - ETH_ALEN * 2 - off);
3581 if (decapsulate (ai, &micbuf, (etherHead*)buffer, len - off - ETH_ALEN * 2)) {
3582badmic:
3583 dev_kfree_skb_irq (skb);
3584 goto badrx;
3585 }
3586#ifdef WIRELESS_SPY
3587 if (ai->spy_data.spy_number > 0) {
3588 char *sa;
3589 struct iw_quality wstats;
3590
3591 sa = buffer + ETH_ALEN;
3592 wstats.qual = 0;
3593 wstats.level = 0;
3594 wstats.updated = 0;
3595
3596 wireless_spy_update(ai->dev, sa, &wstats);
3597 }
3598#endif
3599
3600 skb->ip_summed = CHECKSUM_NONE;
3601 skb->protocol = eth_type_trans(skb, ai->dev);
3602 skb->dev->last_rx = jiffies;
3603 netif_rx(skb);
3604 }
3605badrx:
3606 if (rxd.valid == 0) {
3607 rxd.valid = 1;
3608 rxd.rdy = 0;
3609 rxd.len = PKTSIZE;
3610 memcpy_toio(ai->rxfids[0].card_ram_off, &rxd, sizeof(rxd));
3611 }
3612}
3613
3614void mpi_receive_802_11 (struct airo_info *ai)
3615{
3616 RxFid rxd;
3617 struct sk_buff *skb = NULL;
3618 u16 len, hdrlen = 0;
3619 __le16 fc;
3620#pragma pack(1)
3621 struct {
3622 __le16 status, len;
3623 u8 rssi[2];
3624 u8 rate;
3625 u8 freq;
3626 __le16 tmp[4];
3627 } hdr;
3628#pragma pack()
3629 u16 gap;
3630 u16 *buffer;
3631 char *ptr = ai->rxfids[0].virtual_host_addr+4;
3632
3633 memcpy_fromio(&rxd, ai->rxfids[0].card_ram_off, sizeof(rxd));
3634 memcpy ((char *)&hdr, ptr, sizeof(hdr));
3635 ptr += sizeof(hdr);
3636
3637 if (le16_to_cpu(hdr.status) & 2)
3638 hdr.len = 0;
3639 if (ai->wifidev == NULL)
3640 hdr.len = 0;
3641 len = le16_to_cpu(hdr.len);
3642 if (len > AIRO_DEF_MTU) {
3643 airo_print_err(ai->dev->name, "Bad size %d", len);
3644 goto badrx;
3645 }
3646 if (len == 0)
3647 goto badrx;
3648
3649 fc = get_unaligned((__le16 *)ptr);
3650 hdrlen = header_len(fc);
3651
3652 skb = dev_alloc_skb( len + hdrlen + 2 );
3653 if ( !skb ) {
3654 ai->dev->stats.rx_dropped++;
3655 goto badrx;
3656 }
3657 buffer = (u16*)skb_put (skb, len + hdrlen);
3658 memcpy ((char *)buffer, ptr, hdrlen);
3659 ptr += hdrlen;
3660 if (hdrlen == 24)
3661 ptr += 6;
3662 gap = get_unaligned_le16(ptr);
3663 ptr += sizeof(__le16);
3664 if (gap) {
3665 if (gap <= 8)
3666 ptr += gap;
3667 else
3668 airo_print_err(ai->dev->name,
3669 "gaplen too big. Problems will follow...");
3670 }
3671 memcpy ((char *)buffer + hdrlen, ptr, len);
3672 ptr += len;
3673#ifdef IW_WIRELESS_SPY
3674 if (ai->spy_data.spy_number > 0) {
3675 char *sa;
3676 struct iw_quality wstats;
3677
3678 sa = (char*)buffer + 10;
3679 wstats.qual = hdr.rssi[0];
3680 if (ai->rssi)
3681 wstats.level = 0x100 - ai->rssi[hdr.rssi[1]].rssidBm;
3682 else
3683 wstats.level = (hdr.rssi[1] + 321) / 2;
3684 wstats.noise = ai->wstats.qual.noise;
3685 wstats.updated = IW_QUAL_QUAL_UPDATED
3686 | IW_QUAL_LEVEL_UPDATED
3687 | IW_QUAL_DBM;
3688
3689 wireless_spy_update(ai->dev, sa, &wstats);
3690 }
3691#endif
3692 skb_reset_mac_header(skb);
3693 skb->pkt_type = PACKET_OTHERHOST;
3694 skb->dev = ai->wifidev;
3695 skb->protocol = htons(ETH_P_802_2);
3696 skb->dev->last_rx = jiffies;
3697 skb->ip_summed = CHECKSUM_NONE;
3698 netif_rx( skb );
3699badrx:
3700 if (rxd.valid == 0) {
3701 rxd.valid = 1;
3702 rxd.rdy = 0;
3703 rxd.len = PKTSIZE;
3704 memcpy_toio(ai->rxfids[0].card_ram_off, &rxd, sizeof(rxd));
3705 }
3706}
3707
3708static u16 setup_card(struct airo_info *ai, u8 *mac, int lock)
3709{
3710 Cmd cmd;
3711 Resp rsp;
3712 int status;
3713 int i;
3714 SsidRid mySsid;
3715 __le16 lastindex;
3716 WepKeyRid wkr;
3717 int rc;
3718
3719 memset( &mySsid, 0, sizeof( mySsid ) );
3720 kfree (ai->flash);
3721 ai->flash = NULL;
3722
3723
3724 cmd.cmd = NOP;
3725 cmd.parm0 = cmd.parm1 = cmd.parm2 = 0;
3726 if (lock && down_interruptible(&ai->sem))
3727 return ERROR;
3728 if ( issuecommand( ai, &cmd, &rsp ) != SUCCESS ) {
3729 if (lock)
3730 up(&ai->sem);
3731 return ERROR;
3732 }
3733 disable_MAC( ai, 0);
3734
3735
3736 if (!test_bit(FLAG_MPI,&ai->flags)) {
3737 cmd.cmd = CMD_ENABLEAUX;
3738 if (issuecommand(ai, &cmd, &rsp) != SUCCESS) {
3739 if (lock)
3740 up(&ai->sem);
3741 airo_print_err(ai->dev->name, "Error checking for AUX port");
3742 return ERROR;
3743 }
3744 if (!aux_bap || rsp.status & 0xff00) {
3745 ai->bap_read = fast_bap_read;
3746 airo_print_dbg(ai->dev->name, "Doing fast bap_reads");
3747 } else {
3748 ai->bap_read = aux_bap_read;
3749 airo_print_dbg(ai->dev->name, "Doing AUX bap_reads");
3750 }
3751 }
3752 if (lock)
3753 up(&ai->sem);
3754 if (ai->config.len == 0) {
3755 tdsRssiRid rssi_rid;
3756 CapabilityRid cap_rid;
3757
3758 kfree(ai->APList);
3759 ai->APList = NULL;
3760 kfree(ai->SSID);
3761 ai->SSID = NULL;
3762
3763 status = readConfigRid(ai, lock);
3764 if ( status != SUCCESS ) return ERROR;
3765
3766 status = readCapabilityRid(ai, &cap_rid, lock);
3767 if ( status != SUCCESS ) return ERROR;
3768
3769 status = PC4500_readrid(ai,RID_RSSI,&rssi_rid,sizeof(rssi_rid),lock);
3770 if ( status == SUCCESS ) {
3771 if (ai->rssi || (ai->rssi = kmalloc(512, GFP_KERNEL)) != NULL)
3772 memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512);
3773 }
3774 else {
3775 kfree(ai->rssi);
3776 ai->rssi = NULL;
3777 if (cap_rid.softCap & cpu_to_le16(8))
3778 ai->config.rmode |= RXMODE_NORMALIZED_RSSI;
3779 else
3780 airo_print_warn(ai->dev->name, "unknown received signal "
3781 "level scale");
3782 }
3783 ai->config.opmode = adhoc ? MODE_STA_IBSS : MODE_STA_ESS;
3784 ai->config.authType = AUTH_OPEN;
3785 ai->config.modulation = MOD_CCK;
3786
3787 if (le16_to_cpu(cap_rid.len) >= sizeof(cap_rid) &&
3788 (cap_rid.extSoftCap & cpu_to_le16(1)) &&
3789 micsetup(ai) == SUCCESS) {
3790 ai->config.opmode |= MODE_MIC;
3791 set_bit(FLAG_MIC_CAPABLE, &ai->flags);
3792 }
3793
3794
3795 for( i = 0; i < ETH_ALEN; i++ ) {
3796 mac[i] = ai->config.macAddr[i];
3797 }
3798
3799
3800
3801 if ( rates[0] ) {
3802 int i = 0;
3803 memset(ai->config.rates,0,sizeof(ai->config.rates));
3804 for( i = 0; i < 8 && rates[i]; i++ ) {
3805 ai->config.rates[i] = rates[i];
3806 }
3807 }
3808 if ( basic_rate > 0 ) {
3809 int i;
3810 for( i = 0; i < 8; i++ ) {
3811 if ( ai->config.rates[i] == basic_rate ||
3812 !ai->config.rates ) {
3813 ai->config.rates[i] = basic_rate | 0x80;
3814 break;
3815 }
3816 }
3817 }
3818 set_bit (FLAG_COMMIT, &ai->flags);
3819 }
3820
3821
3822 if ( ssids[0] ) {
3823 int i;
3824 for( i = 0; i < 3 && ssids[i]; i++ ) {
3825 size_t len = strlen(ssids[i]);
3826 if (len > 32)
3827 len = 32;
3828 mySsid.ssids[i].len = cpu_to_le16(len);
3829 memcpy(mySsid.ssids[i].ssid, ssids[i], len);
3830 }
3831 mySsid.len = cpu_to_le16(sizeof(mySsid));
3832 }
3833
3834 status = writeConfigRid(ai, lock);
3835 if ( status != SUCCESS ) return ERROR;
3836
3837
3838 if ( ssids[0] ) {
3839 status = writeSsidRid(ai, &mySsid, lock);
3840 if ( status != SUCCESS ) return ERROR;
3841 }
3842
3843 status = enable_MAC(ai, lock);
3844 if (status != SUCCESS)
3845 return ERROR;
3846
3847
3848 rc = readWepKeyRid(ai, &wkr, 1, lock);
3849 if (rc == SUCCESS) do {
3850 lastindex = wkr.kindex;
3851 if (wkr.kindex == cpu_to_le16(0xffff)) {
3852 ai->defindex = wkr.mac[0];
3853 }
3854 rc = readWepKeyRid(ai, &wkr, 0, lock);
3855 } while(lastindex != wkr.kindex);
3856
3857 try_auto_wep(ai);
3858
3859 return SUCCESS;
3860}
3861
3862static u16 issuecommand(struct airo_info *ai, Cmd *pCmd, Resp *pRsp) {
3863
3864 int max_tries = 600000;
3865
3866 if (IN4500(ai, EVSTAT) & EV_CMD)
3867 OUT4500(ai, EVACK, EV_CMD);
3868
3869 OUT4500(ai, PARAM0, pCmd->parm0);
3870 OUT4500(ai, PARAM1, pCmd->parm1);
3871 OUT4500(ai, PARAM2, pCmd->parm2);
3872 OUT4500(ai, COMMAND, pCmd->cmd);
3873
3874 while (max_tries-- && (IN4500(ai, EVSTAT) & EV_CMD) == 0) {
3875 if ((IN4500(ai, COMMAND)) == pCmd->cmd)
3876
3877 OUT4500(ai, COMMAND, pCmd->cmd);
3878 if (!in_atomic() && (max_tries & 255) == 0)
3879 schedule();
3880 }
3881
3882 if ( max_tries == -1 ) {
3883 airo_print_err(ai->dev->name,
3884 "Max tries exceeded when issueing command");
3885 if (IN4500(ai, COMMAND) & COMMAND_BUSY)
3886 OUT4500(ai, EVACK, EV_CLEARCOMMANDBUSY);
3887 return ERROR;
3888 }
3889
3890
3891 pRsp->status = IN4500(ai, STATUS);
3892 pRsp->rsp0 = IN4500(ai, RESP0);
3893 pRsp->rsp1 = IN4500(ai, RESP1);
3894 pRsp->rsp2 = IN4500(ai, RESP2);
3895 if ((pRsp->status & 0xff00)!=0 && pCmd->cmd != CMD_SOFTRESET)
3896 airo_print_err(ai->dev->name,
3897 "cmd:%x status:%x rsp0:%x rsp1:%x rsp2:%x",
3898 pCmd->cmd, pRsp->status, pRsp->rsp0, pRsp->rsp1,
3899 pRsp->rsp2);
3900
3901
3902 if (IN4500(ai, COMMAND) & COMMAND_BUSY) {
3903 OUT4500(ai, EVACK, EV_CLEARCOMMANDBUSY);
3904 }
3905
3906 OUT4500(ai, EVACK, EV_CMD);
3907
3908 return SUCCESS;
3909}
3910
3911
3912
3913
3914static int bap_setup(struct airo_info *ai, u16 rid, u16 offset, int whichbap )
3915{
3916 int timeout = 50;
3917 int max_tries = 3;
3918
3919 OUT4500(ai, SELECT0+whichbap, rid);
3920 OUT4500(ai, OFFSET0+whichbap, offset);
3921 while (1) {
3922 int status = IN4500(ai, OFFSET0+whichbap);
3923 if (status & BAP_BUSY) {
3924
3925
3926 if (timeout--) {
3927 continue;
3928 }
3929 } else if ( status & BAP_ERR ) {
3930
3931 airo_print_err(ai->dev->name, "BAP error %x %d",
3932 status, whichbap );
3933 return ERROR;
3934 } else if (status & BAP_DONE) {
3935 return SUCCESS;
3936 }
3937 if ( !(max_tries--) ) {
3938 airo_print_err(ai->dev->name,
3939 "BAP setup error too many retries\n");
3940 return ERROR;
3941 }
3942
3943 OUT4500(ai, SELECT0+whichbap, rid);
3944 OUT4500(ai, OFFSET0+whichbap, offset);
3945 timeout = 50;
3946 }
3947}
3948
3949
3950
3951
3952static u16 aux_setup(struct airo_info *ai, u16 page,
3953 u16 offset, u16 *len)
3954{
3955 u16 next;
3956
3957 OUT4500(ai, AUXPAGE, page);
3958 OUT4500(ai, AUXOFF, 0);
3959 next = IN4500(ai, AUXDATA);
3960 *len = IN4500(ai, AUXDATA)&0xff;
3961 if (offset != 4) OUT4500(ai, AUXOFF, offset);
3962 return next;
3963}
3964
3965
3966static int aux_bap_read(struct airo_info *ai, __le16 *pu16Dst,
3967 int bytelen, int whichbap)
3968{
3969 u16 len;
3970 u16 page;
3971 u16 offset;
3972 u16 next;
3973 int words;
3974 int i;
3975 unsigned long flags;
3976
3977 spin_lock_irqsave(&ai->aux_lock, flags);
3978 page = IN4500(ai, SWS0+whichbap);
3979 offset = IN4500(ai, SWS2+whichbap);
3980 next = aux_setup(ai, page, offset, &len);
3981 words = (bytelen+1)>>1;
3982
3983 for (i=0; i<words;) {
3984 int count;
3985 count = (len>>1) < (words-i) ? (len>>1) : (words-i);
3986 if ( !do8bitIO )
3987 insw( ai->dev->base_addr+DATA0+whichbap,
3988 pu16Dst+i,count );
3989 else
3990 insb( ai->dev->base_addr+DATA0+whichbap,
3991 pu16Dst+i, count << 1 );
3992 i += count;
3993 if (i<words) {
3994 next = aux_setup(ai, next, 4, &len);
3995 }
3996 }
3997 spin_unlock_irqrestore(&ai->aux_lock, flags);
3998 return SUCCESS;
3999}
4000
4001
4002
4003static int fast_bap_read(struct airo_info *ai, __le16 *pu16Dst,
4004 int bytelen, int whichbap)
4005{
4006 bytelen = (bytelen + 1) & (~1);
4007 if ( !do8bitIO )
4008 insw( ai->dev->base_addr+DATA0+whichbap, pu16Dst, bytelen>>1 );
4009 else
4010 insb( ai->dev->base_addr+DATA0+whichbap, pu16Dst, bytelen );
4011 return SUCCESS;
4012}
4013
4014
4015static int bap_write(struct airo_info *ai, const __le16 *pu16Src,
4016 int bytelen, int whichbap)
4017{
4018 bytelen = (bytelen + 1) & (~1);
4019 if ( !do8bitIO )
4020 outsw( ai->dev->base_addr+DATA0+whichbap,
4021 pu16Src, bytelen>>1 );
4022 else
4023 outsb( ai->dev->base_addr+DATA0+whichbap, pu16Src, bytelen );
4024 return SUCCESS;
4025}
4026
4027static int PC4500_accessrid(struct airo_info *ai, u16 rid, u16 accmd)
4028{
4029 Cmd cmd;
4030 Resp rsp;
4031 u16 status;
4032
4033 memset(&cmd, 0, sizeof(cmd));
4034 cmd.cmd = accmd;
4035 cmd.parm0 = rid;
4036 status = issuecommand(ai, &cmd, &rsp);
4037 if (status != 0) return status;
4038 if ( (rsp.status & 0x7F00) != 0) {
4039 return (accmd << 8) + (rsp.rsp0 & 0xFF);
4040 }
4041 return 0;
4042}
4043
4044
4045
4046static int PC4500_readrid(struct airo_info *ai, u16 rid, void *pBuf, int len, int lock)
4047{
4048 u16 status;
4049 int rc = SUCCESS;
4050
4051 if (lock) {
4052 if (down_interruptible(&ai->sem))
4053 return ERROR;
4054 }
4055 if (test_bit(FLAG_MPI,&ai->flags)) {
4056 Cmd cmd;
4057 Resp rsp;
4058
4059 memset(&cmd, 0, sizeof(cmd));
4060 memset(&rsp, 0, sizeof(rsp));
4061 ai->config_desc.rid_desc.valid = 1;
4062 ai->config_desc.rid_desc.len = RIDSIZE;
4063 ai->config_desc.rid_desc.rid = 0;
4064 ai->config_desc.rid_desc.host_addr = ai->ridbus;
4065
4066 cmd.cmd = CMD_ACCESS;
4067 cmd.parm0 = rid;
4068
4069 memcpy_toio(ai->config_desc.card_ram_off,
4070 &ai->config_desc.rid_desc, sizeof(Rid));
4071
4072 rc = issuecommand(ai, &cmd, &rsp);
4073
4074 if (rsp.status & 0x7f00)
4075 rc = rsp.rsp0;
4076 if (!rc)
4077 memcpy(pBuf, ai->config_desc.virtual_host_addr, len);
4078 goto done;
4079 } else {
4080 if ((status = PC4500_accessrid(ai, rid, CMD_ACCESS))!=SUCCESS) {
4081 rc = status;
4082 goto done;
4083 }
4084 if (bap_setup(ai, rid, 0, BAP1) != SUCCESS) {
4085 rc = ERROR;
4086 goto done;
4087 }
4088
4089 bap_read(ai, pBuf, 2, BAP1);
4090
4091 len = min(len, (int)le16_to_cpu(*(__le16*)pBuf)) - 2;
4092
4093 if ( len <= 2 ) {
4094 airo_print_err(ai->dev->name,
4095 "Rid %x has a length of %d which is too short",
4096 (int)rid, (int)len );
4097 rc = ERROR;
4098 goto done;
4099 }
4100
4101 rc = bap_read(ai, ((__le16*)pBuf)+1, len, BAP1);
4102 }
4103done:
4104 if (lock)
4105 up(&ai->sem);
4106 return rc;
4107}
4108
4109
4110
4111static int PC4500_writerid(struct airo_info *ai, u16 rid,
4112 const void *pBuf, int len, int lock)
4113{
4114 u16 status;
4115 int rc = SUCCESS;
4116
4117 *(__le16*)pBuf = cpu_to_le16((u16)len);
4118
4119 if (lock) {
4120 if (down_interruptible(&ai->sem))
4121 return ERROR;
4122 }
4123 if (test_bit(FLAG_MPI,&ai->flags)) {
4124 Cmd cmd;
4125 Resp rsp;
4126
4127 if (test_bit(FLAG_ENABLED, &ai->flags) && (RID_WEP_TEMP != rid))
4128 airo_print_err(ai->dev->name,
4129 "%s: MAC should be disabled (rid=%04x)",
4130 __func__, rid);
4131 memset(&cmd, 0, sizeof(cmd));
4132 memset(&rsp, 0, sizeof(rsp));
4133
4134 ai->config_desc.rid_desc.valid = 1;
4135 ai->config_desc.rid_desc.len = *((u16 *)pBuf);
4136 ai->config_desc.rid_desc.rid = 0;
4137
4138 cmd.cmd = CMD_WRITERID;
4139 cmd.parm0 = rid;
4140
4141 memcpy_toio(ai->config_desc.card_ram_off,
4142 &ai->config_desc.rid_desc, sizeof(Rid));
4143
4144 if (len < 4 || len > 2047) {
4145 airo_print_err(ai->dev->name, "%s: len=%d", __func__, len);
4146 rc = -1;
4147 } else {
4148 memcpy((char *)ai->config_desc.virtual_host_addr,
4149 pBuf, len);
4150
4151 rc = issuecommand(ai, &cmd, &rsp);
4152 if ((rc & 0xff00) != 0) {
4153 airo_print_err(ai->dev->name, "%s: Write rid Error %d",
4154 __func__, rc);
4155 airo_print_err(ai->dev->name, "%s: Cmd=%04x",
4156 __func__, cmd.cmd);
4157 }
4158
4159 if ((rsp.status & 0x7f00))
4160 rc = rsp.rsp0;
4161 }
4162 } else {
4163
4164 if ( (status = PC4500_accessrid(ai, rid, CMD_ACCESS)) != 0) {
4165 rc = status;
4166 goto done;
4167 }
4168
4169 if (bap_setup(ai, rid, 0, BAP1) != SUCCESS) {
4170 rc = ERROR;
4171 goto done;
4172 }
4173 bap_write(ai, pBuf, len, BAP1);
4174
4175 rc = PC4500_accessrid(ai, rid, 0x100|CMD_ACCESS);
4176 }
4177done:
4178 if (lock)
4179 up(&ai->sem);
4180 return rc;
4181}
4182
4183
4184
4185static u16 transmit_allocate(struct airo_info *ai, int lenPayload, int raw)
4186{
4187 unsigned int loop = 3000;
4188 Cmd cmd;
4189 Resp rsp;
4190 u16 txFid;
4191 __le16 txControl;
4192
4193 cmd.cmd = CMD_ALLOCATETX;
4194 cmd.parm0 = lenPayload;
4195 if (down_interruptible(&ai->sem))
4196 return ERROR;
4197 if (issuecommand(ai, &cmd, &rsp) != SUCCESS) {
4198 txFid = ERROR;
4199 goto done;
4200 }
4201 if ( (rsp.status & 0xFF00) != 0) {
4202 txFid = ERROR;
4203 goto done;
4204 }
4205
4206
4207
4208 while (((IN4500(ai, EVSTAT) & EV_ALLOC) == 0) && --loop);
4209 if (!loop) {
4210 txFid = ERROR;
4211 goto done;
4212 }
4213
4214
4215 txFid = IN4500(ai, TXALLOCFID);
4216 OUT4500(ai, EVACK, EV_ALLOC);
4217
4218
4219
4220
4221
4222
4223 if (raw)
4224 txControl = cpu_to_le16(TXCTL_TXOK | TXCTL_TXEX | TXCTL_802_11
4225 | TXCTL_ETHERNET | TXCTL_NORELEASE);
4226 else
4227 txControl = cpu_to_le16(TXCTL_TXOK | TXCTL_TXEX | TXCTL_802_3
4228 | TXCTL_ETHERNET | TXCTL_NORELEASE);
4229 if (bap_setup(ai, txFid, 0x0008, BAP1) != SUCCESS)
4230 txFid = ERROR;
4231 else
4232 bap_write(ai, &txControl, sizeof(txControl), BAP1);
4233
4234done:
4235 up(&ai->sem);
4236
4237 return txFid;
4238}
4239
4240
4241
4242
4243static int transmit_802_3_packet(struct airo_info *ai, int len, char *pPacket)
4244{
4245 __le16 payloadLen;
4246 Cmd cmd;
4247 Resp rsp;
4248 int miclen = 0;
4249 u16 txFid = len;
4250 MICBuffer pMic;
4251
4252 len >>= 16;
4253
4254 if (len <= ETH_ALEN * 2) {
4255 airo_print_warn(ai->dev->name, "Short packet %d", len);
4256 return ERROR;
4257 }
4258 len -= ETH_ALEN * 2;
4259
4260 if (test_bit(FLAG_MIC_CAPABLE, &ai->flags) && ai->micstats.enabled &&
4261 (ntohs(((__be16 *)pPacket)[6]) != 0x888E)) {
4262 if (encapsulate(ai,(etherHead *)pPacket,&pMic,len) != SUCCESS)
4263 return ERROR;
4264 miclen = sizeof(pMic);
4265 }
4266
4267
4268 if (bap_setup(ai, txFid, 0x0036, BAP1) != SUCCESS) return ERROR;
4269
4270
4271 payloadLen = cpu_to_le16(len + miclen);
4272 bap_write(ai, &payloadLen, sizeof(payloadLen),BAP1);
4273 bap_write(ai, (__le16*)pPacket, sizeof(etherHead), BAP1);
4274 if (miclen)
4275 bap_write(ai, (__le16*)&pMic, miclen, BAP1);
4276 bap_write(ai, (__le16*)(pPacket + sizeof(etherHead)), len, BAP1);
4277
4278 memset( &cmd, 0, sizeof( cmd ) );
4279 cmd.cmd = CMD_TRANSMIT;
4280 cmd.parm0 = txFid;
4281 if (issuecommand(ai, &cmd, &rsp) != SUCCESS) return ERROR;
4282 if ( (rsp.status & 0xFF00) != 0) return ERROR;
4283 return SUCCESS;
4284}
4285
4286static int transmit_802_11_packet(struct airo_info *ai, int len, char *pPacket)
4287{
4288 __le16 fc, payloadLen;
4289 Cmd cmd;
4290 Resp rsp;
4291 int hdrlen;
4292 static u8 tail[(30-10) + 2 + 6] = {[30-10] = 6};
4293
4294 u16 txFid = len;
4295 len >>= 16;
4296
4297 fc = *(__le16*)pPacket;
4298 hdrlen = header_len(fc);
4299
4300 if (len < hdrlen) {
4301 airo_print_warn(ai->dev->name, "Short packet %d", len);
4302 return ERROR;
4303 }
4304
4305
4306
4307 if (bap_setup(ai, txFid, 6, BAP1) != SUCCESS) return ERROR;
4308
4309
4310 payloadLen = cpu_to_le16(len-hdrlen);
4311 bap_write(ai, &payloadLen, sizeof(payloadLen),BAP1);
4312 if (bap_setup(ai, txFid, 0x0014, BAP1) != SUCCESS) return ERROR;
4313 bap_write(ai, (__le16 *)pPacket, hdrlen, BAP1);
4314 bap_write(ai, (__le16 *)(tail + (hdrlen - 10)), 38 - hdrlen, BAP1);
4315
4316 bap_write(ai, (__le16 *)(pPacket + hdrlen), len - hdrlen, BAP1);
4317
4318 memset( &cmd, 0, sizeof( cmd ) );
4319 cmd.cmd = CMD_TRANSMIT;
4320 cmd.parm0 = txFid;
4321 if (issuecommand(ai, &cmd, &rsp) != SUCCESS) return ERROR;
4322 if ( (rsp.status & 0xFF00) != 0) return ERROR;
4323 return SUCCESS;
4324}
4325
4326
4327
4328
4329
4330
4331static ssize_t proc_read( struct file *file,
4332 char __user *buffer,
4333 size_t len,
4334 loff_t *offset);
4335
4336static ssize_t proc_write( struct file *file,
4337 const char __user *buffer,
4338 size_t len,
4339 loff_t *offset );
4340static int proc_close( struct inode *inode, struct file *file );
4341
4342static int proc_stats_open( struct inode *inode, struct file *file );
4343static int proc_statsdelta_open( struct inode *inode, struct file *file );
4344static int proc_status_open( struct inode *inode, struct file *file );
4345static int proc_SSID_open( struct inode *inode, struct file *file );
4346static int proc_APList_open( struct inode *inode, struct file *file );
4347static int proc_BSSList_open( struct inode *inode, struct file *file );
4348static int proc_config_open( struct inode *inode, struct file *file );
4349static int proc_wepkey_open( struct inode *inode, struct file *file );
4350
4351static const struct file_operations proc_statsdelta_ops = {
4352 .owner = THIS_MODULE,
4353 .read = proc_read,
4354 .open = proc_statsdelta_open,
4355 .release = proc_close
4356};
4357
4358static const struct file_operations proc_stats_ops = {
4359 .owner = THIS_MODULE,
4360 .read = proc_read,
4361 .open = proc_stats_open,
4362 .release = proc_close
4363};
4364
4365static const struct file_operations proc_status_ops = {
4366 .owner = THIS_MODULE,
4367 .read = proc_read,
4368 .open = proc_status_open,
4369 .release = proc_close
4370};
4371
4372static const struct file_operations proc_SSID_ops = {
4373 .owner = THIS_MODULE,
4374 .read = proc_read,
4375 .write = proc_write,
4376 .open = proc_SSID_open,
4377 .release = proc_close
4378};
4379
4380static const struct file_operations proc_BSSList_ops = {
4381 .owner = THIS_MODULE,
4382 .read = proc_read,
4383 .write = proc_write,
4384 .open = proc_BSSList_open,
4385 .release = proc_close
4386};
4387
4388static const struct file_operations proc_APList_ops = {
4389 .owner = THIS_MODULE,
4390 .read = proc_read,
4391 .write = proc_write,
4392 .open = proc_APList_open,
4393 .release = proc_close
4394};
4395
4396static const struct file_operations proc_config_ops = {
4397 .owner = THIS_MODULE,
4398 .read = proc_read,
4399 .write = proc_write,
4400 .open = proc_config_open,
4401 .release = proc_close
4402};
4403
4404static const struct file_operations proc_wepkey_ops = {
4405 .owner = THIS_MODULE,
4406 .read = proc_read,
4407 .write = proc_write,
4408 .open = proc_wepkey_open,
4409 .release = proc_close
4410};
4411
4412static struct proc_dir_entry *airo_entry;
4413
4414struct proc_data {
4415 int release_buffer;
4416 int readlen;
4417 char *rbuffer;
4418 int writelen;
4419 int maxwritelen;
4420 char *wbuffer;
4421 void (*on_close) (struct inode *, struct file *);
4422};
4423
4424static int setup_proc_entry( struct net_device *dev,
4425 struct airo_info *apriv ) {
4426 struct proc_dir_entry *entry;
4427
4428 strcpy(apriv->proc_name,dev->name);
4429 apriv->proc_entry = create_proc_entry(apriv->proc_name,
4430 S_IFDIR|airo_perm,
4431 airo_entry);
4432 if (!apriv->proc_entry)
4433 goto fail;
4434 apriv->proc_entry->uid = proc_uid;
4435 apriv->proc_entry->gid = proc_gid;
4436 apriv->proc_entry->owner = THIS_MODULE;
4437
4438
4439 entry = proc_create_data("StatsDelta",
4440 S_IFREG | (S_IRUGO&proc_perm),
4441 apriv->proc_entry, &proc_statsdelta_ops, dev);
4442 if (!entry)
4443 goto fail_stats_delta;
4444 entry->uid = proc_uid;
4445 entry->gid = proc_gid;
4446
4447
4448 entry = proc_create_data("Stats",
4449 S_IFREG | (S_IRUGO&proc_perm),
4450 apriv->proc_entry, &proc_stats_ops, dev);
4451 if (!entry)
4452 goto fail_stats;
4453 entry->uid = proc_uid;
4454 entry->gid = proc_gid;
4455
4456
4457 entry = proc_create_data("Status",
4458 S_IFREG | (S_IRUGO&proc_perm),
4459 apriv->proc_entry, &proc_status_ops, dev);
4460 if (!entry)
4461 goto fail_status;
4462 entry->uid = proc_uid;
4463 entry->gid = proc_gid;
4464
4465
4466 entry = proc_create_data("Config",
4467 S_IFREG | proc_perm,
4468 apriv->proc_entry, &proc_config_ops, dev);
4469 if (!entry)
4470 goto fail_config;
4471 entry->uid = proc_uid;
4472 entry->gid = proc_gid;
4473
4474
4475 entry = proc_create_data("SSID",
4476 S_IFREG | proc_perm,
4477 apriv->proc_entry, &proc_SSID_ops, dev);
4478 if (!entry)
4479 goto fail_ssid;
4480 entry->uid = proc_uid;
4481 entry->gid = proc_gid;
4482
4483
4484 entry = proc_create_data("APList",
4485 S_IFREG | proc_perm,
4486 apriv->proc_entry, &proc_APList_ops, dev);
4487 if (!entry)
4488 goto fail_aplist;
4489 entry->uid = proc_uid;
4490 entry->gid = proc_gid;
4491
4492
4493 entry = proc_create_data("BSSList",
4494 S_IFREG | proc_perm,
4495 apriv->proc_entry, &proc_BSSList_ops, dev);
4496 if (!entry)
4497 goto fail_bsslist;
4498 entry->uid = proc_uid;
4499 entry->gid = proc_gid;
4500
4501
4502 entry = proc_create_data("WepKey",
4503 S_IFREG | proc_perm,
4504 apriv->proc_entry, &proc_wepkey_ops, dev);
4505 if (!entry)
4506 goto fail_wepkey;
4507 entry->uid = proc_uid;
4508 entry->gid = proc_gid;
4509
4510 return 0;
4511
4512fail_wepkey:
4513 remove_proc_entry("BSSList", apriv->proc_entry);
4514fail_bsslist:
4515 remove_proc_entry("APList", apriv->proc_entry);
4516fail_aplist:
4517 remove_proc_entry("SSID", apriv->proc_entry);
4518fail_ssid:
4519 remove_proc_entry("Config", apriv->proc_entry);
4520fail_config:
4521 remove_proc_entry("Status", apriv->proc_entry);
4522fail_status:
4523 remove_proc_entry("Stats", apriv->proc_entry);
4524fail_stats:
4525 remove_proc_entry("StatsDelta", apriv->proc_entry);
4526fail_stats_delta:
4527 remove_proc_entry(apriv->proc_name, airo_entry);
4528fail:
4529 return -ENOMEM;
4530}
4531
4532static int takedown_proc_entry( struct net_device *dev,
4533 struct airo_info *apriv ) {
4534 if ( !apriv->proc_entry->namelen ) return 0;
4535 remove_proc_entry("Stats",apriv->proc_entry);
4536 remove_proc_entry("StatsDelta",apriv->proc_entry);
4537 remove_proc_entry("Status",apriv->proc_entry);
4538 remove_proc_entry("Config",apriv->proc_entry);
4539 remove_proc_entry("SSID",apriv->proc_entry);
4540 remove_proc_entry("APList",apriv->proc_entry);
4541 remove_proc_entry("BSSList",apriv->proc_entry);
4542 remove_proc_entry("WepKey",apriv->proc_entry);
4543 remove_proc_entry(apriv->proc_name,airo_entry);
4544 return 0;
4545}
4546
4547
4548
4549
4550
4551
4552
4553
4554
4555
4556
4557
4558
4559static ssize_t proc_read( struct file *file,
4560 char __user *buffer,
4561 size_t len,
4562 loff_t *offset )
4563{
4564 struct proc_data *priv = file->private_data;
4565
4566 if (!priv->rbuffer)
4567 return -EINVAL;
4568
4569 return simple_read_from_buffer(buffer, len, offset, priv->rbuffer,
4570 priv->readlen);
4571}
4572
4573
4574
4575
4576
4577static ssize_t proc_write( struct file *file,
4578 const char __user *buffer,
4579 size_t len,
4580 loff_t *offset )
4581{
4582 loff_t pos = *offset;
4583 struct proc_data *priv = (struct proc_data*)file->private_data;
4584
4585 if (!priv->wbuffer)
4586 return -EINVAL;
4587
4588 if (pos < 0)
4589 return -EINVAL;
4590 if (pos >= priv->maxwritelen)
4591 return 0;
4592 if (len > priv->maxwritelen - pos)
4593 len = priv->maxwritelen - pos;
4594 if (copy_from_user(priv->wbuffer + pos, buffer, len))
4595 return -EFAULT;
4596 if ( pos + len > priv->writelen )
4597 priv->writelen = len + file->f_pos;
4598 *offset = pos + len;
4599 return len;
4600}
4601
4602static int proc_status_open(struct inode *inode, struct file *file)
4603{
4604 struct proc_data *data;
4605 struct proc_dir_entry *dp = PDE(inode);
4606 struct net_device *dev = dp->data;
4607 struct airo_info *apriv = dev->priv;
4608 CapabilityRid cap_rid;
4609 StatusRid status_rid;
4610 u16 mode;
4611 int i;
4612
4613 if ((file->private_data = kzalloc(sizeof(struct proc_data ), GFP_KERNEL)) == NULL)
4614 return -ENOMEM;
4615 data = (struct proc_data *)file->private_data;
4616 if ((data->rbuffer = kmalloc( 2048, GFP_KERNEL )) == NULL) {
4617 kfree (file->private_data);
4618 return -ENOMEM;
4619 }
4620
4621 readStatusRid(apriv, &status_rid, 1);
4622 readCapabilityRid(apriv, &cap_rid, 1);
4623
4624 mode = le16_to_cpu(status_rid.mode);
4625
4626 i = sprintf(data->rbuffer, "Status: %s%s%s%s%s%s%s%s%s\n",
4627 mode & 1 ? "CFG ": "",
4628 mode & 2 ? "ACT ": "",
4629 mode & 0x10 ? "SYN ": "",
4630 mode & 0x20 ? "LNK ": "",
4631 mode & 0x40 ? "LEAP ": "",
4632 mode & 0x80 ? "PRIV ": "",
4633 mode & 0x100 ? "KEY ": "",
4634 mode & 0x200 ? "WEP ": "",
4635 mode & 0x8000 ? "ERR ": "");
4636 sprintf( data->rbuffer+i, "Mode: %x\n"
4637 "Signal Strength: %d\n"
4638 "Signal Quality: %d\n"
4639 "SSID: %-.*s\n"
4640 "AP: %-.16s\n"
4641 "Freq: %d\n"
4642 "BitRate: %dmbs\n"
4643 "Driver Version: %s\n"
4644 "Device: %s\nManufacturer: %s\nFirmware Version: %s\n"
4645 "Radio type: %x\nCountry: %x\nHardware Version: %x\n"
4646 "Software Version: %x\nSoftware Subversion: %x\n"
4647 "Boot block version: %x\n",
4648 le16_to_cpu(status_rid.mode),
4649 le16_to_cpu(status_rid.normalizedSignalStrength),
4650 le16_to_cpu(status_rid.signalQuality),
4651 le16_to_cpu(status_rid.SSIDlen),
4652 status_rid.SSID,
4653 status_rid.apName,
4654 le16_to_cpu(status_rid.channel),
4655 le16_to_cpu(status_rid.currentXmitRate) / 2,
4656 version,
4657 cap_rid.prodName,
4658 cap_rid.manName,
4659 cap_rid.prodVer,
4660 le16_to_cpu(cap_rid.radioType),
4661 le16_to_cpu(cap_rid.country),
4662 le16_to_cpu(cap_rid.hardVer),
4663 le16_to_cpu(cap_rid.softVer),
4664 le16_to_cpu(cap_rid.softSubVer),
4665 le16_to_cpu(cap_rid.bootBlockVer));
4666 data->readlen = strlen( data->rbuffer );
4667 return 0;
4668}
4669
4670static int proc_stats_rid_open(struct inode*, struct file*, u16);
4671static int proc_statsdelta_open( struct inode *inode,
4672 struct file *file ) {
4673 if (file->f_mode&FMODE_WRITE) {
4674 return proc_stats_rid_open(inode, file, RID_STATSDELTACLEAR);
4675 }
4676 return proc_stats_rid_open(inode, file, RID_STATSDELTA);
4677}
4678
4679static int proc_stats_open( struct inode *inode, struct file *file ) {
4680 return proc_stats_rid_open(inode, file, RID_STATS);
4681}
4682
4683static int proc_stats_rid_open( struct inode *inode,
4684 struct file *file,
4685 u16 rid )
4686{
4687 struct proc_data *data;
4688 struct proc_dir_entry *dp = PDE(inode);
4689 struct net_device *dev = dp->data;
4690 struct airo_info *apriv = dev->priv;
4691 StatsRid stats;
4692 int i, j;
4693 __le32 *vals = stats.vals;
4694 int len = le16_to_cpu(stats.len);
4695
4696 if ((file->private_data = kzalloc(sizeof(struct proc_data ), GFP_KERNEL)) == NULL)
4697 return -ENOMEM;
4698 data = (struct proc_data *)file->private_data;
4699 if ((data->rbuffer = kmalloc( 4096, GFP_KERNEL )) == NULL) {
4700 kfree (file->private_data);
4701 return -ENOMEM;
4702 }
4703
4704 readStatsRid(apriv, &stats, rid, 1);
4705
4706 j = 0;
4707 for(i=0; statsLabels[i]!=(char *)-1 && i*4<len; i++) {
4708 if (!statsLabels[i]) continue;
4709 if (j+strlen(statsLabels[i])+16>4096) {
4710 airo_print_warn(apriv->dev->name,
4711 "Potentially disasterous buffer overflow averted!");
4712 break;
4713 }
4714 j+=sprintf(data->rbuffer+j, "%s: %u\n", statsLabels[i],
4715 le32_to_cpu(vals[i]));
4716 }
4717 if (i*4 >= len) {
4718 airo_print_warn(apriv->dev->name, "Got a short rid");
4719 }
4720 data->readlen = j;
4721 return 0;
4722}
4723
4724static int get_dec_u16( char *buffer, int *start, int limit ) {
4725 u16 value;
4726 int valid = 0;
4727 for( value = 0; buffer[*start] >= '0' &&
4728 buffer[*start] <= '9' &&
4729 *start < limit; (*start)++ ) {
4730 valid = 1;
4731 value *= 10;
4732 value += buffer[*start] - '0';
4733 }
4734 if ( !valid ) return -1;
4735 return value;
4736}
4737
4738static int airo_config_commit(struct net_device *dev,
4739 struct iw_request_info *info, void *zwrq,
4740 char *extra);
4741
4742static inline int sniffing_mode(struct airo_info *ai)
4743{
4744 return le16_to_cpu(ai->config.rmode & RXMODE_MASK) >=
4745 le16_to_cpu(RXMODE_RFMON);
4746}
4747
4748static void proc_config_on_close(struct inode *inode, struct file *file)
4749{
4750 struct proc_data *data = file->private_data;
4751 struct proc_dir_entry *dp = PDE(inode);
4752 struct net_device *dev = dp->data;
4753 struct airo_info *ai = dev->priv;
4754 char *line;
4755
4756 if ( !data->writelen ) return;
4757
4758 readConfigRid(ai, 1);
4759 set_bit (FLAG_COMMIT, &ai->flags);
4760
4761 line = data->wbuffer;
4762 while( line[0] ) {
4763
4764 if ( !strncmp( line, "Mode: ", 6 ) ) {
4765 line += 6;
4766 if (sniffing_mode(ai))
4767 set_bit (FLAG_RESET, &ai->flags);
4768 ai->config.rmode &= ~RXMODE_FULL_MASK;
4769 clear_bit (FLAG_802_11, &ai->flags);
4770 ai->config.opmode &= ~MODE_CFG_MASK;
4771 ai->config.scanMode = SCANMODE_ACTIVE;
4772 if ( line[0] == 'a' ) {
4773 ai->config.opmode |= MODE_STA_IBSS;
4774 } else {
4775 ai->config.opmode |= MODE_STA_ESS;
4776 if ( line[0] == 'r' ) {
4777 ai->config.rmode |= RXMODE_RFMON | RXMODE_DISABLE_802_3_HEADER;
4778 ai->config.scanMode = SCANMODE_PASSIVE;
4779 set_bit (FLAG_802_11, &ai->flags);
4780 } else if ( line[0] == 'y' ) {
4781 ai->config.rmode |= RXMODE_RFMON_ANYBSS | RXMODE_DISABLE_802_3_HEADER;
4782 ai->config.scanMode = SCANMODE_PASSIVE;
4783 set_bit (FLAG_802_11, &ai->flags);
4784 } else if ( line[0] == 'l' )
4785 ai->config.rmode |= RXMODE_LANMON;
4786 }
4787 set_bit (FLAG_COMMIT, &ai->flags);
4788 }
4789
4790
4791 else if (!strncmp(line,"Radio: ", 7)) {
4792 line += 7;
4793 if (!strncmp(line,"off",3)) {
4794 set_bit (FLAG_RADIO_OFF, &ai->flags);
4795 } else {
4796 clear_bit (FLAG_RADIO_OFF, &ai->flags);
4797 }
4798 }
4799
4800 else if ( !strncmp( line, "NodeName: ", 10 ) ) {
4801 int j;
4802
4803 line += 10;
4804 memset( ai->config.nodeName, 0, 16 );
4805
4806 for( j = 0; j < 16 && line[j] != '\n'; j++ ) {
4807 ai->config.nodeName[j] = line[j];
4808 }
4809 set_bit (FLAG_COMMIT, &ai->flags);
4810 }
4811
4812
4813 else if ( !strncmp( line, "PowerMode: ", 11 ) ) {
4814 line += 11;
4815 if ( !strncmp( line, "PSPCAM", 6 ) ) {
4816 ai->config.powerSaveMode = POWERSAVE_PSPCAM;
4817 set_bit (FLAG_COMMIT, &ai->flags);
4818 } else if ( !strncmp( line, "PSP", 3 ) ) {
4819 ai->config.powerSaveMode = POWERSAVE_PSP;
4820 set_bit (FLAG_COMMIT, &ai->flags);
4821 } else {
4822 ai->config.powerSaveMode = POWERSAVE_CAM;
4823 set_bit (FLAG_COMMIT, &ai->flags);
4824 }
4825 } else if ( !strncmp( line, "DataRates: ", 11 ) ) {
4826 int v, i = 0, k = 0;
4827
4828
4829 line += 11;
4830 while((v = get_dec_u16(line, &i, 3))!=-1) {
4831 ai->config.rates[k++] = (u8)v;
4832 line += i + 1;
4833 i = 0;
4834 }
4835 set_bit (FLAG_COMMIT, &ai->flags);
4836 } else if ( !strncmp( line, "Channel: ", 9 ) ) {
4837 int v, i = 0;
4838 line += 9;
4839 v = get_dec_u16(line, &i, i+3);
4840 if ( v != -1 ) {
4841 ai->config.channelSet = cpu_to_le16(v);
4842 set_bit (FLAG_COMMIT, &ai->flags);
4843 }
4844 } else if ( !strncmp( line, "XmitPower: ", 11 ) ) {
4845 int v, i = 0;
4846 line += 11;
4847 v = get_dec_u16(line, &i, i+3);
4848 if ( v != -1 ) {
4849 ai->config.txPower = cpu_to_le16(v);
4850 set_bit (FLAG_COMMIT, &ai->flags);
4851 }
4852 } else if ( !strncmp( line, "WEP: ", 5 ) ) {
4853 line += 5;
4854 switch( line[0] ) {
4855 case 's':
4856 ai->config.authType = AUTH_SHAREDKEY;
4857 break;
4858 case 'e':
4859 ai->config.authType = AUTH_ENCRYPT;
4860 break;
4861 default:
4862 ai->config.authType = AUTH_OPEN;
4863 break;
4864 }
4865 set_bit (FLAG_COMMIT, &ai->flags);
4866 } else if ( !strncmp( line, "LongRetryLimit: ", 16 ) ) {
4867 int v, i = 0;
4868
4869 line += 16;
4870 v = get_dec_u16(line, &i, 3);
4871 v = (v<0) ? 0 : ((v>255) ? 255 : v);
4872 ai->config.longRetryLimit = cpu_to_le16(v);
4873 set_bit (FLAG_COMMIT, &ai->flags);
4874 } else if ( !strncmp( line, "ShortRetryLimit: ", 17 ) ) {
4875 int v, i = 0;
4876
4877 line += 17;
4878 v = get_dec_u16(line, &i, 3);
4879 v = (v<0) ? 0 : ((v>255) ? 255 : v);
4880 ai->config.shortRetryLimit = cpu_to_le16(v);
4881 set_bit (FLAG_COMMIT, &ai->flags);
4882 } else if ( !strncmp( line, "RTSThreshold: ", 14 ) ) {
4883 int v, i = 0;
4884
4885 line += 14;
4886 v = get_dec_u16(line, &i, 4);
4887 v = (v<0) ? 0 : ((v>AIRO_DEF_MTU) ? AIRO_DEF_MTU : v);
4888 ai->config.rtsThres = cpu_to_le16(v);
4889 set_bit (FLAG_COMMIT, &ai->flags);
4890 } else if ( !strncmp( line, "TXMSDULifetime: ", 16 ) ) {
4891 int v, i = 0;
4892
4893 line += 16;
4894 v = get_dec_u16(line, &i, 5);
4895 v = (v<0) ? 0 : v;
4896 ai->config.txLifetime = cpu_to_le16(v);
4897 set_bit (FLAG_COMMIT, &ai->flags);
4898 } else if ( !strncmp( line, "RXMSDULifetime: ", 16 ) ) {