linux/drivers/isdn/hisax/telespci.c
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0 01/* $Id: telespci.c,v 2423.0.3 2004/01/13 14:31:26 keil Exp $0 02 *0 03 * low level stuff for Teles PCI isdn cards0 04 *0 05 * Author 210 0 T4 v7 n Rosmalen0 06 * Karsten Keil0 07 * Copyright by T4 v7 n Rosmalen0 08 * by Karsten Keil <keil@isdn4linux.de>0 09 * 0 vn>va> * This software may be used and distributed according to the terms0 11 * of the GNU General Public License, incorporated herein by reference.0 12 *0 13 */0 1440 15#include <linux/init.h>40 16#include "hisax.h"40 17#include "isac.h"40 18#include "hscx.h"40 19#include "isdnl1.h"40 20#include <linux/pci.h>40 2140 22static const char *telespci_revis = "$Revis : 2423.0.3 $"0 2340 24#define ZORAN_PO_RQ_PEN 0x0200000040 25#define ZORAN_PO_WR 0x0080000040 26#define ZORAN_PO_GID0 0x0000000040 27#define ZORAN_PO_GID1 0x0010000040 28#define ZORAN_PO_GREG0 0x0000000040 29#define ZORAN_PO_GREG1 0x0001000040 30#define ZORAN_PO_DMASK 0xFF40 3140 32#define WRITE_ADDR_ISAC (ZORAN_PO_WR | ZORAN_PO_GID0 | ZORAN_PO_GREG0)40 33#define READ_DATA_ISAC ( v4.2t3 v <52/opt0 rapci.c3L24" 3d vL24" class="line" nam3 vLcode=W 33#define WRITE_ADDR_ISAC (ZORAN_PO_WR | ZORAN_PO_GID0/t0 2t3 vt3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalued"f="drive3s/isdn/hisax/telespci.c3L25" 3d vL25" class="line" nam3 vLcode=WRITE_HSCXfine WRITE_ADDR_ISAC (ZORAN_PO_W#define ZORAN_PO_GID0 | ZORAN_PO_GREG0)4READ_DATA_ISA#define ZORAN_PO_GID0/t0 2t3 vt3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalued"f="drive3s/isdn/hisax/telespci.c3L27" 3d vL27" class="line" nam3 vLcode=W 33WRITE_ADDR_ISAC (ZORAN_PO_W#define ZORAN_PO_GID0/t0 2t3 vt3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalued"f="drive3s/isdn/hisax/telespci.c3L28" 38 vL31" class="line" nam3 vL31">0 3140 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_PO_WR do { \uff for Teles PCI isdn cardsWadrt0 2t3 vt3 2adr " +K" las); \uff for Teles PCI isdn cardsWportdatat0 2t3 vt3 2portdata " &s="line" nam3 vL24">0 24#define 0 3140 3140 220 3140 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" *#dL13">0 13 */W32">0 32#define offelne */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" *#dL13">0 13 */W33">0 33#define */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"Wu_e" nelne Wportdatat0 2t3 vt3 2portdata " &s="line" nam3 vL24">0 24#define */ */0 3140 3140 220 1440 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" *#dL13">0 13 */W32">0 32#define offelne */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 144#dL13">0 13 */W32">0 33#define datat0 2t3 vt3 2data ", ="line" nam3 vLadrt0 2t3 vt3 2adr " +K" las);/a> */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" */0 1440 3140 220 1440 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 13 */W32">0 32Wrs/it0 2t3 vt3 2rs/i " ?K" 40:0) +K="line" nam3 vLoffelne */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 13 */W+code=READHSCXfine */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"Wu_e" nelne Wportdatat0 2t3 vt3 2portdata " &s="line" nam3 vL24">0 24#define */ */0 3140 3140 220 3140 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 13 */W32">0 32Wrs/it0 2t3 vt3 2rs/i " ?K" 40:0) +K="line" nam3 vLoffelne * 0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 3140 13 */W32">0 33datat0 2t3 vt3 2data ", ="line" nam3 vLadrt0 2t3 vt3 2adr " +K" las);/a> */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" */0 3140 3140 22datat0 2t3 vt3 2data ", int ="line" nam3 vLsiztelne 0 3140 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"#dL13">0 13 */Wielne #dLfifoL13">0 13 */W32">0 32#define */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"W33">0 33#define */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"datat0 2t3 vt3 2data "[="line" nam3 vLielne Wu_e" nelne Wportdatat0 2t3 vt3 2portdata " &s="line" nam3 vL24">0 24#define */ */0 1440 3140 22datat0 2t3 vt3 2data ", int ="line" nam3 vLsiztelne 0 3140 1440 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"#dL13">0 13 */Wielne v14.2t3 v <52/opt0 rapci.c13L24"134RAN_PO_WR "1" class="line" nam3 vL1set address clasa>#dLfifoL13">0 13 */wri/spt0 2t3 vt3 2wri/sp "" class="sref">W32">0 32#define */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"W32">0 33#define datat0 2t3 vt3 2data "[="line" nam3 vLielne */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" */ */0 3140 3140 22datat0 2t3 vt3 2data ", int ="line" nam3 vLsiztelne 0 3140 3140 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 13 */Wielne 0 13 */wri/spt0 2t3 vt3 2wri/sp "" class="sref">W32">0 32Wrs/it0 2t3 vt3 2rs/i " ?K" 5F:0x1F1, ="line" nam3 vLadrt0 2t3 vt3 2adr " +K" las);/a> * 0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"W33">0 33 */29">0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"Wu_e" nelne Wportdatat0 2t3 vt3 2portdata " &s="line" nam3 vL24">0 24#define */ */0 3140 3140 22datat0 2t3 vt3 2data ", int ="line" nam3 vLsiztelne 0 3140 1440 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"0 13 */Wielne 0 13 */W32">0 32Wrs/it0 2t3 vt3 2rs/i " ?K" 5F:0x1F1, ="line" nam3 vLadrt0 2t3 vt3 2adr " +K" las);/a> * 29">0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $"wri/spt0 2t3 vt3 2wri/sp "" class="sref">W32">0 33datat0 2t3 vt3 2data "[="line" nam3 vLielne */0 WAIT_NOBUSYt0 2t3 vt3 27"3 v8WAIT_NOBUSYRAN_;$Revis : 2423.0.3 $" */ */ */0 3140 13 */0 3140 314#define 0 220 3140 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */ */0 1440 314#define 0 220 314wri/srs/it0 2t3 vt3 2wri/srs/i ""3 vL22">0 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne hscx.h"4 */0 3140 314#dfifoefine 0 22datat0 2t3 vt3 2data ", int ="line" nam3 vLsiztelne 0 3140 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne hscx.h"4 */0 3140 314#dfifoefine 0 22datat0 2t3 vt3 2data ", int ="line" nam3 vLsiztelne 0 3140 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne hscx.h"4 */ */0 3140 220 3140 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */ */0 3140 3140 220 3140 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne hscx.h"4 */0 1440 13 */0 13 */0 13 */0 3140 220 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 3140 220 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 3140 220 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 3140 220 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 3140 1440 rs/i_irq.it0 2t3fvt3 2rs/i_irq.i vL2&quo K4" class="line" nam3 vL14">0 1440 3140 3144<_interrupt/a> | 4<_interrupt ""int ="line" nam3 vLintnoefine 0 220 3140 220 1440 1440 144 */ v24.2t3 v <52/opt0 rapci.c23L24"234RAN_PO_WR ="line" nam3 vLspin_lock_irqsavtelne 0 22Wlockelne hscx.h"40 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne hscx.h"40 3140 22hscx.h"40 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #d_ISTAelne hscx.h"4ivapt0 2t3 vt3 2ivap ") == 0) {/t3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalued2ef="drive24s/isdn/hisax/telespci.c24L30"240RAN_PO_WR L"line" nam3 vLspin_unlock_irqrestortelne 0 22Wlockelne hscx.h"40 144 */ */ v2ss/isdn/hisax/telespci.c2LL24"244RAN_PO_WR ""line" nam3 vLrs/i_interrupt/a> | 0 220 1440 13 */Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 1440 3140 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #define 0 144wri/srs/it0 2t3 vt3 2wri/srs/i ""3 vL22">0 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #define 0 1440 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #d_a>#define 0 1440 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #d_a>#define */0 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #define */0 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne #define */ v25ers/isdn/hisax/telespci25L24"254RAN_PO_WR ="line" nam3 vLspin_unlock_irqrestortelne 0 22Wlockelne hscx.h"40 144 */0 3140 31444< ""struct ="line" nam3 vLI3 vCardS" ctelne 0 22 */0 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne hscx.h"4 */ */ */0 22 | 0 22 */0 220 1440 144 | | */0 2244< ""3 vL22">0 22 */ */ | 0 220 22Wlockelne hscx.h"40 220 22hscx.h"40 220 22Wlockelne hscx.h"4 */ | */ */ */ */0 1444<_dev/a> | 0 220 1440 3140 31444< ""struct ="line" nam3 vLI3 vCardelne 0 22 */0 22Wcselne 0 1440 144 */ */0 13 */ */0 3140 224<_revisiont0 2t3 vt3 27"3 v>4<_revision "1scx.h" class="fref">hscx.h"4printkelne 0 22 | 0 22 */Wtypt0 2t3 vt3 2typRAN_ != ="line" nam3 vLISDN_CTYPE_TELESPCIefine */ */ */4<_find_devictelne | 4<_enable_devictelne 0 22 */Wirqt0 2t3 vt3 2irq vL3 = ="line" nam3 vLdev_/spt0 2t3 vt3 2dev_/sp vL3-en Keclass="sref">Wirqt0 2t3 vt3 2irq vL3;/a> */Wirqt0 2t3 vt3 2irq vL3) {/t3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalued308="drive30ers/isdn/hisax/telespci30830"308RAN_PO_WR PO_WR PO_WR L vL22">0 220 220 13<);/a> */ */ */cselne Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 224<_resource_startt0 2t3 vt3 2>4<_resource_start ""3 vL22">0 22 */PAGE_SIZEelne hscx.h"4printkelne 0 220 13<,cx.h" class="fref">hscx.h"40 224<_resource_startt0 2t3 vt3 2>4<_resource_start ""3 vL22">0 22 */Wirqt0 2t3 vt3 2irq vL31scx.h" class="fref">hscx.h"40 220 13<);/a> */ */ */ */0 13 */Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 144Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne 0 1440 22Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */0 13 */0 3140 220 3140 13<,cx.h" class="fref">hscx.h"4Wirqt0 2t3 vt3 2irq vL3,cx.h" class="fref">hscx.h"4Wrwt0 2t3 vt3 2rw ".eclass="sref">W7"3 v | Wmembastelne */ v34.2t3 v <52/opt0 rapci.c33L24"33d vL14" class="line" nam3 vL14">0 1440 22 */Wreadrs/it0 2t3 vt3 2readrs/i " = &3 vL22">0 22#dt0 2t3 vt3 2+eada>#d vL3;/a> */0 22Wwri/srs/it0 2t3 vt3 2wri/srs/i " = &3 vL22">0 22#dt0 2t3 vt3 2Wri/sa>#d vL3;/a> */Wreadrs/ififoefine 0 22#dfifoefine */cselne Wwri/srs/ififoefine 0 22#dfifoefine */WBC_+ead_+egt0 2t3 vt3 2BC_+ead_+eg " = &3 vL22">0 22 */WBC_Wri/s_+egt0 2t3 vt3 2BC_Wri/s_+eg " = &3 vL22">0 22 */WBC_Send_Datat0 2t3 vt3 2BC_Send_Data " = &3 vL22">0 22 */Wcardmsgt0 2t3 vt3 2cardmsg " = &3 vL22">0 22 */ v3ss/isdn/hisax/telespci.c3LL24"344RAN_PO_WR ="line" nam3 vLcselne Wirq_funit0 2t3 vt3 2irq_funi " = &3 vL22">0 224<_interrupt/a> | 4<_interrupt ";/a> */Wirq_flagselne */#dV="ciont0 2t3 vt3 2a>#dV="cion ""3 vL22">0 220 13<);/a> */0 220 13<)) {/t3 27"3 v8oalue="v4.4.1/t3 27"3 v8oalued34f="drive34s/isdn/hisax/telespci.c34L28"348RAN_PO_WR PO_WR L"line" nam3 vLprintkelne 0 22 */Wre44< ""3 vL22">0 22 */ */ */ */WBC_Send_D1tat0 2t3 vt3 2BC_Send_Data " = t0 2t3 vt3 2gnd_D;*/ The original LXR software by thARD_TEST/a>http:// vL22"forge.netve3ojects/lx ">LXR "0x0unityistrintt3 experi0080al MEM add by D_TEST/a>mailto:lx @d_Dux.no">lx @d_Dux.no>Wmem /X0iv> <0iv vt3 2gnsubfooa "> lx .d_Dux.no kindly hosted by D_TEST/a>http://www.redppa -d_De3o.no">Redppa L_De3o ASistrine3ovider of L_Dux memsultmachand operataddreser 22