linux/drivers/atm/nicstar.c
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   1/******************************************************************************
   2 *
   3 * nicstar.c
   4 *
   5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
   6 *
   7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
   8 *            It was taken from the frle-0.22 device driver.
   9 *            As the file doesn't have a copyright notice, in the file
  10 *            nicstarmac.copyright I put the copyright notice from the
  11 *            frle-0.22 device driver.
  12 *            Some code is based on the nicstar driver by M. Welsh.
  13 *
  14 * Author: Rui Prior (rprior@inescn.pt)
  15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
  16 *
  17 *
  18 * (C) INESC 1999
  19 *
  20 *
  21 ******************************************************************************/
  22
  23
  24/**** IMPORTANT INFORMATION ***************************************************
  25 *
  26 * There are currently three types of spinlocks:
  27 *
  28 * 1 - Per card interrupt spinlock (to protect structures and such)
  29 * 2 - Per SCQ scq spinlock
  30 * 3 - Per card resource spinlock (to access registers, etc.)
  31 *
  32 * These must NEVER be grabbed in reverse order.
  33 *
  34 ******************************************************************************/
  35
  36/* Header files ***************************************************************/
  37
  38#include <linux/module.h>
  39#include <linux/kernel.h>
  40#include <linux/skbuff.h>
  41#include <linux/atmdev.h>
  42#include <linux/atm.h>
  43#include <linux/pci.h>
  44#include <linux/types.h>
  45#include <linux/string.h>
  46#include <linux/delay.h>
  47#include <linux/init.h>
  48#include <linux/sched.h>
  49#include <linux/timer.h>
  50#include <linux/interrupt.h>
  51#include <linux/bitops.h>
  52#include <asm/io.h>
  53#include <asm/uaccess.h>
  54#include <asm/atomic.h>
  55#include "nicstar.h"
  56#ifdef CONFIG_ATM_NICSTAR_USE_SUNI
  57#include "suni.h"
  58#endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
  59#ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
  60#include "idt77105.h"
  61#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
  62
  63#if BITS_PER_LONG != 32
  64#  error FIXME: this driver requires a 32-bit platform
  65#endif
  66
  67/* Additional code ************************************************************/
  68
  69#include "nicstarmac.c"
  70
  71
  72/* Configurable parameters ****************************************************/
  73
  74#undef PHY_LOOPBACK
  75#undef TX_DEBUG
  76#undef RX_DEBUG
  77#undef GENERAL_DEBUG
  78#undef EXTRA_DEBUG
  79
  80#undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
  81                             you're going to use only raw ATM */
  82
  83
  84/* Do not touch these *********************************************************/
  85
  86#ifdef TX_DEBUG
  87#define TXPRINTK(args...) printk(args)
  88#else
  89#define TXPRINTK(args...)
  90#endif /* TX_DEBUG */
  91
  92#ifdef RX_DEBUG
  93#define RXPRINTK(args...) printk(args)
  94#else
  95#define RXPRINTK(args...)
  96#endif /* RX_DEBUG */
  97
  98#ifdef GENERAL_DEBUG
  99#define PRINTK(args...) printk(args)
 100#else
 101#define PRINTK(args...)
 102#endif /* GENERAL_DEBUG */
 103
 104#ifdef EXTRA_DEBUG
 105#define XPRINTK(args...) printk(args)
 106#else
 107#define XPRINTK(args...)
 108#endif /* EXTRA_DEBUG */
 109
 110
 111/* Macros *********************************************************************/
 112
 113#define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
 114
 115#define NS_DELAY mdelay(1)
 116
 117#define ALIGN_BUS_ADDR(addr, alignment) \
 118        ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
 119#define ALIGN_ADDRESS(addr, alignment) \
 120        bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
 121
 122#undef CEIL
 123
 124#ifndef ATM_SKB
 125#define ATM_SKB(s) (&(s)->atm)
 126#endif
 127
 128
 129/* Function declarations ******************************************************/
 130
 131static u32 ns_read_sram(ns_dev *card, u32 sram_address);
 132static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
 133static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
 134static void __devinit ns_init_card_error(ns_dev *card, int error);
 135static scq_info *get_scq(int size, u32 scd);
 136static void free_scq(scq_info *scq, struct atm_vcc *vcc);
 137static void push_rxbufs(ns_dev *, struct sk_buff *);
 138static irqreturn_t ns_irq_handler(int irq, void *dev_id);
 139static int ns_open(struct atm_vcc *vcc);
 140static void ns_close(struct atm_vcc *vcc);
 141static void fill_tst(ns_dev *card, int n, vc_map *vc);
 142static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
 143static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
 144                     struct sk_buff *skb);
 145static void process_tsq(ns_dev *card);
 146static void drain_scq(ns_dev *card, scq_info *scq, int pos);
 147static void process_rsq(ns_dev *card);
 148static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
 149#ifdef NS_USE_DESTRUCTORS
 150static void ns_sb_destructor(struct sk_buff *sb);
 151static void ns_lb_destructor(struct sk_buff *lb);
 152static void ns_hb_destructor(struct sk_buff *hb);
 153#endif /* NS_USE_DESTRUCTORS */
 154static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
 155static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
 156static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
 157static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
 158static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
 159static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
 160static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
 161static void which_list(ns_dev *card, struct sk_buff *skb);
 162static void ns_poll(unsigned long arg);
 163static int ns_parse_mac(char *mac, unsigned char *esi);
 164static short ns_h2i(char c);
 165static void ns_phy_put(struct atm_dev *dev, unsigned char value,
 166                       unsigned long addr);
 167static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
 168
 169
 170
 171/* Global variables ***********************************************************/
 172
 173static struct ns_dev *cards[NS_MAX_CARDS];
 174static unsigned num_cards;
 175static struct atmdev_ops atm_ops =
 176{
 177   .open        = ns_open,
 178   .close       = ns_close,
 179   .ioctl       = ns_ioctl,
 180   .send        = ns_send,
 181   .phy_put     = ns_phy_put,
 182   .phy_get     = ns_phy_get,
 183   .proc_read   = ns_proc_read,
 184   .owner       = THIS_MODULE,
 185};
 186static struct timer_list ns_timer;
 187static char *mac[NS_MAX_CARDS];
 188module_param_array(mac, charp, NULL, 0);
 189MODULE_LICENSE("GPL");
 190
 191
 192/* Functions*******************************************************************/
 193
 194static int __devinit nicstar_init_one(struct pci_dev *pcidev,
 195                                      const struct pci_device_id *ent)
 196{
 197   static int index = -1;
 198   unsigned int error;
 199
 200   index++;
 201   cards[index] = NULL;
 202
 203   error = ns_init_card(index, pcidev);
 204   if (error) {
 205      cards[index--] = NULL;    /* don't increment index */
 206      goto err_out;
 207   }
 208
 209   return 0;
 210err_out:
 211   return -ENODEV;
 212}
 213
 214
 215
 216static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
 217{
 218   int i, j;
 219   ns_dev *card = pci_get_drvdata(pcidev);
 220   struct sk_buff *hb;
 221   struct sk_buff *iovb;
 222   struct sk_buff *lb;
 223   struct sk_buff *sb;
 224   
 225   i = card->index;
 226
 227   if (cards[i] == NULL)
 228      return;
 229
 230   if (card->atmdev->phy && card->atmdev->phy->stop)
 231      card->atmdev->phy->stop(card->atmdev);
 232
 233   /* Stop everything */
 234   writel(0x00000000, card->membase + CFG);
 235
 236   /* De-register device */
 237   atm_dev_deregister(card->atmdev);
 238
 239   /* Disable PCI device */
 240   pci_disable_device(pcidev);
 241   
 242   /* Free up resources */
 243   j = 0;
 244   PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
 245   while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
 246   {
 247      dev_kfree_skb_any(hb);
 248      j++;
 249   }
 250   PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
 251   j = 0;
 252   PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
 253   while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
 254   {
 255      dev_kfree_skb_any(iovb);
 256      j++;
 257   }
 258   PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
 259   while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
 260      dev_kfree_skb_any(lb);
 261   while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
 262      dev_kfree_skb_any(sb);
 263   free_scq(card->scq0, NULL);
 264   for (j = 0; j < NS_FRSCD_NUM; j++)
 265   {
 266      if (card->scd2vc[j] != NULL)
 267         free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
 268   }
 269   kfree(card->rsq.org);
 270   kfree(card->tsq.org);
 271   free_irq(card->pcidev->irq, card);
 272   iounmap(card->membase);
 273   kfree(card);
 274}
 275
 276
 277
 278static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
 279{
 280        {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
 281         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 282        {0,}                    /* terminate list */
 283};
 284MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
 285
 286
 287
 288static struct pci_driver nicstar_driver = {
 289        .name           = "nicstar",
 290        .id_table       = nicstar_pci_tbl,
 291        .probe          = nicstar_init_one,
 292        .remove         = __devexit_p(nicstar_remove_one),
 293};
 294
 295
 296
 297static int __init nicstar_init(void)
 298{
 299   unsigned error = 0;  /* Initialized to remove compile warning */
 300
 301   XPRINTK("nicstar: nicstar_init() called.\n");
 302
 303   error = pci_register_driver(&nicstar_driver);
 304   
 305   TXPRINTK("nicstar: TX debug enabled.\n");
 306   RXPRINTK("nicstar: RX debug enabled.\n");
 307   PRINTK("nicstar: General debug enabled.\n");
 308#ifdef PHY_LOOPBACK
 309   printk("nicstar: using PHY loopback.\n");
 310#endif /* PHY_LOOPBACK */
 311   XPRINTK("nicstar: nicstar_init() returned.\n");
 312
 313   if (!error) {
 314      init_timer(&ns_timer);
 315      ns_timer.expires = jiffies + NS_POLL_PERIOD;
 316      ns_timer.data = 0UL;
 317      ns_timer.function = ns_poll;
 318      add_timer(&ns_timer);
 319   }
 320   
 321   return error;
 322}
 323
 324
 325
 326static void __exit nicstar_cleanup(void)
 327{
 328   XPRINTK("nicstar: nicstar_cleanup() called.\n");
 329
 330   del_timer(&ns_timer);
 331
 332   pci_unregister_driver(&nicstar_driver);
 333
 334   XPRINTK("nicstar: nicstar_cleanup() returned.\n");
 335}
 336
 337
 338
 339static u32 ns_read_sram(ns_dev *card, u32 sram_address)
 340{
 341   unsigned long flags;
 342   u32 data;
 343   sram_address <<= 2;
 344   sram_address &= 0x0007FFFC;  /* address must be dword aligned */
 345   sram_address |= 0x50000000;  /* SRAM read command */
 346   spin_lock_irqsave(&card->res_lock, flags);
 347   while (CMD_BUSY(card));
 348   writel(sram_address, card->membase + CMD);
 349   while (CMD_BUSY(card));
 350   data = readl(card->membase + DR0);
 351   spin_unlock_irqrestore(&card->res_lock, flags);
 352   return data;
 353}
 354
 355
 356   
 357static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
 358{
 359   unsigned long flags;
 360   int i, c;
 361   count--;     /* count range now is 0..3 instead of 1..4 */
 362   c = count;
 363   c <<= 2;     /* to use increments of 4 */
 364   spin_lock_irqsave(&card->res_lock, flags);
 365   while (CMD_BUSY(card));
 366   for (i = 0; i <= c; i += 4)
 367      writel(*(value++), card->membase + i);
 368   /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
 369            so card->membase + DR0 == card->membase */
 370   sram_address <<= 2;
 371   sram_address &= 0x0007FFFC;
 372   sram_address |= (0x40000000 | count);
 373   writel(sram_address, card->membase + CMD);
 374   spin_unlock_irqrestore(&card->res_lock, flags);
 375}
 376
 377
 378static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
 379{
 380   int j;
 381   struct ns_dev *card = NULL;
 382   unsigned char pci_latency;
 383   unsigned error;
 384   u32 data;
 385   u32 u32d[4];
 386   u32 ns_cfg_rctsize;
 387   int bcount;
 388   unsigned long membase;
 389
 390   error = 0;
 391
 392   if (pci_enable_device(pcidev))
 393   {
 394      printk("nicstar%d: can't enable PCI device\n", i);
 395      error = 2;
 396      ns_init_card_error(card, error);
 397      return error;
 398   }
 399
 400   if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
 401   {
 402      printk("nicstar%d: can't allocate memory for device structure.\n", i);
 403      error = 2;
 404      ns_init_card_error(card, error);
 405      return error;
 406   }
 407   cards[i] = card;
 408   spin_lock_init(&card->int_lock);
 409   spin_lock_init(&card->res_lock);
 410      
 411   pci_set_drvdata(pcidev, card);
 412   
 413   card->index = i;
 414   card->atmdev = NULL;
 415   card->pcidev = pcidev;
 416   membase = pci_resource_start(pcidev, 1);
 417   card->membase = ioremap(membase, NS_IOREMAP_SIZE);
 418   if (!card->membase)
 419   {
 420      printk("nicstar%d: can't ioremap() membase.\n",i);
 421      error = 3;
 422      ns_init_card_error(card, error);
 423      return error;
 424   }
 425   PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
 426
 427   pci_set_master(pcidev);
 428
 429   if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
 430   {
 431      printk("nicstar%d: can't read PCI latency timer.\n", i);
 432      error = 6;
 433      ns_init_card_error(card, error);
 434      return error;
 435   }
 436#ifdef NS_PCI_LATENCY
 437   if (pci_latency < NS_PCI_LATENCY)
 438   {
 439      PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
 440      for (j = 1; j < 4; j++)
 441      {
 442         if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
 443            break;
 444      }
 445      if (j == 4)
 446      {
 447         printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
 448         error = 7;
 449         ns_init_card_error(card, error);
 450         return error;
 451      }
 452   }
 453#endif /* NS_PCI_LATENCY */
 454      
 455   /* Clear timer overflow */
 456   data = readl(card->membase + STAT);
 457   if (data & NS_STAT_TMROF)
 458      writel(NS_STAT_TMROF, card->membase + STAT);
 459
 460   /* Software reset */
 461   writel(NS_CFG_SWRST, card->membase + CFG);
 462   NS_DELAY;
 463   writel(0x00000000, card->membase + CFG);
 464
 465   /* PHY reset */
 466   writel(0x00000008, card->membase + GP);
 467   NS_DELAY;
 468   writel(0x00000001, card->membase + GP);
 469   NS_DELAY;
 470   while (CMD_BUSY(card));
 471   writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD);      /* Sync UTOPIA with SAR clock */
 472   NS_DELAY;
 473      
 474   /* Detect PHY type */
 475   while (CMD_BUSY(card));
 476   writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
 477   while (CMD_BUSY(card));
 478   data = readl(card->membase + DR0);
 479   switch(data) {
 480      case 0x00000009:
 481         printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
 482         card->max_pcr = ATM_25_PCR;
 483         while(CMD_BUSY(card));
 484         writel(0x00000008, card->membase + DR0);
 485         writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
 486         /* Clear an eventual pending interrupt */
 487         writel(NS_STAT_SFBQF, card->membase + STAT);
 488#ifdef PHY_LOOPBACK
 489         while(CMD_BUSY(card));
 490         writel(0x00000022, card->membase + DR0);
 491         writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
 492#endif /* PHY_LOOPBACK */
 493         break;
 494      case 0x00000030:
 495      case 0x00000031:
 496         printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
 497         card->max_pcr = ATM_OC3_PCR;
 498#ifdef PHY_LOOPBACK
 499         while(CMD_BUSY(card));
 500         writel(0x00000002, card->membase + DR0);
 501         writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
 502#endif /* PHY_LOOPBACK */
 503         break;
 504      default:
 505         printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
 506         error = 8;
 507         ns_init_card_error(card, error);
 508         return error;
 509   }
 510   writel(0x00000000, card->membase + GP);
 511
 512   /* Determine SRAM size */
 513   data = 0x76543210;
 514   ns_write_sram(card, 0x1C003, &data, 1);
 515   data = 0x89ABCDEF;
 516   ns_write_sram(card, 0x14003, &data, 1);
 517   if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
 518       ns_read_sram(card, 0x1C003) == 0x76543210)
 519       card->sram_size = 128;
 520   else
 521      card->sram_size = 32;
 522   PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
 523
 524   card->rct_size = NS_MAX_RCTSIZE;
 525
 526#if (NS_MAX_RCTSIZE == 4096)
 527   if (card->sram_size == 128)
 528      printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
 529#elif (NS_MAX_RCTSIZE == 16384)
 530   if (card->sram_size == 32)
 531   {
 532      printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
 533      card->rct_size = 4096;
 534   }
 535#else
 536#error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
 537#endif
 538
 539   card->vpibits = NS_VPIBITS;
 540   if (card->rct_size == 4096)
 541      card->vcibits = 12 - NS_VPIBITS;
 542   else /* card->rct_size == 16384 */
 543      card->vcibits = 14 - NS_VPIBITS;
 544
 545   /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
 546   if (mac[i] == NULL)
 547      nicstar_init_eprom(card->membase);
 548
 549   /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
 550   writel(0x00000000, card->membase + VPM);
 551      
 552   /* Initialize TSQ */
 553   card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
 554   if (card->tsq.org == NULL)
 555   {
 556      printk("nicstar%d: can't allocate TSQ.\n", i);
 557      error = 10;
 558      ns_init_card_error(card, error);
 559      return error;
 560   }
 561   card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
 562   card->tsq.next = card->tsq.base;
 563   card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
 564   for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
 565      ns_tsi_init(card->tsq.base + j);
 566   writel(0x00000000, card->membase + TSQH);
 567   writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
 568   PRINTK("nicstar%d: TSQ base at 0x%x  0x%x  0x%x.\n", i, (u32) card->tsq.base,
 569          (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
 570      
 571   /* Initialize RSQ */
 572   card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
 573   if (card->rsq.org == NULL)
 574   {
 575      printk("nicstar%d: can't allocate RSQ.\n", i);
 576      error = 11;
 577      ns_init_card_error(card, error);
 578      return error;
 579   }
 580   card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
 581   card->rsq.next = card->rsq.base;
 582   card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
 583   for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
 584      ns_rsqe_init(card->rsq.base + j);
 585   writel(0x00000000, card->membase + RSQH);
 586   writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
 587   PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
 588      
 589   /* Initialize SCQ0, the only VBR SCQ used */
 590   card->scq1 = NULL;
 591   card->scq2 = NULL;
 592   card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
 593   if (card->scq0 == NULL)
 594   {
 595      printk("nicstar%d: can't get SCQ0.\n", i);
 596      error = 12;
 597      ns_init_card_error(card, error);
 598      return error;
 599   }
 600   u32d[0] = (u32) virt_to_bus(card->scq0->base);
 601   u32d[1] = (u32) 0x00000000;
 602   u32d[2] = (u32) 0xffffffff;
 603   u32d[3] = (u32) 0x00000000;
 604   ns_write_sram(card, NS_VRSCD0, u32d, 4);
 605   ns_write_sram(card, NS_VRSCD1, u32d, 4);     /* These last two won't be used */
 606   ns_write_sram(card, NS_VRSCD2, u32d, 4);     /* but are initialized, just in case... */
 607   card->scq0->scd = NS_VRSCD0;
 608   PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
 609
 610   /* Initialize TSTs */
 611   card->tst_addr = NS_TST0;
 612   card->tst_free_entries = NS_TST_NUM_ENTRIES;
 613   data = NS_TST_OPCODE_VARIABLE;
 614   for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
 615      ns_write_sram(card, NS_TST0 + j, &data, 1);
 616   data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
 617   ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
 618   for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
 619      ns_write_sram(card, NS_TST1 + j, &data, 1);
 620   data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
 621   ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
 622   for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
 623      card->tste2vc[j] = NULL;
 624   writel(NS_TST0 << 2, card->membase + TSTB);
 625
 626
 627   /* Initialize RCT. AAL type is set on opening the VC. */
 628#ifdef RCQ_SUPPORT
 629   u32d[0] = NS_RCTE_RAWCELLINTEN;
 630#else
 631   u32d[0] = 0x00000000;
 632#endif /* RCQ_SUPPORT */
 633   u32d[1] = 0x00000000;
 634   u32d[2] = 0x00000000;
 635   u32d[3] = 0xFFFFFFFF;
 636   for (j = 0; j < card->rct_size; j++)
 637      ns_write_sram(card, j * 4, u32d, 4);      
 638      
 639   memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
 640      
 641   for (j = 0; j < NS_FRSCD_NUM; j++)
 642      card->scd2vc[j] = NULL;
 643
 644   /* Initialize buffer levels */
 645   card->sbnr.min = MIN_SB;
 646   card->sbnr.init = NUM_SB;
 647   card->sbnr.max = MAX_SB;
 648   card->lbnr.min = MIN_LB;
 649   card->lbnr.init = NUM_LB;
 650   card->lbnr.max = MAX_LB;
 651   card->iovnr.min = MIN_IOVB;
 652   card->iovnr.init = NUM_IOVB;
 653   card->iovnr.max = MAX_IOVB;
 654   card->hbnr.min = MIN_HB;
 655   card->hbnr.init = NUM_HB;
 656   card->hbnr.max = MAX_HB;
 657   
 658   card->sm_handle = 0x00000000;
 659   card->sm_addr = 0x00000000;
 660   card->lg_handle = 0x00000000;
 661   card->lg_addr = 0x00000000;
 662   
 663   card->efbie = 1;     /* To prevent push_rxbufs from enabling the interrupt */
 664
 665   /* Pre-allocate some huge buffers */
 666   skb_queue_head_init(&card->hbpool.queue);
 667   card->hbpool.count = 0;
 668   for (j = 0; j < NUM_HB; j++)
 669   {
 670      struct sk_buff *hb;
 671      hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
 672      if (hb == NULL)
 673      {
 674         printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
 675                i, j, NUM_HB);
 676         error = 13;
 677         ns_init_card_error(card, error);
 678         return error;
 679      }
 680      NS_SKB_CB(hb)->buf_type = BUF_NONE;
 681      skb_queue_tail(&card->hbpool.queue, hb);
 682      card->hbpool.count++;
 683   }
 684
 685
 686   /* Allocate large buffers */
 687   skb_queue_head_init(&card->lbpool.queue);
 688   card->lbpool.count = 0;                      /* Not used */
 689   for (j = 0; j < NUM_LB; j++)
 690   {
 691      struct sk_buff *lb;
 692      lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
 693      if (lb == NULL)
 694      {
 695         printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
 696                i, j, NUM_LB);
 697         error = 14;
 698         ns_init_card_error(card, error);
 699         return error;
 700      }
 701      NS_SKB_CB(lb)->buf_type = BUF_LG;
 702      skb_queue_tail(&card->lbpool.queue, lb);
 703      skb_reserve(lb, NS_SMBUFSIZE);
 704      push_rxbufs(card, lb);
 705      /* Due to the implementation of push_rxbufs() this is 1, not 0 */
 706      if (j == 1)
 707      {
 708         card->rcbuf = lb;
 709         card->rawch = (u32) virt_to_bus(lb->data);
 710      }
 711   }
 712   /* Test for strange behaviour which leads to crashes */
 713   if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
 714   {
 715      printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
 716             i, j, bcount);
 717      error = 14;
 718      ns_init_card_error(card, error);
 719      return error;
 720   }
 721      
 722
 723   /* Allocate small buffers */
 724   skb_queue_head_init(&card->sbpool.queue);
 725   card->sbpool.count = 0;                      /* Not used */
 726   for (j = 0; j < NUM_SB; j++)
 727   {
 728      struct sk_buff *sb;
 729      sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
 730      if (sb == NULL)
 731      {
 732         printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
 733                i, j, NUM_SB);
 734         error = 15;
 735         ns_init_card_error(card, error);
 736         return error;
 737      }
 738      NS_SKB_CB(sb)->buf_type = BUF_SM;
 739      skb_queue_tail(&card->sbpool.queue, sb);
 740      skb_reserve(sb, NS_AAL0_HEADER);
 741      push_rxbufs(card, sb);
 742   }
 743   /* Test for strange behaviour which leads to crashes */
 744   if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
 745   {
 746      printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
 747             i, j, bcount);
 748      error = 15;
 749      ns_init_card_error(card, error);
 750      return error;
 751   }
 752      
 753
 754   /* Allocate iovec buffers */
 755   skb_queue_head_init(&card->iovpool.queue);
 756   card->iovpool.count = 0;
 757   for (j = 0; j < NUM_IOVB; j++)
 758   {
 759      struct sk_buff *iovb;
 760      iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
 761      if (iovb == NULL)
 762      {
 763         printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
 764                i, j, NUM_IOVB);
 765         error = 16;
 766         ns_init_card_error(card, error);
 767         return error;
 768      }
 769      NS_SKB_CB(iovb)->buf_type = BUF_NONE;
 770      skb_queue_tail(&card->iovpool.queue, iovb);
 771      card->iovpool.count++;
 772   }
 773
 774   /* Configure NICStAR */
 775   if (card->rct_size == 4096)
 776      ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
 777   else /* (card->rct_size == 16384) */
 778      ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
 779
 780   card->efbie = 1;
 781
 782   card->intcnt = 0;
 783   if (request_irq(pcidev->irq, &ns_irq_handler, IRQF_DISABLED | IRQF_SHARED, "nicstar", card) != 0)
 784   {
 785      printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
 786      error = 9;
 787      ns_init_card_error(card, error);
 788      return error;
 789   }
 790
 791   /* Register device */
 792   card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
 793   if (card->atmdev == NULL)
 794   {
 795      printk("nicstar%d: can't register device.\n", i);
 796      error = 17;
 797      ns_init_card_error(card, error);
 798      return error;
 799   }
 800      
 801   if (ns_parse_mac(mac[i], card->atmdev->esi)) {
 802      nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
 803                         card->atmdev->esi, 6);
 804      if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
 805         nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
 806                         card->atmdev->esi, 6);
 807      }
 808   }
 809
 810   printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
 811          card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
 812          card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
 813
 814   card->atmdev->dev_data = card;
 815   card->atmdev->ci_range.vpi_bits = card->vpibits;
 816   card->atmdev->ci_range.vci_bits = card->vcibits;
 817   card->atmdev->link_rate = card->max_pcr;
 818   card->atmdev->phy = NULL;
 819
 820#ifdef CONFIG_ATM_NICSTAR_USE_SUNI
 821   if (card->max_pcr == ATM_OC3_PCR)
 822      suni_init(card->atmdev);
 823#endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
 824
 825#ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
 826   if (card->max_pcr == ATM_25_PCR)
 827      idt77105_init(card->atmdev);
 828#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
 829
 830   if (card->atmdev->phy && card->atmdev->phy->start)
 831      card->atmdev->phy->start(card->atmdev);
 832
 833   writel(NS_CFG_RXPATH |
 834          NS_CFG_SMBUFSIZE |
 835          NS_CFG_LGBUFSIZE |
 836          NS_CFG_EFBIE |
 837          NS_CFG_RSQSIZE |
 838          NS_CFG_VPIBITS |
 839          ns_cfg_rctsize |
 840          NS_CFG_RXINT_NODELAY |
 841          NS_CFG_RAWIE |                /* Only enabled if RCQ_SUPPORT */
 842          NS_CFG_RSQAFIE |
 843          NS_CFG_TXEN |
 844          NS_CFG_TXIE |
 845          NS_CFG_TSQFIE_OPT |           /* Only enabled if ENABLE_TSQFIE */ 
 846          NS_CFG_PHYIE,
 847          card->membase + CFG);
 848
 849   num_cards++;
 850
 851   return error;
 852}
 853
 854
 855
 856static void __devinit ns_init_card_error(ns_dev *card, int error)
 857{
 858   if (error >= 17)
 859   {
 860      writel(0x00000000, card->membase + CFG);
 861   }
 862   if (error >= 16)
 863   {
 864      struct sk_buff *iovb;
 865      while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
 866         dev_kfree_skb_any(iovb);
 867   }
 868   if (error >= 15)
 869   {
 870      struct sk_buff *sb;
 871      while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
 872         dev_kfree_skb_any(sb);
 873      free_scq(card->scq0, NULL);
 874   }
 875   if (error >= 14)
 876   {
 877      struct sk_buff *lb;
 878      while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
 879         dev_kfree_skb_any(lb);
 880   }
 881   if (error >= 13)
 882   {
 883      struct sk_buff *hb;
 884      while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
 885         dev_kfree_skb_any(hb);
 886   }
 887   if (error >= 12)
 888   {
 889      kfree(card->rsq.org);
 890   }
 891   if (error >= 11)
 892   {
 893      kfree(card->tsq.org);
 894   }
 895   if (error >= 10)
 896   {
 897      free_irq(card->pcidev->irq, card);
 898   }
 899   if (error >= 4)
 900   {
 901      iounmap(card->membase);
 902   }
 903   if (error >= 3)
 904   {
 905      pci_disable_device(card->pcidev);
 906      kfree(card);
 907   }
 908}
 909
 910
 911
 912static scq_info *get_scq(int size, u32 scd)
 913{
 914   scq_info *scq;
 915   int i;
 916
 917   if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
 918      return NULL;
 919
 920   scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
 921   if (scq == NULL)
 922      return NULL;
 923   scq->org = kmalloc(2 * size, GFP_KERNEL);
 924   if (scq->org == NULL)
 925   {
 926      kfree(scq);
 927      return NULL;
 928   }
 929   scq->skb = kmalloc(sizeof(struct sk_buff *) *
 930                                          (size / NS_SCQE_SIZE), GFP_KERNEL);
 931   if (scq->skb == NULL)
 932   {
 933      kfree(scq->org);
 934      kfree(scq);
 935      return NULL;
 936   }
 937   scq->num_entries = size / NS_SCQE_SIZE;
 938   scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
 939   scq->next = scq->base;
 940   scq->last = scq->base + (scq->num_entries - 1);
 941   scq->tail = scq->last;
 942   scq->scd = scd;
 943   scq->num_entries = size / NS_SCQE_SIZE;
 944   scq->tbd_count = 0;
 945   init_waitqueue_head(&scq->scqfull_waitq);
 946   scq->full = 0;
 947   spin_lock_init(&scq->lock);
 948
 949   for (i = 0; i < scq->num_entries; i++)
 950      scq->skb[i] = NULL;
 951
 952   return scq;
 953}
 954
 955
 956
 957/* For variable rate SCQ vcc must be NULL */
 958static void free_scq(scq_info *scq, struct atm_vcc *vcc)
 959{
 960   int i;
 961
 962   if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
 963      for (i = 0; i < scq->num_entries; i++)
 964      {
 965         if (scq->skb[i] != NULL)
 966         {
 967            vcc = ATM_SKB(scq->skb[i])->vcc;
 968            if (vcc->pop != NULL)
 969               vcc->pop(vcc, scq->skb[i]);
 970            else
 971               dev_kfree_skb_any(scq->skb[i]);
 972         }
 973      }
 974   else /* vcc must be != NULL */
 975   {
 976      if (vcc == NULL)
 977      {
 978         printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
 979         for (i = 0; i < scq->num_entries; i++)
 980            dev_kfree_skb_any(scq->skb[i]);
 981      }
 982      else
 983         for (i = 0; i < scq->num_entries; i++)
 984         {
 985            if (scq->skb[i] != NULL)
 986            {
 987               if (vcc->pop != NULL)
 988                  vcc->pop(vcc, scq->skb[i]);
 989               else
 990                  dev_kfree_skb_any(scq->skb[i]);
 991            }
 992         }
 993   }
 994   kfree(scq->skb);
 995   kfree(scq->org);
 996   kfree(scq);
 997}
 998
 999
1000
1001/* The handles passed must be pointers to the sk_buff containing the small
1002   or large buffer(s) cast to u32. */
1003static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
1004{
1005   struct ns_skb_cb *cb = NS_SKB_CB(skb);
1006   u32 handle1, addr1;
1007   u32 handle2, addr2;
1008   u32 stat;
1009   unsigned long flags;
1010   
1011   /* *BARF* */
1012   handle2 = addr2 = 0;
1013   handle1 = (u32)skb;
1014   addr1 = (u32)virt_to_bus(skb->data);
1015
1016#ifdef GENERAL_DEBUG
1017   if (!addr1)
1018      printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
1019#endif /* GENERAL_DEBUG */
1020
1021   stat = readl(card->membase + STAT);
1022   card->sbfqc = ns_stat_sfbqc_get(stat);
1023   card->lbfqc = ns_stat_lfbqc_get(stat);
1024   if (cb->buf_type == BUF_SM)
1025   {
1026      if (!addr2)
1027      {
1028         if (card->sm_addr)
1029         {
1030            addr2 = card->sm_addr;
1031            handle2 = card->sm_handle;
1032            card->sm_addr = 0x00000000;
1033            card->sm_handle = 0x00000000;
1034         }
1035         else /* (!sm_addr) */
1036         {
1037            card->sm_addr = addr1;
1038            card->sm_handle = handle1;
1039         }
1040      }      
1041   }
1042   else /* buf_type == BUF_LG */
1043   {
1044      if (!addr2)
1045      {
1046         if (card->lg_addr)
1047         {
1048            addr2 = card->lg_addr;
1049            handle2 = card->lg_handle;
1050            card->lg_addr = 0x00000000;
1051            card->lg_handle = 0x00000000;
1052         }
1053         else /* (!lg_addr) */
1054         {
1055            card->lg_addr = addr1;
1056            card->lg_handle = handle1;
1057         }
1058      }      
1059   }
1060
1061   if (addr2)
1062   {
1063      if (cb->buf_type == BUF_SM)
1064      {
1065         if (card->sbfqc >= card->sbnr.max)
1066         {
1067            skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
1068            dev_kfree_skb_any((struct sk_buff *) handle1);
1069            skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
1070            dev_kfree_skb_any((struct sk_buff *) handle2);
1071            return;
1072         }
1073         else
1074            card->sbfqc += 2;
1075      }
1076      else /* (buf_type == BUF_LG) */
1077      {
1078         if (card->lbfqc >= card->lbnr.max)
1079         {
1080            skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
1081            dev_kfree_skb_any((struct sk_buff *) handle1);
1082            skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
1083            dev_kfree_skb_any((struct sk_buff *) handle2);
1084            return;
1085         }
1086         else
1087            card->lbfqc += 2;
1088      }
1089
1090      spin_lock_irqsave(&card->res_lock, flags);
1091
1092      while (CMD_BUSY(card));
1093      writel(addr2, card->membase + DR3);
1094      writel(handle2, card->membase + DR2);
1095      writel(addr1, card->membase + DR1);
1096      writel(handle1, card->membase + DR0);
1097      writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
1098 
1099      spin_unlock_irqrestore(&card->res_lock, flags);
1100
1101      XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
1102              (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
1103   }
1104
1105   if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1106       card->lbfqc >= card->lbnr.min)
1107   {
1108      card->efbie = 1;
1109      writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
1110   }
1111
1112   return;
1113}
1114
1115
1116
1117static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1118{
1119   u32 stat_r;
1120   ns_dev *card;
1121   struct atm_dev *dev;
1122   unsigned long flags;
1123
1124   card = (ns_dev *) dev_id;
1125   dev = card->atmdev;
1126   card->intcnt++;
1127
1128   PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1129
1130   spin_lock_irqsave(&card->int_lock, flags);
1131   
1132   stat_r = readl(card->membase + STAT);
1133
1134   /* Transmit Status Indicator has been written to T. S. Queue */
1135   if (stat_r & NS_STAT_TSIF)
1136   {
1137      TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1138      process_tsq(card);
1139      writel(NS_STAT_TSIF, card->membase + STAT);
1140   }
1141   
1142   /* Incomplete CS-PDU has been transmitted */
1143   if (stat_r & NS_STAT_TXICP)
1144   {
1145      writel(NS_STAT_TXICP, card->membase + STAT);
1146      TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1147               card->index);
1148   }
1149   
1150   /* Transmit Status Queue 7/8 full */
1151   if (stat_r & NS_STAT_TSQF)
1152   {
1153      writel(NS_STAT_TSQF, card->membase + STAT);
1154      PRINTK("nicstar%d: TSQ full.\n", card->index);
1155      process_tsq(card);
1156   }
1157   
1158   /* Timer overflow */
1159   if (stat_r & NS_STAT_TMROF)
1160   {
1161      writel(NS_STAT_TMROF, card->membase + STAT);
1162      PRINTK("nicstar%d: Timer overflow.\n", card->index);
1163   }
1164   
1165   /* PHY device interrupt signal active */
1166   if (stat_r & NS_STAT_PHYI)
1167   {
1168      writel(NS_STAT_PHYI, card->membase + STAT);
1169      PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1170      if (dev->phy && dev->phy->interrupt) {
1171         dev->phy->interrupt(dev);
1172      }
1173   }
1174
1175   /* Small Buffer Queue is full */
1176   if (stat_r & NS_STAT_SFBQF)
1177   {
1178      writel(NS_STAT_SFBQF, card->membase + STAT);
1179      printk("nicstar%d: Small free buffer queue is full.\n", card->index);
1180   }
1181   
1182   /* Large Buffer Queue is full */
1183   if (stat_r & NS_STAT_LFBQF)
1184   {
1185      writel(NS_STAT_LFBQF, card->membase + STAT);
1186      printk("nicstar%d: Large free buffer queue is full.\n", card->index);
1187   }
1188
1189   /* Receive Status Queue is full */
1190   if (stat_r & NS_STAT_RSQF)
1191   {
1192      writel(NS_STAT_RSQF, card->membase + STAT);
1193      printk("nicstar%d: RSQ full.\n", card->index);
1194      process_rsq(card);
1195   }
1196
1197   /* Complete CS-PDU received */
1198   if (stat_r & NS_STAT_EOPDU)
1199   {
1200      RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1201      process_rsq(card);
1202      writel(NS_STAT_EOPDU, card->membase + STAT);
1203   }
1204
1205   /* Raw cell received */
1206   if (stat_r & NS_STAT_RAWCF)
1207   {
1208      writel(NS_STAT_RAWCF, card->membase + STAT);
1209#ifndef RCQ_SUPPORT
1210      printk("nicstar%d: Raw cell received and no support yet...\n",
1211             card->index);
1212#endif /* RCQ_SUPPORT */
1213      /* NOTE: the following procedure may keep a raw cell pending until the
1214               next interrupt. As this preliminary support is only meant to
1215               avoid buffer leakage, this is not an issue. */
1216      while (readl(card->membase + RAWCT) != card->rawch)
1217      {
1218         ns_rcqe *rawcell;
1219
1220         rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
1221         if (ns_rcqe_islast(rawcell))
1222         {
1223            struct sk_buff *oldbuf;
1224
1225            oldbuf = card->rcbuf;
1226            card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
1227            card->rawch = (u32) virt_to_bus(card->rcbuf->data);
1228            recycle_rx_buf(card, oldbuf);
1229         }
1230         else
1231            card->rawch += NS_RCQE_SIZE;
1232      }
1233   }
1234
1235   /* Small buffer queue is empty */
1236   if (stat_r & NS_STAT_SFBQE)
1237   {
1238      int i;
1239      struct sk_buff *sb;
1240
1241      writel(NS_STAT_SFBQE, card->membase + STAT);
1242      printk("nicstar%d: Small free buffer queue empty.\n",
1243             card->index);
1244      for (i = 0; i < card->sbnr.min; i++)
1245      {
1246         sb = dev_alloc_skb(NS_SMSKBSIZE);
1247         if (sb == NULL)
1248         {
1249            writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1250            card->efbie = 0;
1251            break;
1252         }
1253         NS_SKB_CB(sb)->buf_type = BUF_SM;
1254         skb_queue_tail(&card->sbpool.queue, sb);
1255         skb_reserve(sb, NS_AAL0_HEADER);
1256         push_rxbufs(card, sb);
1257      }
1258      card->sbfqc = i;
1259      process_rsq(card);
1260   }
1261
1262   /* Large buffer queue empty */
1263   if (stat_r & NS_STAT_LFBQE)
1264   {
1265      int i;
1266      struct sk_buff *lb;
1267
1268      writel(NS_STAT_LFBQE, card->membase + STAT);
1269      printk("nicstar%d: Large free buffer queue empty.\n",
1270             card->index);
1271      for (i = 0; i < card->lbnr.min; i++)
1272      {
1273         lb = dev_alloc_skb(NS_LGSKBSIZE);
1274         if (lb == NULL)
1275         {
1276            writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1277            card->efbie = 0;
1278            break;
1279         }
1280         NS_SKB_CB(lb)->buf_type = BUF_LG;
1281         skb_queue_tail(&card->lbpool.queue, lb);
1282         skb_reserve(lb, NS_SMBUFSIZE);
1283         push_rxbufs(card, lb);
1284      }
1285      card->lbfqc = i;
1286      process_rsq(card);
1287   }
1288
1289   /* Receive Status Queue is 7/8 full */
1290   if (stat_r & NS_STAT_RSQAF)
1291   {
1292      writel(NS_STAT_RSQAF, card->membase + STAT);
1293      RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1294      process_rsq(card);
1295   }
1296   
1297   spin_unlock_irqrestore(&card->int_lock, flags);
1298   PRINTK("nicstar%d: end of interrupt service\n", card->index);
1299   return IRQ_HANDLED;
1300}
1301
1302
1303
1304static int ns_open(struct atm_vcc *vcc)
1305{
1306   ns_dev *card;
1307   vc_map *vc;
1308   unsigned long tmpl, modl;
1309   int tcr, tcra;       /* target cell rate, and absolute value */
1310   int n = 0;           /* Number of entries in the TST. Initialized to remove
1311                           the compiler warning. */
1312   u32 u32d[4];
1313   int frscdi = 0;      /* Index of the SCD. Initialized to remove the compiler
1314                           warning. How I wish compilers were clever enough to
1315                           tell which variables can truly be used
1316                           uninitialized... */
1317   int inuse;           /* tx or rx vc already in use by another vcc */
1318   short vpi = vcc->vpi;
1319   int vci = vcc->vci;
1320
1321   card = (ns_dev *) vcc->dev->dev_data;
1322   PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
1323   if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1324   {
1325      PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1326      return -EINVAL;
1327   }
1328
1329   vc = &(card->vcmap[vpi << card->vcibits | vci]);
1330   vcc->dev_data = vc;
1331
1332   inuse = 0;
1333   if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1334      inuse = 1;
1335   if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1336      inuse += 2;
1337   if (inuse)
1338   {
1339      printk("nicstar%d: %s vci already in use.\n", card->index,
1340             inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1341      return -EINVAL;
1342   }
1343
1344   set_bit(ATM_VF_ADDR,&vcc->flags);
1345
1346   /* NOTE: You are not allowed to modify an open connection's QOS. To change
1347      that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1348      needed to do that. */
1349   if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1350   {
1351      scq_info *scq;
1352      
1353      set_bit(ATM_VF_PARTIAL,&vcc->flags);
1354      if (vcc->qos.txtp.traffic_class == ATM_CBR)
1355      {
1356         /* Check requested cell rate and availability of SCD */
1357         if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
1358             vcc->qos.txtp.min_pcr == 0)
1359         {
1360            PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1361                   card->index);
1362            clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1363            clear_bit(ATM_VF_ADDR,&vcc->flags);
1364            return -EINVAL;
1365         }
1366
1367         tcr = atm_pcr_goal(&(vcc->qos.txtp));
1368         tcra = tcr >= 0 ? tcr : -tcr;
1369      
1370         PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
1371                vcc->qos.txtp.max_pcr);
1372
1373         tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
1374         modl = tmpl % card->max_pcr;
1375
1376         n = (int)(tmpl / card->max_pcr);
1377         if (tcr > 0)
1378         {
1379            if (modl > 0) n++;
1380         }
1381         else if (tcr == 0)
1382         {
1383            if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
1384            {
1385               PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
1386               clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1387               clear_bit(ATM_VF_ADDR,&vcc->flags);
1388               return -EINVAL;
1389            }
1390         }
1391
1392         if (n == 0)
1393         {
1394            printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
1395            clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1396            clear_bit(ATM_VF_ADDR,&vcc->flags);
1397            return -EINVAL;
1398         }
1399
1400         if (n > (card->tst_free_entries - NS_TST_RESERVED))
1401         {
1402            PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
1403            clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1404            clear_bit(ATM_VF_ADDR,&vcc->flags);
1405            return -EINVAL;
1406         }
1407         else
1408            card->tst_free_entries -= n;
1409
1410         XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
1411         for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
1412         {
1413            if (card->scd2vc[frscdi] == NULL)
1414            {
1415               card->scd2vc[frscdi] = vc;
1416               break;
1417            }
1418         }
1419         if (frscdi == NS_FRSCD_NUM)
1420         {
1421            PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
1422            card->tst_free_entries += n;
1423            clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1424            clear_bit(ATM_VF_ADDR,&vcc->flags);
1425            return -EBUSY;
1426         }
1427
1428         vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1429
1430         scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
1431         if (scq == NULL)
1432         {
1433            PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
1434            card->scd2vc[frscdi] = NULL;
1435            card->tst_free_entries += n;
1436            clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1437            clear_bit(ATM_VF_ADDR,&vcc->flags);
1438            return -ENOMEM;
1439         }
1440         vc->scq = scq;
1441         u32d[0] = (u32) virt_to_bus(scq->base);
1442         u32d[1] = (u32) 0x00000000;
1443         u32d[2] = (u32) 0xffffffff;
1444         u32d[3] = (u32) 0x00000000;
1445         ns_write_sram(card, vc->cbr_scd, u32d, 4);
1446         
1447         fill_tst(card, n, vc);
1448      }
1449      else if (vcc->qos.txtp.traffic_class == ATM_UBR)
1450      {
1451         vc->cbr_scd = 0x00000000;
1452         vc->scq = card->scq0;
1453      }
1454      
1455      if (vcc->qos.txtp.traffic_class != ATM_NONE)
1456      {
1457         vc->tx = 1;
1458         vc->tx_vcc = vcc;
1459         vc->tbd_count = 0;
1460      }
1461      if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1462      {
1463         u32 status;
1464      
1465         vc->rx = 1;
1466         vc->rx_vcc = vcc;
1467         vc->rx_iov = NULL;
1468
1469         /* Open the connection in hardware */
1470         if (vcc->qos.aal == ATM_AAL5)
1471            status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1472         else /* vcc->qos.aal == ATM_AAL0 */
1473            status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1474#ifdef RCQ_SUPPORT
1475         status |= NS_RCTE_RAWCELLINTEN;
1476#endif /* RCQ_SUPPORT */
1477         ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
1478                       NS_RCT_ENTRY_SIZE, &status, 1);
1479      }
1480      
1481   }
1482   
1483   set_bit(ATM_VF_READY,&vcc->flags);
1484   return 0;
1485}
1486
1487
1488
1489static void ns_close(struct atm_vcc *vcc)
1490{
1491   vc_map *vc;
1492   ns_dev *card;
1493   u32 data;
1494   int i;
1495   
1496   vc = vcc->dev_data;
1497   card = vcc->dev->dev_data;
1498   PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1499          (int) vcc->vpi, vcc->vci);
1500
1501   clear_bit(ATM_VF_READY,&vcc->flags);
1502   
1503   if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1504   {
1505      u32 addr;
1506      unsigned long flags;
1507      
1508      addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1509      spin_lock_irqsave(&card->res_lock, flags);
1510      while(CMD_BUSY(card));
1511      writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
1512      spin_unlock_irqrestore(&card->res_lock, flags);
1513      
1514      vc->rx = 0;
1515      if (vc->rx_iov != NULL)
1516      {
1517         struct sk_buff *iovb;
1518         u32 stat;
1519   
1520         stat = readl(card->membase + STAT);
1521         card->sbfqc = ns_stat_sfbqc_get(stat);   
1522         card->lbfqc = ns_stat_lfbqc_get(stat);
1523
1524         PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
1525                card->index);
1526         iovb = vc->rx_iov;
1527         recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
1528                               NS_SKB(iovb)->iovcnt);
1529         NS_SKB(iovb)->iovcnt = 0;
1530         NS_SKB(iovb)->vcc = NULL;
1531         spin_lock_irqsave(&card->int_lock, flags);
1532         recycle_iov_buf(card, iovb);
1533         spin_unlock_irqrestore(&card->int_lock, flags);
1534         vc->rx_iov = NULL;
1535      }
1536   }
1537
1538   if (vcc->qos.txtp.traffic_class != ATM_NONE)
1539   {
1540      vc->tx = 0;
1541   }
1542
1543   if (vcc->qos.txtp.traffic_class == ATM_CBR)
1544   {
1545      unsigned long flags;
1546      ns_scqe *scqep;
1547      scq_info *scq;
1548
1549      scq = vc->scq;
1550
1551      for (;;)
1552      {
1553         spin_lock_irqsave(&scq->lock, flags);
1554         scqep = scq->next;
1555         if (scqep == scq->base)
1556            scqep = scq->last;
1557         else
1558            scqep--;
1559         if (scqep == scq->tail)
1560         {
1561            spin_unlock_irqrestore(&scq->lock, flags);
1562            break;
1563         }
1564         /* If the last entry is not a TSR, place one in the SCQ in order to
1565            be able to completely drain it and then close. */
1566         if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
1567         {
1568            ns_scqe tsr;
1569            u32 scdi, scqi;
1570            u32 data;
1571            int index;
1572
1573            tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1574            scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1575            scqi = scq->next - scq->base;
1576            tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1577            tsr.word_3 = 0x00000000;
1578            tsr.word_4 = 0x00000000;
1579            *scq->next = tsr;
1580            index = (int) scqi;
1581            scq->skb[index] = NULL;
1582            if (scq->next == scq->last)
1583               scq->next = scq->base;
1584            else
1585               scq->next++;
1586            data = (u32) virt_to_bus(scq->next);
1587            ns_write_sram(card, scq->scd, &data, 1);
1588         }
1589         spin_unlock_irqrestore(&scq->lock, flags);
1590         schedule();
1591      }
1592
1593      /* Free all TST entries */
1594      data = NS_TST_OPCODE_VARIABLE;
1595      for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
1596      {
1597         if (card->tste2vc[i] == vc)
1598         {
1599            ns_write_sram(card, card->tst_addr + i, &data, 1);
1600            card->tste2vc[i] = NULL;
1601            card->tst_free_entries++;
1602         }
1603      }
1604      
1605      card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1606      free_scq(vc->scq, vcc);
1607   }
1608
1609   /* remove all references to vcc before deleting it */
1610   if (vcc->qos.txtp.traffic_class != ATM_NONE)
1611   {
1612     unsigned long flags;
1613     scq_info *scq = card->scq0;
1614
1615     spin_lock_irqsave(&scq->lock, flags);
1616
1617     for(i = 0; i < scq->num_entries; i++) {
1618       if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1619        ATM_SKB(scq->skb[i])->vcc = NULL;
1620        atm_return(vcc, scq->skb[i]->truesize);
1621        PRINTK("nicstar: deleted pending vcc mapping\n");
1622       }
1623     }
1624
1625     spin_unlock_irqrestore(&scq->lock, flags);
1626   }
1627
1628   vcc->dev_data = NULL;
1629   clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1630   clear_bit(ATM_VF_ADDR,&vcc->flags);
1631
1632#ifdef RX_DEBUG
1633   {
1634      u32 stat, cfg;
1635      stat = readl(card->membase + STAT);
1636      cfg = readl(card->membase + CFG);
1637      printk("STAT = 0x%08X  CFG = 0x%08X  \n", stat, cfg);
1638      printk("TSQ: base = 0x%08X  next = 0x%08X  last = 0x%08X  TSQT = 0x%08X \n",
1639             (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
1640             readl(card->membase + TSQT));
1641      printk("RSQ: base = 0x%08X  next = 0x%08X  last = 0x%08X  RSQT = 0x%08X \n",
1642             (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
1643             readl(card->membase + RSQT));
1644      printk("Empty free buffer queue interrupt %s \n",
1645             card->efbie ? "enabled" : "disabled");
1646      printk("SBCNT = %d  count = %d   LBCNT = %d count = %d \n",
1647             ns_stat_sfbqc_get(stat), card->sbpool.count,
1648             ns_stat_lfbqc_get(stat), card->lbpool.count);
1649      printk("hbpool.count = %d  iovpool.count = %d \n",
1650             card->hbpool.count, card->iovpool.count);
1651   }
1652#endif /* RX_DEBUG */
1653}
1654
1655
1656
1657static void fill_tst(ns_dev *card, int n, vc_map *vc)
1658{
1659   u32 new_tst;
1660   unsigned long cl;
1661   int e, r;
1662   u32 data;
1663      
1664   /* It would be very complicated to keep the two TSTs synchronized while
1665      assuring that writes are only made to the inactive TST. So, for now I
1666      will use only one TST. If problems occur, I will change this again */
1667   
1668   new_tst = card->tst_addr;
1669
1670   /* Fill procedure */
1671
1672   for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
1673   {
1674      if (card->tste2vc[e] == NULL)
1675         break;
1676   }
1677   if (e == NS_TST_NUM_ENTRIES) {
1678      printk("nicstar%d: No free TST entries found. \n", card->index);
1679      return;
1680   }
1681
1682   r = n;
1683   cl = NS_TST_NUM_ENTRIES;
1684   data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1685      
1686   while (r > 0)
1687   {
1688      if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
1689      {
1690         card->tste2vc[e] = vc;
1691         ns_write_sram(card, new_tst + e, &data, 1);
1692         cl -= NS_TST_NUM_ENTRIES;
1693         r--;
1694      }
1695
1696      if (++e == NS_TST_NUM_ENTRIES) {
1697         e = 0;
1698      }
1699      cl += n;
1700   }
1701   
1702   /* End of fill procedure */
1703   
1704   data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1705   ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1706   ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1707   card->tst_addr = new_tst;
1708}
1709
1710
1711
1712static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1713{
1714   ns_dev *card;
1715   vc_map *vc;
1716   scq_info *scq;
1717   unsigned long buflen;
1718   ns_scqe scqe;
1719   u32 flags;           /* TBD flags, not CPU flags */
1720   
1721   card = vcc->dev->dev_data;
1722   TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1723   if ((vc = (vc_map *) vcc->dev_data) == NULL)
1724   {
1725      printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
1726      atomic_inc(&vcc->stats->tx_err);
1727      dev_kfree_skb_any(skb);
1728      return -EINVAL;
1729   }
1730   
1731   if (!vc->tx)
1732   {
1733      printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1734      atomic_inc(&vcc->stats->tx_err);
1735      dev_kfree_skb_any(skb);
1736      return -EINVAL;
1737   }
1738   
1739   if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1740   {
1741      printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1742      atomic_inc(&vcc->stats->tx_err);
1743      dev_kfree_skb_any(skb);
1744      return -EINVAL;
1745   }
1746   
1747   if (skb_shinfo(skb)->nr_frags != 0)
1748   {
1749      printk("nicstar%d: No scatter-gather yet.\n", card->index);
1750      atomic_inc(&vcc->stats->tx_err);
1751      dev_kfree_skb_any(skb);
1752      return -EINVAL;
1753   }
1754   
1755   ATM_SKB(skb)->vcc = vcc;
1756
1757   if (vcc->qos.aal == ATM_AAL5)
1758   {
1759      buflen = (skb->len + 47 + 8) / 48 * 48;   /* Multiple of 48 */
1760      flags = NS_TBD_AAL5;
1761      scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1762      scqe.word_3 = cpu_to_le32((u32) skb->len);
1763      scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1764                           ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1765      flags |= NS_TBD_EOPDU;
1766   }
1767   else /* (vcc->qos.aal == ATM_AAL0) */
1768   {
1769      buflen = ATM_CELL_PAYLOAD;        /* i.e., 48 bytes */
1770      flags = NS_TBD_AAL0;
1771      scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1772      scqe.word_3 = cpu_to_le32(0x00000000);
1773      if (*skb->data & 0x02)    /* Payload type 1 - end of pdu */
1774         flags |= NS_TBD_EOPDU;
1775      scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1776      /* Force the VPI/VCI to be the same as in VCC struct */
1777      scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1778                                 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1779                                 NS_TBD_VC_MASK);
1780   }
1781
1782   if (vcc->qos.txtp.traffic_class == ATM_CBR)
1783   {
1784      scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1785      scq = ((vc_map *) vcc->dev_data)->scq;
1786   }
1787   else
1788   {
1789      scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1790      scq = card->scq0;
1791   }
1792
1793   if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1794   {
1795      atomic_inc(&vcc->stats->tx_err);
1796      dev_kfree_skb_any(skb);
1797      return -EIO;
1798   }
1799   atomic_inc(&vcc->stats->tx);
1800
1801   return 0;
1802}
1803
1804
1805
1806static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
1807                     struct sk_buff *skb)
1808{
1809   unsigned long flags;
1810   ns_scqe tsr;
1811   u32 scdi, scqi;
1812   int scq_is_vbr;
1813   u32 data;
1814   int index;
1815   
1816   spin_lock_irqsave(&scq->lock, flags);
1817   while (scq->tail == scq->next)
1818   {
1819      if (in_interrupt()) {
1820         spin_unlock_irqrestore(&scq->lock, flags);
1821         printk("nicstar%d: Error pushing TBD.\n", card->index);
1822         return 1;
1823      }
1824
1825      scq->full = 1;
1826      spin_unlock_irqrestore(&scq->lock, flags);
1827      interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1828      spin_lock_irqsave(&scq->lock, flags);
1829
1830      if (scq->full) {
1831         spin_unlock_irqrestore(&scq->lock, flags);
1832         printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1833         return 1;
1834      }
1835   }
1836   *scq->next = *tbd;
1837   index = (int) (scq->next - scq->base);
1838   scq->skb[index] = skb;
1839   XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1840           card->index, (u32) skb, index);
1841   XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1842           card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1843           le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1844           (u32) scq->next);
1845   if (scq->next == scq->last)
1846      scq->next = scq->base;
1847   else
1848      scq->next++;
1849
1850   vc->tbd_count++;
1851   if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1852   {
1853      scq->tbd_count++;
1854      scq_is_vbr = 1;
1855   }
1856   else
1857      scq_is_vbr = 0;
1858
1859   if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1860   {
1861      int has_run = 0;
1862
1863      while (scq->tail == scq->next)
1864      {
1865         if (in_interrupt()) {
1866            data = (u32) virt_to_bus(scq->next);
1867            ns_write_sram(card, scq->scd, &data, 1);
1868            spin_unlock_irqrestore(&scq->lock, flags);
1869            printk("nicstar%d: Error pushing TSR.\n", card->index);
1870            return 0;
1871         }
1872
1873         scq->full = 1;
1874         if (has_run++) break;
1875         spin_unlock_irqrestore(&scq->lock, flags);
1876         interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1877         spin_lock_irqsave(&scq->lock, flags);
1878      }
1879
1880      if (!scq->full)
1881      {
1882         tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1883         if (scq_is_vbr)
1884            scdi = NS_TSR_SCDISVBR;
1885         else
1886            scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1887         scqi = scq->next - scq->base;
1888         tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1889         tsr.word_3 = 0x00000000;
1890         tsr.word_4 = 0x00000000;
1891
1892         *scq->next = tsr;
1893         index = (int) scqi;
1894         scq->skb[index] = NULL;
1895         XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1896                 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
1897                 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
1898                 (u32) scq->next);
1899         if (scq->next == scq->last)
1900            scq->next = scq->base;
1901         else
1902            scq->next++;
1903         vc->tbd_count = 0;
1904         scq->tbd_count = 0;
1905      }
1906      else
1907         PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
1908   }
1909   data = (u32) virt_to_bus(scq->next);
1910   ns_write_sram(card, scq->scd, &data, 1);
1911   
1912   spin_unlock_irqrestore(&scq->lock, flags);
1913   
1914   return 0;
1915}
1916
1917
1918
1919static void process_tsq(ns_dev *card)
1920{
1921   u32 scdi;
1922   scq_info *scq;
1923   ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1924   int serviced_entries;   /* flag indicating at least on entry was serviced */
1925   
1926   serviced_entries = 0;
1927   
1928   if (card->tsq.next == card->tsq.last)
1929      one_ahead = card->tsq.base;
1930   else
1931      one_ahead = card->tsq.next + 1;
1932
1933   if (one_ahead == card->tsq.last)
1934      two_ahead = card->tsq.base;
1935   else
1936      two_ahead = one_ahead + 1;
1937   
1938   while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1939          !ns_tsi_isempty(two_ahead))
1940          /* At most two empty, as stated in the 77201 errata */
1941   {
1942      serviced_entries = 1;
1943    
1944      /* Skip the one or two possible empty entries */
1945      while (ns_tsi_isempty(card->tsq.next)) {
1946         if (card->tsq.next == card->tsq.last)
1947            card->tsq.next = card->tsq.base;
1948         else
1949            card->tsq.next++;
1950      }
1951    
1952      if (!ns_tsi_tmrof(card->tsq.next))
1953      {
1954         scdi = ns_tsi_getscdindex(card->tsq.next);
1955         if (scdi == NS_TSI_SCDISVBR)
1956            scq = card->scq0;
1957         else
1958         {
1959            if (card->scd2vc[scdi] == NULL)
1960            {
1961               printk("nicstar%d: could not find VC from SCD index.\n",
1962                      card->index);
1963               ns_tsi_init(card->tsq.next);
1964               return;
1965            }
1966            scq = card->scd2vc[scdi]->scq;
1967         }
1968         drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1969         scq->full = 0;
1970         wake_up_interruptible(&(scq->scqfull_waitq));
1971      }
1972
1973      ns_tsi_init(card->tsq.next);
1974      previous = card->tsq.next;
1975      if (card->tsq.next == card->tsq.last)
1976         card->tsq.next = card->tsq.base;
1977      else
1978         card->tsq.next++;
1979
1980      if (card->tsq.next == card->tsq.last)
1981         one_ahead = card->tsq.base;
1982      else
1983         one_ahead = card->tsq.next + 1;
1984
1985      if (one_ahead == card->tsq.last)
1986         two_ahead = card->tsq.base;
1987      else
1988         two_ahead = one_ahead + 1;
1989   }
1990
1991   if (serviced_entries) {
1992      writel((((u32) previous) - ((u32) card->tsq.base)),
1993             card->membase + TSQH);
1994   }
1995}
1996
1997
1998
1999static void drain_scq(ns_dev *card, scq_info *scq, int pos)
2000{
2001   struct atm_vcc *vcc;
2002   struct sk_buff *skb;
2003   int i;
2004   unsigned long flags;
2005   
2006   XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
2007           card->index, (u32) scq, pos);
2008   if (pos >= scq->num_entries)
2009   {
2010      printk("nicstar%d: Bad index on drain_scq().\n", card->index);
2011      return;
2012   }
2013
2014   spin_lock_irqsave(&scq->lock, flags);
2015   i = (int) (scq->tail - scq->base);
2016   if (++i == scq->num_entries)
2017      i = 0;
2018   while (i != pos)
2019   {
2020      skb = scq->skb[i];
2021      XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
2022              card->index, (u32) skb, i);
2023      if (skb != NULL)
2024      {
2025         vcc = ATM_SKB(skb)->vcc;
2026         if (vcc && vcc->pop != NULL) {
2027            vcc->pop(vcc, skb);
2028         } else {
2029            dev_kfree_skb_irq(skb);
2030         }
2031         scq->skb[i] = NULL;
2032      }
2033      if (++i == scq->num_entries)
2034         i = 0;
2035   }
2036   scq->tail = scq->base + pos;
2037   spin_unlock_irqrestore(&scq->lock, flags);
2038}
2039
2040
2041
2042static void process_rsq(ns_dev *card)
2043{
2044   ns_rsqe *previous;
2045
2046   if (!ns_rsqe_valid(card->rsq.next))
2047      return;
2048   do {
2049      dequeue_rx(card, card->rsq.next);
2050      ns_rsqe_init(card->rsq.next);
2051      previous = card->rsq.next;
2052      if (card->rsq.next == card->rsq.last)
2053         card->rsq.next = card->rsq.base;
2054      else
2055         card->rsq.next++;
2056   } while (ns_rsqe_valid(card->rsq.next));
2057   writel((((u32) previous) - ((u32) card->rsq.base)),
2058          card->membase + RSQH);
2059}
2060
2061
2062
2063static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
2064{
2065   u32 vpi, vci;
2066   vc_map *vc;
2067   struct sk_buff *iovb;
2068   struct iovec *iov;
2069   struct atm_vcc *vcc;
2070   struct sk_buff *skb;
2071   unsigned short aal5_len;
2072   int len;
2073   u32 stat;
2074
2075   stat = readl(card->membase + STAT);
2076   card->sbfqc = ns_stat_sfbqc_get(stat);   
2077   card->lbfqc = ns_stat_lfbqc_get(stat);
2078
2079   skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
2080   vpi = ns_rsqe_vpi(rsqe);
2081   vci = ns_rsqe_vci(rsqe);
2082   if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
2083   {
2084      printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2085             card->index, vpi, vci);
2086      recycle_rx_buf(card, skb);
2087      return;
2088   }
2089   
2090   vc = &(card->vcmap[vpi << card->vcibits | vci]);
2091   if (!vc->rx)
2092   {
2093      RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2094             card->index, vpi, vci);
2095      recycle_rx_buf(card, skb);
2096      return;
2097   }
2098
2099   vcc = vc->rx_vcc;
2100
2101   if (vcc->qos.aal == ATM_AAL0)
2102   {
2103      struct sk_buff *sb;
2104      unsigned char *cell;
2105      int i;
2106
2107      cell = skb->data;
2108      for (i = ns_rsqe_cellcount(rsqe); i; i--)
2109      {
2110         if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
2111         {
2112            printk("nicstar%d: Can't allocate buffers for aal0.\n",
2113                   card->index);
2114            atomic_add(i,&vcc->stats->rx_drop);
2115            break;
2116         }
2117         if (!atm_charge(vcc, sb->truesize))
2118         {
2119            RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2120                     card->index);
2121            atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2122            dev_kfree_skb_any(sb);
2123            break;
2124         }
2125         /* Rebuild the header */
2126         *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2127                               (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2128         if (i == 1 && ns_rsqe_eopdu(rsqe))
2129            *((u32 *) sb->data) |= 0x00000002;
2130         skb_put(sb, NS_AAL0_HEADER);
2131         memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2132         skb_put(sb, ATM_CELL_PAYLOAD);
2133         ATM_SKB(sb)->vcc = vcc;
2134         __net_timestamp(sb);
2135         vcc->push(vcc, sb);
2136         atomic_inc(&vcc->stats->rx);
2137         cell += ATM_CELL_PAYLOAD;
2138      }
2139
2140      recycle_rx_buf(card, skb);
2141      return;
2142   }
2143
2144   /* To reach this point, the AAL layer can only be AAL5 */
2145
2146   if ((iovb = vc->rx_iov) == NULL)
2147   {
2148      iovb = skb_dequeue(&(card->iovpool.queue));
2149      if (iovb == NULL)         /* No buffers in the queue */
2150      {
2151         iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2152         if (iovb == NULL)
2153         {
2154            printk("nicstar%d: Out of iovec buffers.\n", card->index);
2155            atomic_inc(&vcc->stats->rx_drop);
2156            recycle_rx_buf(card, skb);
2157            return;
2158         }
2159         NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2160      }
2161      else
2162         if (--card->iovpool.count < card->iovnr.min)
2163         {
2164            struct sk_buff *new_iovb;
2165            if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2166            {
2167               NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2168               skb_queue_tail(&card->iovpool.queue, new_iovb);
2169               card->iovpool.count++;
2170            }
2171         }
2172      vc->rx_iov = iovb;
2173      NS_SKB(iovb)->iovcnt = 0;
2174      iovb->len = 0;
2175      iovb->data = iovb->head;
2176      skb_reset_tail_pointer(iovb);
2177      NS_SKB(iovb)->vcc = vcc;
2178      /* IMPORTANT: a pointer to the sk_buff containing the small or large
2179                    buffer is stored as iovec base, NOT a pointer to the 
2180                    small or large buffer itself. */
2181   }
2182   else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2183   {
2184      printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2185      atomic_inc(&vcc->stats->rx_err);
2186      recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2187      NS_SKB(iovb)->iovcnt = 0;
2188      iovb->len = 0;
2189      iovb->data = iovb->head;
2190      skb_reset_tail_pointer(iovb);
2191      NS_SKB(iovb)->vcc = vcc;
2192   }
2193   iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
2194   iov->iov_base = (void *) skb;
2195   iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2196   iovb->len += iov->iov_len;
2197
2198   if (NS_SKB(iovb)->iovcnt == 1)
2199   {
2200      if (NS_SKB_CB(skb)->buf_type != BUF_SM)
2201      {
2202         printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2203                card->index);
2204         which_list(card, skb);
2205         atomic_inc(&vcc->stats->rx_err);
2206         recycle_rx_buf(card, skb);
2207         vc->rx_iov = NULL;
2208         recycle_iov_buf(card, iovb);
2209         return;
2210      }
2211   }
2212   else /* NS_SKB(iovb)->iovcnt >= 2 */
2213   {
2214      if (NS_SKB_CB(skb)->buf_type != BUF_LG)
2215      {
2216         printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2217                card->index);
2218         which_list(card, skb);
2219         atomic_inc(&vcc->stats->rx_err);
2220         recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2221                               NS_SKB(iovb)->iovcnt);
2222         vc->rx_iov = NULL;
2223         recycle_iov_buf(card, iovb);
2224         return;
2225      }
2226   }
2227
2228   if (ns_rsqe_eopdu(rsqe))
2229   {
2230      /* This works correctly regardless of the endianness of the host */
2231      unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2232                                              iov->iov_len - 6);
2233      aal5_len = L1L2[0] << 8 | L1L2[1];
2234      len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2235      if (ns_rsqe_crcerr(rsqe) ||
2236          len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2237      {
2238         printk("nicstar%d: AAL5 CRC error", card->index);
2239         if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2240            printk(" - PDU size mismatch.\n");
2241         else
2242            printk(".\n");
2243         atomic_inc(&vcc->stats->rx_err);
2244         recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2245           NS_SKB(iovb)->iovcnt);
2246         vc->rx_iov = NULL;
2247         recycle_iov_buf(card, iovb);
2248         return;
2249      }
2250
2251      /* By this point we (hopefully) have a complete SDU without errors. */
2252
2253      if (NS_SKB(iovb)->iovcnt == 1)    /* Just a small buffer */
2254      {
2255         /* skb points to a small buffer */
2256         if (!atm_charge(vcc, skb->truesize))
2257         {
2258            push_rxbufs(card, skb);
2259            atomic_inc(&vcc->stats->rx_drop);
2260         }
2261         else
2262         {
2263            skb_put(skb, len);
2264            dequeue_sm_buf(card, skb);
2265#ifdef NS_USE_DESTRUCTORS
2266            skb->destructor = ns_sb_destructor;
2267#endif /* NS_USE_DESTRUCTORS */
2268            ATM_SKB(skb)->vcc = vcc;
2269            __net_timestamp(skb);
2270            vcc->push(vcc, skb);
2271            atomic_inc(&vcc->stats->rx);
2272         }
2273      }
2274      else if (NS_SKB(iovb)->iovcnt == 2)       /* One small plus one large buffer */
2275      {
2276         struct sk_buff *sb;
2277
2278         sb = (struct sk_buff *) (iov - 1)->iov_base;
2279         /* skb points to a large buffer */
2280
2281         if (len <= NS_SMBUFSIZE)
2282         {
2283            if (!atm_charge(vcc, sb->truesize))
2284            {
2285               push_rxbufs(card, sb);
2286               atomic_inc(&vcc->stats->rx_drop);
2287            }
2288            else
2289            {
2290               skb_put(sb, len);
2291               dequeue_sm_buf(card, sb);
2292#ifdef NS_USE_DESTRUCTORS
2293               sb->destructor = ns_sb_destructor;
2294#endif /* NS_USE_DESTRUCTORS */
2295               ATM_SKB(sb)->vcc = vcc;
2296               __net_timestamp(sb);
2297               vcc->push(vcc, sb);
2298               atomic_inc(&vcc->stats->rx);
2299            }
2300
2301            push_rxbufs(card, skb);
2302
2303         }
2304         else                   /* len > NS_SMBUFSIZE, the usual case */
2305         {
2306            if (!atm_charge(vcc, skb->truesize))
2307            {
2308               push_rxbufs(card, skb);
2309               atomic_inc(&vcc->stats->rx_drop);
2310            }
2311            else
2312            {
2313               dequeue_lg_buf(card, skb);
2314#ifdef NS_USE_DESTRUCTORS
2315               skb->destructor = ns_lb_destructor;
2316#endif /* NS_USE_DESTRUCTORS */
2317               skb_push(skb, NS_SMBUFSIZE);
2318               skb_copy_from_linear_data(sb, skb->data, NS_SMBUFSIZE);
2319               skb_put(skb, len - NS_SMBUFSIZE);
2320               ATM_SKB(skb)->vcc = vcc;
2321               __net_timestamp(skb);
2322               vcc->push(vcc, skb);
2323               atomic_inc(&vcc->stats->rx);
2324            }
2325
2326            push_rxbufs(card, sb);
2327
2328         }
2329         
2330      }
2331      else                              /* Must push a huge buffer */
2332      {
2333         struct sk_buff *hb, *sb, *lb;
2334         int remaining, tocopy;
2335         int j;
2336
2337         hb = skb_dequeue(&(card->hbpool.queue));
2338         if (hb == NULL)                /* No buffers in the queue */
2339         {
2340
2341            hb = dev_alloc_skb(NS_HBUFSIZE);
2342            if (hb == NULL)
2343            {
2344               printk("nicstar%d: Out of huge buffers.\n", card->index);
2345               atomic_inc(&vcc->stats->rx_drop);
2346               recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2347                                     NS_SKB(iovb)->iovcnt);
2348               vc->rx_iov = NULL;
2349               recycle_iov_buf(card, iovb);
2350               return;
2351            }
2352            else if (card->hbpool.count < card->hbnr.min)
2353            {
2354               struct sk_buff *new_hb;
2355               if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2356               {
2357                  skb_queue_tail(&card->hbpool.queue, new_hb);
2358                  card->hbpool.count++;
2359               }
2360            }
2361            NS_SKB_CB(hb)->buf_type = BUF_NONE;
2362         }
2363         else
2364         if (--card->hbpool.count < card->hbnr.min)
2365         {
2366            struct sk_buff *new_hb;
2367            if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2368            {
2369               NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
2370               skb_queue_tail(&card->hbpool.queue, new_hb);
2371               card->hbpool.count++;
2372            }
2373            if (card->hbpool.count < card->hbnr.min)
2374            {
2375               if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2376               {
2377                  NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
2378                  skb_queue_tail(&card->hbpool.queue, new_hb);
2379                  card->hbpool.count++;
2380               }
2381            }
2382         }
2383
2384         iov = (struct iovec *) iovb->data;
2385
2386         if (!atm_charge(vcc, hb->truesize))
2387         {
2388            recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
2389            if (card->hbpool.count < card->hbnr.max)
2390            {
2391               skb_queue_tail(&card->hbpool.queue, hb);
2392               card->hbpool.count++;
2393            }
2394            else
2395               dev_kfree_skb_any(hb);
2396            atomic_inc(&vcc->stats->rx_drop);
2397         }
2398         else
2399         {
2400            /* Copy the small buffer to the huge buffer */
2401            sb = (struct sk_buff *) iov->iov_base;
2402            skb_copy_from_linear_data(sb, hb->data, iov->iov_len);
2403            skb_put(hb, iov->iov_len);
2404            remaining = len - iov->iov_len;
2405            iov++;
2406            /* Free the small buffer */
2407            push_rxbufs(card, sb);
2408
2409            /* Copy all large buffers to the huge buffer and free them */
2410            for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
2411            {
2412               lb = (struct sk_buff *) iov->iov_base;
2413               tocopy = min_t(int, remaining, iov->iov_len);
2414               skb_copy_from_linear_data(lb, skb_tail_pointer(hb), tocopy);
2415               skb_put(hb, tocopy);
2416               iov++;
2417               remaining -= tocopy;
2418               push_rxbufs(card, lb);
2419            }
2420#ifdef EXTRA_DEBUG
2421            if (remaining != 0 || hb->len != len)
2422               printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
2423#endif /* EXTRA_DEBUG */
2424            ATM_SKB(hb)->vcc = vcc;
2425#ifdef NS_USE_DESTRUCTORS
2426            hb->destructor = ns_hb_destructor;
2427#endif /* NS_USE_DESTRUCTORS */
2428            __net_timestamp(hb);
2429            vcc->push(vcc, hb);
2430            atomic_inc(&vcc->stats->rx);
2431         }
2432      }
2433
2434      vc->rx_iov = NULL;
2435      recycle_iov_buf(card, iovb);
2436   }
2437
2438}
2439
2440
2441
2442#ifdef NS_USE_DESTRUCTORS
2443
2444static void ns_sb_destructor(struct sk_buff *sb)
2445{
2446   ns_dev *card;
2447   u32 stat;
2448
2449   card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2450   stat = readl(card->membase + STAT);
2451   card->sbfqc = ns_stat_sfbqc_get(stat);   
2452   card->lbfqc = ns_stat_lfbqc_get(stat);
2453
2454   do
2455   {
2456      sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2457      if (sb == NULL)
2458         break;
2459      NS_SKB_CB(sb)->buf_type = BUF_SM;
2460      skb_queue_tail(&card->sbpool.queue, sb);
2461      skb_reserve(sb, NS_AAL0_HEADER);
2462      push_rxbufs(card, sb);
2463   } while (card->sbfqc < card->sbnr.min);
2464}
2465
2466
2467
2468static void ns_lb_destructor(struct sk_buff *lb)
2469{
2470   ns_dev *card;
2471   u32 stat;
2472
2473   card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2474   stat = readl(card->membase + STAT);
2475   card->sbfqc = ns_stat_sfbqc_get(stat);   
2476   card->lbfqc = ns_stat_lfbqc_get(stat);
2477
2478   do
2479   {
2480      lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2481      if (lb == NULL)
2482         break;
2483      NS_SKB_CB(lb)->buf_type = BUF_LG;
2484      skb_queue_tail(&card->lbpool.queue, lb);
2485      skb_reserve(lb, NS_SMBUFSIZE);
2486      push_rxbufs(card, lb);
2487   } while (card->lbfqc < card->lbnr.min);
2488}
2489
2490
2491
2492static void ns_hb_destructor(struct sk_buff *hb)
2493{
2494   ns_dev *card;
2495
2496   card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2497
2498   while (card->hbpool.count < card->hbnr.init)
2499   {
2500      hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2501      if (hb == NULL)
2502         break;
2503      NS_SKB_CB(hb)->buf_type = BUF_NONE;
2504      skb_queue_tail(&card->hbpool.queue, hb);
2505      card->hbpool.count++;
2506   }
2507}
2508
2509#endif /* NS_USE_DESTRUCTORS */
2510
2511
2512static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2513{
2514        struct ns_skb_cb *cb = NS_SKB_CB(skb);
2515
2516        if (unlikely(cb->buf_type == BUF_NONE)) {
2517                printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2518                dev_kfree_skb_any(skb);
2519        } else
2520                push_rxbufs(card, skb);
2521}
2522
2523
2524static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2525{
2526        while (count-- > 0)
2527                recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
2528}
2529
2530
2531static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2532{
2533   if (card->iovpool.count < card->iovnr.max)
2534   {
2535      skb_queue_tail(&card->iovpool.queue, iovb);
2536      card->iovpool.count++;
2537   }
2538   else
2539      dev_kfree_skb_any(iovb);
2540}
2541
2542
2543
2544static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2545{
2546   skb_unlink(sb, &card->sbpool.queue);
2547#ifdef NS_USE_DESTRUCTORS
2548   if (card->sbfqc < card->sbnr.min)
2549#else
2550   if (card->sbfqc < card->sbnr.init)
2551   {
2552      struct sk_buff *new_sb;
2553      if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2554      {
2555         NS_SKB_CB(new_sb)->buf_type = BUF_SM;
2556         skb_queue_tail(&card->sbpool.queue, new_sb);
2557         skb_reserve(new_sb, NS_AAL0_HEADER);
2558         push_rxbufs(card, new_sb);
2559      }
2560   }
2561   if (card->sbfqc < card->sbnr.init)
2562#endif /* NS_USE_DESTRUCTORS */
2563   {
2564      struct sk_buff *new_sb;
2565      if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2566      {
2567         NS_SKB_CB(new_sb)->buf_type = BUF_SM;
2568         skb_queue_tail(&card->sbpool.queue, new_sb);
2569         skb_reserve(new_sb, NS_AAL0_HEADER);
2570         push_rxbufs(card, new_sb);
2571      }
2572   }
2573}
2574
2575
2576
2577static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2578{
2579   skb_unlink(lb, &card->lbpool.queue);
2580#ifdef NS_USE_DESTRUCTORS
2581   if (card->lbfqc < card->lbnr.min)
2582#else
2583   if (card->lbfqc < card->lbnr.init)
2584   {
2585      struct sk_buff *new_lb;
2586      if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2587      {
2588         NS_SKB_CB(new_lb)->buf_type = BUF_LG;
2589         skb_queue_tail(&card->lbpool.queue, new_lb);
2590         skb_reserve(new_lb, NS_SMBUFSIZE);
2591         push_rxbufs(card, new_lb);
2592      }
2593   }
2594   if (card->lbfqc < card->lbnr.init)
2595#endif /* NS_USE_DESTRUCTORS */
2596   {
2597      struct sk_buff *new_lb;
2598      if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2599      {
2600         NS_SKB_CB(new_lb)->buf_type = BUF_LG;
2601         skb_queue_tail(&card->lbpool.queue, new_lb);
2602         skb_reserve(new_lb, NS_SMBUFSIZE);
2603         push_rxbufs(card, new_lb);
2604      }
2605   }
2606}
2607
2608
2609
2610static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2611{
2612   u32 stat;
2613   ns_dev *card;
2614   int left;
2615
2616   left = (int) *pos;
2617   card = (ns_dev *) dev->dev_data;
2618   stat = readl(card->membase + STAT);
2619   if (!left--)
2620      return sprintf(page, "Pool   count    min   init    max \n");
2621   if (!left--)
2622      return sprintf(page, "Small  %5d  %5d  %5d  %5d \n",
2623                     ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
2624                     card->sbnr.max);
2625   if (!left--)
2626      return sprintf(page, "Large  %5d  %5d  %5d  %5d \n",
2627                     ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
2628                     card->lbnr.max);
2629   if (!left--)
2630      return sprintf(page, "Huge   %5d  %5d  %5d  %5d \n", card->hbpool.count,
2631                     card->hbnr.min, card->hbnr.init, card->hbnr.max);
2632   if (!left--)
2633      return sprintf(page, "Iovec  %5d  %5d  %5d  %5d \n", card->iovpool.count,
2634                     card->iovnr.min, card->iovnr.init, card->iovnr.max);
2635   if (!left--)
2636   {
2637      int retval;
2638      retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2639      card->intcnt = 0;
2640      return retval;
2641   }
2642#if 0
2643   /* Dump 25.6 Mbps PHY registers */
2644   /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2645      here just in case it's needed for debugging. */
2646   if (card->max_pcr == ATM_25_PCR && !left--)
2647   {
2648      u32 phy_regs[4];
2649      u32 i;
2650
2651      for (i = 0; i < 4; i++)
2652      {
2653         while (CMD_BUSY(card));
2654         writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
2655         while (CMD_BUSY(card));
2656         phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2657      }
2658
2659      return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2660                     phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
2661   }
2662#endif /* 0 - Dump 25.6 Mbps PHY registers */
2663#if 0
2664   /* Dump TST */
2665   if (left-- < NS_TST_NUM_ENTRIES)
2666   {
2667      if (card->tste2vc[left + 1] == NULL)
2668         return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2669      else
2670         return sprintf(page, "%5d - %d %d \n", left + 1,
2671                        card->tste2vc[left + 1]->tx_vcc->vpi,
2672                        card->tste2vc[left + 1]->tx_vcc->vci);
2673   }
2674#endif /* 0 */
2675   return 0;
2676}
2677
2678
2679
2680static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
2681{
2682   ns_dev *card;
2683   pool_levels pl;
2684   long btype;
2685   unsigned long flags;
2686
2687   card = dev->dev_data;
2688   switch (cmd)
2689   {
2690      case NS_GETPSTAT:
2691         if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
2692            return -EFAULT;
2693         switch (pl.buftype)
2694         {
2695            case NS_BUFTYPE_SMALL:
2696               pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
2697               pl.level.min = card->sbnr.min;
2698               pl.level.init = card->sbnr.init;
2699               pl.level.max = card->sbnr.max;
2700               break;
2701
2702            case NS_BUFTYPE_LARGE:
2703               pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
2704               pl.level.min = card->lbnr.min;
2705               pl.level.init = card->lbnr.init;
2706               pl.level.max = card->lbnr.max;
2707               break;
2708
2709            case NS_BUFTYPE_HUGE:
2710               pl.count = card->hbpool.count;
2711               pl.level.min = card->hbnr.min;
2712               pl.level.init = card->hbnr.init;
2713               pl.level.max = card->hbnr.max;
2714               break;
2715
2716            case NS_BUFTYPE_IOVEC:
2717               pl.count = card->iovpool.count;
2718               pl.level.min = card->iovnr.min;
2719               pl.level.init = card->iovnr.init;
2720               pl.level.max = card->iovnr.max;
2721               break;
2722
2723            default:
2724               return -ENOIOCTLCMD;
2725
2726         }
2727         if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2728            return (sizeof(pl));
2729         else
2730            return -EFAULT;
2731
2732      case NS_SETBUFLEV:
2733         if (!capable(CAP_NET_ADMIN))
2734            return -EPERM;
2735         if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2736            return -EFAULT;
2737         if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
2738            return -EINVAL;
2739         if (pl.level.min == 0)
2740            return -EINVAL;
2741         switch (pl.buftype)
2742         {
2743            case NS_BUFTYPE_SMALL:
2744               if (pl.level.max > TOP_SB)
2745                  return -EINVAL;
2746               card->sbnr.min = pl.level.min;
2747               card->sbnr.init = pl.level.init;
2748               card->sbnr.max = pl.level.max;
2749               break;
2750
2751            case NS_BUFTYPE_LARGE:
2752               if (pl.level.max > TOP_LB)
2753                  return -EINVAL;
2754               card->lbnr.min = pl.level.min;
2755               card->lbnr.init = pl.level.init;
2756               card->lbnr.max = pl.level.max;
2757               break;
2758
2759            case NS_BUFTYPE_HUGE:
2760               if (pl.level.max > TOP_HB)
2761                  return -EINVAL;
2762               card->hbnr.min = pl.level.min;
2763               card->hbnr.init = pl.level.init;
2764               card->hbnr.max = pl.level.max;
2765               break;
2766
2767            case NS_BUFTYPE_IOVEC:
2768               if (pl.level.max > TOP_IOVB)
2769                  return -EINVAL;
2770               card->iovnr.min = pl.level.min;
2771               card->iovnr.init = pl.level.init;
2772               card->iovnr.max = pl.level.max;
2773               break;
2774
2775            default:
2776               return -EINVAL;
2777
2778         }       
2779         return 0;
2780
2781      case NS_ADJBUFLEV:
2782         if (!capable(CAP_NET_ADMIN))
2783            return -EPERM;
2784         btype = (long) arg;    /* a long is the same size as a pointer or bigger */
2785         switch (btype)
2786         {
2787            case NS_BUFTYPE_SMALL:
2788               while (card->sbfqc < card->sbnr.init)
2789               {
2790                  struct sk_buff *sb;
2791
2792                  sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2793                  if (sb == NULL)
2794                     return -ENOMEM;
2795                  NS_SKB_CB(sb)->buf_type = BUF_SM;
2796                  skb_queue_tail(&card->sbpool.queue, sb);
2797                  skb_reserve(sb, NS_AAL0_HEADER);
2798                  push_rxbufs(card, sb);
2799               }
2800               break;
2801
2802            case NS_BUFTYPE_LARGE:
2803               while (card->lbfqc < card->lbnr.init)
2804               {
2805                  struct sk_buff *lb;
2806
2807                  lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2808                  if (lb == NULL)
2809                     return -ENOMEM;
2810                  NS_SKB_CB(lb)->buf_type = BUF_LG;
2811                  skb_queue_tail(&card->lbpool.queue, lb);
2812                  skb_reserve(lb, NS_SMBUFSIZE);
2813                  push_rxbufs(card, lb);
2814               }
2815               break;
2816
2817            case NS_BUFTYPE_HUGE:
2818               while (card->hbpool.count > card->hbnr.init)
2819               {
2820                  struct sk_buff *hb;
2821
2822                  spin_lock_irqsave(&card->int_lock, flags);
2823                  hb = skb_dequeue(&card->hbpool.queue);
2824                  card->hbpool.count--;
2825                  spin_unlock_irqrestore(&card->int_lock, flags);
2826                  if (hb == NULL)
2827                     printk("nicstar%d: huge buffer count inconsistent.\n",
2828                            card->index);
2829                  else
2830                     dev_kfree_skb_any(hb);
2831                  
2832               }
2833               while (card->hbpool.count < card->hbnr.init)
2834               {
2835                  struct sk_buff *hb;
2836
2837                  hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2838                  if (hb == NULL)
2839                     return -ENOMEM;
2840                  NS_SKB_CB(hb)->buf_type = BUF_NONE;
2841                  spin_lock_irqsave(&card->int_lock, flags);
2842                  skb_queue_tail(&card->hbpool.queue, hb);
2843                  card->hbpool.count++;
2844                  spin_unlock_irqrestore(&card->int_lock, flags);
2845               }
2846               break;
2847
2848            case NS_BUFTYPE_IOVEC:
2849               while (card->iovpool.count > card->iovnr.init)
2850               {
2851                  struct sk_buff *iovb;
2852
2853                  spin_lock_irqsave(&card->int_lock, flags);
2854                  iovb = skb_dequeue(&card->iovpool.queue);
2855                  card->iovpool.count--;
2856                  spin_unlock_irqrestore(&card->int_lock, flags);
2857                  if (iovb == NULL)
2858                     printk("nicstar%d: iovec buffer count inconsistent.\n",
2859                            card->index);
2860                  else
2861                     dev_kfree_skb_any(iovb);
2862
2863               }
2864               while (card->iovpool.count < card->iovnr.init)
2865               {
2866                  struct sk_buff *iovb;
2867
2868                  iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2869                  if (iovb == NULL)
2870                     return -ENOMEM;
2871                  NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2872                  spin_lock_irqsave(&card->int_lock, flags);
2873                  skb_queue_tail(&card->iovpool.queue, iovb);
2874                  card->iovpool.count++;
2875                  spin_unlock_irqrestore(&card->int_lock, flags);
2876               }
2877               break;
2878
2879            default:
2880               return -EINVAL;
2881
2882         }
2883         return 0;
2884
2885      default:
2886         if (dev->phy && dev->phy->ioctl) {
2887            return dev->phy->ioctl(dev, cmd, arg);
2888         }
2889         else {
2890            printk("nicstar%d: %s == NULL \n", card->index,
2891                   dev->phy ? "dev->phy->ioctl" : "dev->phy");
2892            return -ENOIOCTLCMD;
2893         }
2894   }
2895}
2896
2897
2898static void which_list(ns_dev *card, struct sk_buff *skb)
2899{
2900        printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
2901}
2902
2903
2904static void ns_poll(unsigned long arg)
2905{
2906   int i;
2907   ns_dev *card;
2908   unsigned long flags;
2909   u32 stat_r, stat_w;
2910
2911   PRINTK("nicstar: Entering ns_poll().\n");
2912   for (i = 0; i < num_cards; i++)
2913   {
2914      card = cards[i];
2915      if (spin_is_locked(&card->int_lock)) {
2916      /* Probably it isn't worth spinning */
2917         continue;
2918      }
2919      spin_lock_irqsave(&card->int_lock, flags);
2920
2921      stat_w = 0;
2922      stat_r = readl(card->membase + STAT);
2923      if (stat_r & NS_STAT_TSIF)
2924         stat_w |= NS_STAT_TSIF;
2925      if (stat_r & NS_STAT_EOPDU)
2926         stat_w |= NS_STAT_EOPDU;
2927
2928      process_tsq(card);
2929      process_rsq(card);
2930
2931      writel(stat_w, card->membase + STAT);
2932      spin_unlock_irqrestore(&card->int_lock, flags);
2933   }
2934   mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2935   PRINTK("nicstar: Leaving ns_poll().\n");
2936}
2937
2938
2939
2940static int ns_parse_mac(char *mac, unsigned char *esi)
2941{
2942   int i, j;
2943   short byte1, byte0;
2944
2945   if (mac == NULL || esi == NULL)
2946      return -1;
2947   j = 0;
2948   for (i = 0; i < 6; i++)
2949   {
2950      if ((byte1 = ns_h2i(mac[j++])) < 0)
2951         return -1;
2952      if ((byte0 = ns_h2i(mac[j++])) < 0)
2953         return -1;
2954      esi[i] = (unsigned char) (byte1 * 16 + byte0);
2955      if (i < 5)
2956      {
2957         if (mac[j++] != ':')
2958            return -1;
2959      }
2960   }
2961   return 0;
2962}
2963
2964
2965
2966static short ns_h2i(char c)
2967{
2968   if (c >= '0' && c <= '9')
2969      return (short) (c - '0');
2970   if (c >= 'A' && c <= 'F')
2971      return (short) (c - 'A' + 10);
2972   if (c >= 'a' && c <= 'f')
2973      return (short) (c - 'a' + 10);
2974   return -1;
2975}
2976
2977
2978
2979static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2980                    unsigned long addr)
2981{
2982   ns_dev *card;
2983   unsigned long flags;
2984
2985   card = dev->dev_data;
2986   spin_lock_irqsave(&card->res_lock, flags);
2987   while(CMD_BUSY(card));
2988   writel((unsigned long) value, card->membase + DR0);
2989   writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2990          card->membase + CMD);
2991   spin_unlock_irqrestore(&card->res_lock, flags);
2992}
2993
2994
2995
2996static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2997{
2998   ns_dev *card;
2999   unsigned long flags;
3000   unsigned long data;
3001
3002   card = dev->dev_data;
3003   spin_lock_irqsave(&card->res_lock, flags);
3004   while(CMD_BUSY(card));
3005   writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3006          card->membase + CMD);
3007   while(CMD_BUSY(card));
3008   data = readl(card->membase + DR0) & 0x000000FF;
3009   spin_unlock_irqrestore(&card->res_lock, flags);
3010   return (unsigned char) data;
3011}
3012
3013
3014
3015module_init(nicstar_init);
3016module_exit(nicstar_cleanup);
3017
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