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15#include <linux/stddef.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/errno.h>
19#include <linux/major.h>
20#include <linux/delay.h>
21#include <linux/irq.h>
22#include <linux/module.h>
23#include <linux/device.h>
24#include <linux/platform_device.h>
25#include <linux/of_platform.h>
26#include <linux/phy.h>
27#include <linux/phy_fixed.h>
28#include <linux/spi/spi.h>
29#include <linux/fsl_devices.h>
30#include <linux/fs_enet_pd.h>
31#include <linux/fs_uart_pd.h>
32
33#include <asm/system.h>
34#include <asm/atomic.h>
35#include <asm/io.h>
36#include <asm/irq.h>
37#include <asm/time.h>
38#include <asm/prom.h>
39#include <sysdev/fsl_soc.h>
40#include <mm/mmu_decl.h>
41#include <asm/cpm2.h>
42
43extern void init_fcc_ioports(struct fs_platform_info*);
44extern void init_fec_ioports(struct fs_platform_info*);
45extern void init_smc_ioports(struct fs_uart_platform_info*);
46static phys_addr_t immrbase = -1;
47
48phys_addr_t get_immrbase(void)
49{
50 struct device_node *soc;
51
52 if (immrbase != -1)
53 return immrbase;
54
55 soc = of_find_node_by_type(NULL, "soc");
56 if (soc) {
57 int size;
58 u32 naddr;
59 const u32 *prop = of_get_property(soc, "#address-cells", &size);
60
61 if (prop && size == 4)
62 naddr = *prop;
63 else
64 naddr = 2;
65
66 prop = of_get_property(soc, "ranges", &size);
67 if (prop)
68 immrbase = of_translate_address(soc, prop + naddr);
69
70 of_node_put(soc);
71 }
72
73 return immrbase;
74}
75
76EXPORT_SYMBOL(get_immrbase);
77
78static u32 sysfreq = -1;
79
80u32 fsl_get_sys_freq(void)
81{
82 struct device_node *soc;
83 const u32 *prop;
84 int size;
85
86 if (sysfreq != -1)
87 return sysfreq;
88
89 soc = of_find_node_by_type(NULL, "soc");
90 if (!soc)
91 return -1;
92
93 prop = of_get_property(soc, "clock-frequency", &size);
94 if (!prop || size != sizeof(*prop) || *prop == 0)
95 prop = of_get_property(soc, "bus-frequency", &size);
96
97 if (prop && size == sizeof(*prop))
98 sysfreq = *prop;
99
100 of_node_put(soc);
101 return sysfreq;
102}
103EXPORT_SYMBOL(fsl_get_sys_freq);
104
105#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
106
107static u32 brgfreq = -1;
108
109u32 get_brgfreq(void)
110{
111 struct device_node *node;
112 const unsigned int *prop;
113 int size;
114
115 if (brgfreq != -1)
116 return brgfreq;
117
118 node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
119 if (node) {
120 prop = of_get_property(node, "clock-frequency", &size);
121 if (prop && size == 4)
122 brgfreq = *prop;
123
124 of_node_put(node);
125 return brgfreq;
126 }
127
128
129 node = of_find_node_by_type(NULL, "cpm");
130 if (!node)
131 node = of_find_compatible_node(NULL, NULL, "fsl,qe");
132 if (!node)
133 node = of_find_node_by_type(NULL, "qe");
134
135 if (node) {
136 prop = of_get_property(node, "brg-frequency", &size);
137 if (prop && size == 4)
138 brgfreq = *prop;
139
140 if (brgfreq == -1 || brgfreq == 0) {
141 prop = of_get_property(node, "bus-frequency", &size);
142 if (prop && size == 4)
143 brgfreq = *prop / 2;
144 }
145 of_node_put(node);
146 }
147
148 return brgfreq;
149}
150
151EXPORT_SYMBOL(get_brgfreq);
152
153static u32 fs_baudrate = -1;
154
155u32 get_baudrate(void)
156{
157 struct device_node *node;
158
159 if (fs_baudrate != -1)
160 return fs_baudrate;
161
162 node = of_find_node_by_type(NULL, "serial");
163 if (node) {
164 int size;
165 const unsigned int *prop = of_get_property(node,
166 "current-speed", &size);
167
168 if (prop)
169 fs_baudrate = *prop;
170 of_node_put(node);
171 }
172
173 return fs_baudrate;
174}
175
176EXPORT_SYMBOL(get_baudrate);
177#endif
178
179#ifdef CONFIG_FIXED_PHY
180static int __init of_add_fixed_phys(void)
181{
182 int ret;
183 struct device_node *np;
184 u32 *fixed_link;
185 struct fixed_phy_status status = {};
186
187 for_each_node_by_name(np, "ethernet") {
188 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
189 if (!fixed_link)
190 continue;
191
192 status.link = 1;
193 status.duplex = fixed_link[1];
194 status.speed = fixed_link[2];
195 status.pause = fixed_link[3];
196 status.asym_pause = fixed_link[4];
197
198 ret = fixed_phy_add(PHY_POLL, fixed_link[0], &status);
199 if (ret) {
200 of_node_put(np);
201 return ret;
202 }
203 }
204
205 return 0;
206}
207arch_initcall(of_add_fixed_phys);
208#endif
209
210static int gfar_mdio_of_init_one(struct device_node *np)
211{
212 int k;
213 struct device_node *child = NULL;
214 struct gianfar_mdio_data mdio_data;
215 struct platform_device *mdio_dev;
216 struct resource res;
217 int ret;
218
219 memset(&res, 0, sizeof(res));
220 memset(&mdio_data, 0, sizeof(mdio_data));
221
222 ret = of_address_to_resource(np, 0, &res);
223 if (ret)
224 return ret;
225
226
227
228 mdio_dev = platform_device_register_simple("fsl-gianfar_mdio",
229 res.start&0xfffff, &res, 1);
230 if (IS_ERR(mdio_dev))
231 return PTR_ERR(mdio_dev);
232
233 for (k = 0; k < 32; k++)
234 mdio_data.irq[k] = PHY_POLL;
235
236 while ((child = of_get_next_child(np, child)) != NULL) {
237 int irq = irq_of_parse_and_map(child, 0);
238 if (irq != NO_IRQ) {
239 const u32 *id = of_get_property(child, "reg", NULL);
240 mdio_data.irq[*id] = irq;
241 }
242 }
243
244 ret = platform_device_add_data(mdio_dev, &mdio_data,
245 sizeof(struct gianfar_mdio_data));
246 if (ret)
247 platform_device_unregister(mdio_dev);
248
249 return ret;
250}
251
252static int __init gfar_mdio_of_init(void)
253{
254 struct device_node *np = NULL;
255
256 for_each_compatible_node(np, NULL, "fsl,gianfar-mdio")
257 gfar_mdio_of_init_one(np);
258
259
260 for_each_compatible_node(np, "mdio", "gianfar");
261 gfar_mdio_of_init_one(np);
262
263 return 0;
264}
265
266arch_initcall(gfar_mdio_of_init);
267
268static const char *gfar_tx_intr = "tx";
269static const char *gfar_rx_intr = "rx";
270static const char *gfar_err_intr = "error";
271
272static int __init gfar_of_init(void)
273{
274 struct device_node *np;
275 unsigned int i;
276 struct platform_device *gfar_dev;
277 struct resource res;
278 int ret;
279
280 for (np = NULL, i = 0;
281 (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
282 i++) {
283 struct resource r[4];
284 struct device_node *phy, *mdio;
285 struct gianfar_platform_data gfar_data;
286 const unsigned int *id;
287 const char *model;
288 const char *ctype;
289 const void *mac_addr;
290 const phandle *ph;
291 int n_res = 2;
292
293 if (!of_device_is_available(np))
294 continue;
295
296 memset(r, 0, sizeof(r));
297 memset(&gfar_data, 0, sizeof(gfar_data));
298
299 ret = of_address_to_resource(np, 0, &r[0]);
300 if (ret)
301 goto err;
302
303 of_irq_to_resource(np, 0, &r[1]);
304
305 model = of_get_property(np, "model", NULL);
306
307
308 if (model && strcasecmp(model, "FEC")) {
309 r[1].name = gfar_tx_intr;
310
311 r[2].name = gfar_rx_intr;
312 of_irq_to_resource(np, 1, &r[2]);
313
314 r[3].name = gfar_err_intr;
315 of_irq_to_resource(np, 2, &r[3]);
316
317 n_res += 2;
318 }
319
320 gfar_dev =
321 platform_device_register_simple("fsl-gianfar", i, &r[0],
322 n_res);
323
324 if (IS_ERR(gfar_dev)) {
325 ret = PTR_ERR(gfar_dev);
326 goto err;
327 }
328
329 mac_addr = of_get_mac_address(np);
330 if (mac_addr)
331 memcpy(gfar_data.mac_addr, mac_addr, 6);
332
333 if (model && !strcasecmp(model, "TSEC"))
334 gfar_data.device_flags =
335 FSL_GIANFAR_DEV_HAS_GIGABIT |
336 FSL_GIANFAR_DEV_HAS_COALESCE |
337 FSL_GIANFAR_DEV_HAS_RMON |
338 FSL_GIANFAR_DEV_HAS_MULTI_INTR;
339 if (model && !strcasecmp(model, "eTSEC"))
340 gfar_data.device_flags =
341 FSL_GIANFAR_DEV_HAS_GIGABIT |
342 FSL_GIANFAR_DEV_HAS_COALESCE |
343 FSL_GIANFAR_DEV_HAS_RMON |
344 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
345 FSL_GIANFAR_DEV_HAS_CSUM |
346 FSL_GIANFAR_DEV_HAS_VLAN |
347 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
348
349 ctype = of_get_property(np, "phy-connection-type", NULL);
350
351
352 if (ctype && !strcmp(ctype, "rgmii-id"))
353 gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
354 else
355 gfar_data.interface = PHY_INTERFACE_MODE_MII;
356
357 if (of_get_property(np, "fsl,magic-packet", NULL))
358 gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
359
360 ph = of_get_property(np, "phy-handle", NULL);
361 if (ph == NULL) {
362 u32 *fixed_link;
363
364 fixed_link = (u32 *)of_get_property(np, "fixed-link",
365 NULL);
366 if (!fixed_link) {
367 ret = -ENODEV;
368 goto unreg;
369 }
370
371 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "0");
372 gfar_data.phy_id = fixed_link[0];
373 } else {
374 phy = of_find_node_by_phandle(*ph);
375
376 if (phy == NULL) {
377 ret = -ENODEV;
378 goto unreg;
379 }
380
381 mdio = of_get_parent(phy);
382
383 id = of_get_property(phy, "reg", NULL);
384 ret = of_address_to_resource(mdio, 0, &res);
385 if (ret) {
386 of_node_put(phy);
387 of_node_put(mdio);
388 goto unreg;
389 }
390
391 gfar_data.phy_id = *id;
392 snprintf(gfar_data.bus_id, MII_BUS_ID_SIZE, "%llx",
393 (unsigned long long)res.start&0xfffff);
394
395 of_node_put(phy);
396 of_node_put(mdio);
397 }
398
399
400
401
402
403
404
405
406
407 for_each_compatible_node(mdio, NULL, "fsl,gianfar-mdio") {
408 if (of_address_to_resource(mdio, 0, &res))
409 continue;
410
411 if (res.start >= r[0].start && res.end <= r[0].end) {
412
413
414
415
416
417 gfar_data.mdio_bus = res.start&0xfffff;
418 of_node_put(mdio);
419 break;
420 }
421 }
422
423 ret =
424 platform_device_add_data(gfar_dev, &gfar_data,
425 sizeof(struct
426 gianfar_platform_data));
427 if (ret)
428 goto unreg;
429 }
430
431 return 0;
432
433unreg:
434 platform_device_unregister(gfar_dev);
435err:
436 return ret;
437}
438
439arch_initcall(gfar_of_init);
440
441static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
442{
443 if (!phy_type)
444 return FSL_USB2_PHY_NONE;
445 if (!strcasecmp(phy_type, "ulpi"))
446 return FSL_USB2_PHY_ULPI;
447 if (!strcasecmp(phy_type, "utmi"))
448 return FSL_USB2_PHY_UTMI;
449 if (!strcasecmp(phy_type, "utmi_wide"))
450 return FSL_USB2_PHY_UTMI_WIDE;
451 if (!strcasecmp(phy_type, "serial"))
452 return FSL_USB2_PHY_SERIAL;
453
454 return FSL_USB2_PHY_NONE;
455}
456
457static int __init fsl_usb_of_init(void)
458{
459 struct device_node *np;
460 unsigned int i = 0;
461 struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
462 *usb_dev_dr_client = NULL;
463 int ret;
464
465 for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
466 struct resource r[2];
467 struct fsl_usb2_platform_data usb_data;
468 const unsigned char *prop = NULL;
469
470 memset(&r, 0, sizeof(r));
471 memset(&usb_data, 0, sizeof(usb_data));
472
473 ret = of_address_to_resource(np, 0, &r[0]);
474 if (ret)
475 goto err;
476
477 of_irq_to_resource(np, 0, &r[1]);
478
479 usb_dev_mph =
480 platform_device_register_simple("fsl-ehci", i, r, 2);
481 if (IS_ERR(usb_dev_mph)) {
482 ret = PTR_ERR(usb_dev_mph);
483 goto err;
484 }
485
486 usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
487 usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
488
489 usb_data.operating_mode = FSL_USB2_MPH_HOST;
490
491 prop = of_get_property(np, "port0", NULL);
492 if (prop)
493 usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
494
495 prop = of_get_property(np, "port1", NULL);
496 if (prop)
497 usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
498
499 prop = of_get_property(np, "phy_type", NULL);
500 usb_data.phy_mode = determine_usb_phy(prop);
501
502 ret =
503 platform_device_add_data(usb_dev_mph, &usb_data,
504 sizeof(struct
505 fsl_usb2_platform_data));
506 if (ret)
507 goto unreg_mph;
508 i++;
509 }
510
511 for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
512 struct resource r[2];
513 struct fsl_usb2_platform_data usb_data;
514 const unsigned char *prop = NULL;
515
516 memset(&r, 0, sizeof(r));
517 memset(&usb_data, 0, sizeof(usb_data));
518
519 ret = of_address_to_resource(np, 0, &r[0]);
520 if (ret)
521 goto unreg_mph;
522
523 of_irq_to_resource(np, 0, &r[1]);
524
525 prop = of_get_property(np, "dr_mode", NULL);
526
527 if (!prop || !strcmp(prop, "host")) {
528 usb_data.operating_mode = FSL_USB2_DR_HOST;
529 usb_dev_dr_host = platform_device_register_simple(
530 "fsl-ehci", i, r, 2);
531 if (IS_ERR(usb_dev_dr_host)) {
532 ret = PTR_ERR(usb_dev_dr_host);
533 goto err;
534 }
535 } else if (prop && !strcmp(prop, "peripheral")) {
536 usb_data.operating_mode = FSL_USB2_DR_DEVICE;
537 usb_dev_dr_client = platform_device_register_simple(
538 "fsl-usb2-udc", i, r, 2);
539 if (IS_ERR(usb_dev_dr_client)) {
540 ret = PTR_ERR(usb_dev_dr_client);
541 goto err;
542 }
543 } else if (prop && !strcmp(prop, "otg")) {
544 usb_data.operating_mode = FSL_USB2_DR_OTG;
545 usb_dev_dr_host = platform_device_register_simple(
546 "fsl-ehci", i, r, 2);
547 if (IS_ERR(usb_dev_dr_host)) {
548 ret = PTR_ERR(usb_dev_dr_host);
549 goto err;
550 }
551 usb_dev_dr_client = platform_device_register_simple(
552 "fsl-usb2-udc", i, r, 2);
553 if (IS_ERR(usb_dev_dr_client)) {
554 ret = PTR_ERR(usb_dev_dr_client);
555 goto err;
556 }
557 } else {
558 ret = -EINVAL;
559 goto err;
560 }
561
562 prop = of_get_property(np, "phy_type", NULL);
563 usb_data.phy_mode = determine_usb_phy(prop);
564
565 if (usb_dev_dr_host) {
566 usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
567 usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
568 dev.coherent_dma_mask;
569 if ((ret = platform_device_add_data(usb_dev_dr_host,
570 &usb_data, sizeof(struct
571 fsl_usb2_platform_data))))
572 goto unreg_dr;
573 }
574 if (usb_dev_dr_client) {
575 usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
576 usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
577 dev.coherent_dma_mask;
578 if ((ret = platform_device_add_data(usb_dev_dr_client,
579 &usb_data, sizeof(struct
580 fsl_usb2_platform_data))))
581 goto unreg_dr;
582 }
583 i++;
584 }
585 return 0;
586
587unreg_dr:
588 if (usb_dev_dr_host)
589 platform_device_unregister(usb_dev_dr_host);
590 if (usb_dev_dr_client)
591 platform_device_unregister(usb_dev_dr_client);
592unreg_mph:
593 if (usb_dev_mph)
594 platform_device_unregister(usb_dev_mph);
595err:
596 return ret;
597}
598
599arch_initcall(fsl_usb_of_init);
600
601static int __init of_fsl_spi_probe(char *type, char *compatible, u32 sysclk,
602 struct spi_board_info *board_infos,
603 unsigned int num_board_infos,
604 void (*activate_cs)(u8 cs, u8 polarity),
605 void (*deactivate_cs)(u8 cs, u8 polarity))
606{
607 struct device_node *np;
608 unsigned int i = 0;
609
610 for_each_compatible_node(np, type, compatible) {
611 int ret;
612 unsigned int j;
613 const void *prop;
614 struct resource res[2];
615 struct platform_device *pdev;
616 struct fsl_spi_platform_data pdata = {
617 .activate_cs = activate_cs,
618 .deactivate_cs = deactivate_cs,
619 };
620
621 memset(res, 0, sizeof(res));
622
623 pdata.sysclk = sysclk;
624
625 prop = of_get_property(np, "reg", NULL);
626 if (!prop)
627 goto err;
628 pdata.bus_num = *(u32 *)prop;
629
630 prop = of_get_property(np, "cell-index", NULL);
631 if (prop)
632 i = *(u32 *)prop;
633
634 prop = of_get_property(np, "mode", NULL);
635 if (prop && !strcmp(prop, "cpu-qe"))
636 pdata.qe_mode = 1;
637
638 for (j = 0; j < num_board_infos; j++) {
639 if (board_infos[j].bus_num == pdata.bus_num)
640 pdata.max_chipselect++;
641 }
642
643 if (!pdata.max_chipselect)
644 continue;
645
646 ret = of_address_to_resource(np, 0, &res[0]);
647 if (ret)
648 goto err;
649
650 ret = of_irq_to_resource(np, 0, &res[1]);
651 if (ret == NO_IRQ)
652 goto err;
653
654 pdev = platform_device_alloc("mpc83xx_spi", i);
655 if (!pdev)
656 goto err;
657
658 ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
659 if (ret)
660 goto unreg;
661
662 ret = platform_device_add_resources(pdev, res,
663 ARRAY_SIZE(res));
664 if (ret)
665 goto unreg;
666
667 ret = platform_device_add(pdev);
668 if (ret)
669 goto unreg;
670
671 goto next;
672unreg:
673 platform_device_del(pdev);
674err:
675 pr_err("%s: registration failed\n", np->full_name);
676next:
677 i++;
678 }
679
680 return i;
681}
682
683int __init fsl_spi_init(struct spi_board_info *board_infos,
684 unsigned int num_board_infos,
685 void (*activate_cs)(u8 cs, u8 polarity),
686 void (*deactivate_cs)(u8 cs, u8 polarity))
687{
688 u32 sysclk = -1;
689 int ret;
690
691#ifdef CONFIG_QUICC_ENGINE
692
693 sysclk = get_brgfreq();
694#endif
695 if (sysclk == -1) {
696 sysclk = fsl_get_sys_freq();
697 if (sysclk == -1)
698 return -ENODEV;
699 }
700
701 ret = of_fsl_spi_probe(NULL, "fsl,spi", sysclk, board_infos,
702 num_board_infos, activate_cs, deactivate_cs);
703 if (!ret)
704 of_fsl_spi_probe("spi", "fsl_spi", sysclk, board_infos,
705 num_board_infos, activate_cs, deactivate_cs);
706
707 return spi_register_board_info(board_infos, num_board_infos);
708}
709
710#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
711static __be32 __iomem *rstcr;
712
713static int __init setup_rstcr(void)
714{
715 struct device_node *np;
716 np = of_find_node_by_name(NULL, "global-utilities");
717 if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
718 const u32 *prop = of_get_property(np, "reg", NULL);
719 if (prop) {
720
721
722
723 rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
724 if (!rstcr)
725 printk (KERN_EMERG "Error: reset control "
726 "register not mapped!\n");
727 }
728 } else
729 printk (KERN_INFO "rstcr compatible register does not exist!\n");
730 if (np)
731 of_node_put(np);
732 return 0;
733}
734
735arch_initcall(setup_rstcr);
736
737void fsl_rstcr_restart(char *cmd)
738{
739 local_irq_disable();
740 if (rstcr)
741
742 out_be32(rstcr, 0x2);
743
744 while (1) ;
745}
746#endif
747
748#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
749struct platform_diu_data_ops diu_ops;
750EXPORT_SYMBOL(diu_ops);
751#endif
752
