linux/arch/powerpc/platforms/pseries/eeh_cache.c
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   1/*
   2 * eeh_cache.c
   3 * PCI address cache; allows the lookup of PCI devices based on I/O address
   4 *
   5 * Copyright IBM Corporation 2004
   6 * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21 */
  22
  23#include <linux/list.h>
  24#include <linux/pci.h>
  25#include <linux/rbtree.h>
  26#include <linux/spinlock.h>
  27#include <asm/atomic.h>
  28#include <asm/pci-bridge.h>
  29#include <asm/ppc-pci.h>
  30
  31
  32/**
  33 * The pci address cache subsystem.  This subsystem places
  34 * PCI device address resources into a red-black tree, sorted
  35 * according to the address range, so that given only an i/o
  36 * address, the corresponding PCI device can be **quickly**
  37 * found. It is safe to perform an address lookup in an interrupt
  38 * context; this ability is an important feature.
  39 *
  40 * Currently, the only customer of this code is the EEH subsystem;
  41 * thus, this code has been somewhat tailored to suit EEH better.
  42 * In particular, the cache does *not* hold the addresses of devices
  43 * for which EEH is not enabled.
  44 *
  45 * (Implementation Note: The RB tree seems to be better/faster
  46 * than any hash algo I could think of for this problem, even
  47 * with the penalty of slow pointer chases for d-cache misses).
  48 */
  49struct pci_io_addr_range
  50{
  51        struct rb_node rb_node;
  52        unsigned long addr_lo;
  53        unsigned long addr_hi;
  54        struct pci_dev *pcidev;
  55        unsigned int flags;
  56};
  57
  58static struct pci_io_addr_cache
  59{
  60        struct rb_root rb_root;
  61        spinlock_t piar_lock;
  62} pci_io_addr_cache_root;
  63
  64static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
  65{
  66        struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
  67
  68        while (n) {
  69                struct pci_io_addr_range *piar;
  70                piar = rb_entry(n, struct pci_io_addr_range, rb_node);
  71
  72                if (addr < piar->addr_lo) {
  73                        n = n->rb_left;
  74                } else {
  75                        if (addr > piar->addr_hi) {
  76                                n = n->rb_right;
  77                        } else {
  78                                pci_dev_get(piar->pcidev);
  79                                return piar->pcidev;
  80                        }
  81                }
  82        }
  83
  84        return NULL;
  85}
  86
  87/**
  88 * pci_get_device_by_addr - Get device, given only address
  89 * @addr: mmio (PIO) phys address or i/o port number
  90 *
  91 * Given an mmio phys address, or a port number, find a pci device
  92 * that implements this address.  Be sure to pci_dev_put the device
  93 * when finished.  I/O port numbers are assumed to be offset
  94 * from zero (that is, they do *not* have pci_io_addr added in).
  95 * It is safe to call this function within an interrupt.
  96 */
  97struct pci_dev *pci_get_device_by_addr(unsigned long addr)
  98{
  99        struct pci_dev *dev;
 100        unsigned long flags;
 101
 102        spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
 103        dev = __pci_get_device_by_addr(addr);
 104        spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
 105        return dev;
 106}
 107
 108#ifdef DEBUG
 109/*
 110 * Handy-dandy debug print routine, does nothing more
 111 * than print out the contents of our addr cache.
 112 */
 113static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
 114{
 115        struct rb_node *n;
 116        int cnt = 0;
 117
 118        n = rb_first(&cache->rb_root);
 119        while (n) {
 120                struct pci_io_addr_range *piar;
 121                piar = rb_entry(n, struct pci_io_addr_range, rb_node);
 122                printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
 123                       (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
 124                       piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
 125                cnt++;
 126                n = rb_next(n);
 127        }
 128}
 129#endif
 130
 131/* Insert address range into the rb tree. */
 132static struct pci_io_addr_range *
 133pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
 134                      unsigned long ahi, unsigned int flags)
 135{
 136        struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
 137        struct rb_node *parent = NULL;
 138        struct pci_io_addr_range *piar;
 139
 140        /* Walk tree, find a place to insert into tree */
 141        while (*p) {
 142                parent = *p;
 143                piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
 144                if (ahi < piar->addr_lo) {
 145                        p = &parent->rb_left;
 146                } else if (alo > piar->addr_hi) {
 147                        p = &parent->rb_right;
 148                } else {
 149                        if (dev != piar->pcidev ||
 150                            alo != piar->addr_lo || ahi != piar->addr_hi) {
 151                                printk(KERN_WARNING "PIAR: overlapping address range\n");
 152                        }
 153                        return piar;
 154                }
 155        }
 156        piar = kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
 157        if (!piar)
 158                return NULL;
 159
 160        pci_dev_get(dev);
 161        piar->addr_lo = alo;
 162        piar->addr_hi = ahi;
 163        piar->pcidev = dev;
 164        piar->flags = flags;
 165
 166#ifdef DEBUG
 167        printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
 168                          alo, ahi, pci_name (dev));
 169#endif
 170
 171        rb_link_node(&piar->rb_node, parent, p);
 172        rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
 173
 174        return piar;
 175}
 176
 177static void __pci_addr_cache_insert_device(struct pci_dev *dev)
 178{
 179        struct device_node *dn;
 180        struct pci_dn *pdn;
 181        int i;
 182
 183        dn = pci_device_to_OF_node(dev);
 184        if (!dn) {
 185                printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
 186                return;
 187        }
 188
 189        /* Skip any devices for which EEH is not enabled. */
 190        pdn = PCI_DN(dn);
 191        if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
 192            pdn->eeh_mode & EEH_MODE_NOCHECK) {
 193#ifdef DEBUG
 194                printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
 195                       pci_name(dev), pdn->node->full_name);
 196#endif
 197                return;
 198        }
 199
 200        /* Walk resources on this device, poke them into the tree */
 201        for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
 202                unsigned long start = pci_resource_start(dev,i);
 203                unsigned long end = pci_resource_end(dev,i);
 204                unsigned int flags = pci_resource_flags(dev,i);
 205
 206                /* We are interested only bus addresses, not dma or other stuff */
 207                if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
 208                        continue;
 209                if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
 210                         continue;
 211                pci_addr_cache_insert(dev, start, end, flags);
 212        }
 213}
 214
 215/**
 216 * pci_addr_cache_insert_device - Add a device to the address cache
 217 * @dev: PCI device whose I/O addresses we are interested in.
 218 *
 219 * In order to support the fast lookup of devices based on addresses,
 220 * we maintain a cache of devices that can be quickly searched.
 221 * This routine adds a device to that cache.
 222 */
 223void pci_addr_cache_insert_device(struct pci_dev *dev)
 224{
 225        unsigned long flags;
 226
 227        /* Ignore PCI bridges */
 228        if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
 229                return;
 230
 231        spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
 232        __pci_addr_cache_insert_device(dev);
 233        spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
 234}
 235
 236static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
 237{
 238        struct rb_node *n;
 239
 240restart:
 241        n = rb_first(&pci_io_addr_cache_root.rb_root);
 242        while (n) {
 243                struct pci_io_addr_range *piar;
 244                piar = rb_entry(n, struct pci_io_addr_range, rb_node);
 245
 246                if (piar->pcidev == dev) {
 247                        rb_erase(n, &pci_io_addr_cache_root.rb_root);
 248                        pci_dev_put(piar->pcidev);
 249                        kfree(piar);
 250                        goto restart;
 251                }
 252                n = rb_next(n);
 253        }
 254}
 255
 256/**
 257 * pci_addr_cache_remove_device - remove pci device from addr cache
 258 * @dev: device to remove
 259 *
 260 * Remove a device from the addr-cache tree.
 261 * This is potentially expensive, since it will walk
 262 * the tree multiple times (once per resource).
 263 * But so what; device removal doesn't need to be that fast.
 264 */
 265void pci_addr_cache_remove_device(struct pci_dev *dev)
 266{
 267        unsigned long flags;
 268
 269        spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
 270        __pci_addr_cache_remove_device(dev);
 271        spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
 272}
 273
 274/**
 275 * pci_addr_cache_build - Build a cache of I/O addresses
 276 *
 277 * Build a cache of pci i/o addresses.  This cache will be used to
 278 * find the pci device that corresponds to a given address.
 279 * This routine scans all pci busses to build the cache.
 280 * Must be run late in boot process, after the pci controllers
 281 * have been scanned for devices (after all device resources are known).
 282 */
 283void __init pci_addr_cache_build(void)
 284{
 285        struct device_node *dn;
 286        struct pci_dev *dev = NULL;
 287
 288        spin_lock_init(&pci_io_addr_cache_root.piar_lock);
 289
 290        while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
 291
 292                pci_addr_cache_insert_device(dev);
 293
 294                dn = pci_device_to_OF_node(dev);
 295                if (!dn)
 296                        continue;
 297                pci_dev_get(dev);  /* matching put is in eeh_remove_device() */
 298                PCI_DN(dn)->pcidev = dev;
 299
 300                eeh_sysfs_add_device(dev);
 301        }
 302
 303#ifdef DEBUG
 304        /* Verify tree built up above, echo back the list of addrs. */
 305        pci_addr_cache_print(&pci_io_addr_cache_root);
 306#endif
 307}
 308
 309
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