LXR linux/arch/powerpc/include/asm/pgtable-ppc64.h

   1#ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
   2#define _ASM_POWERPC_PGTABLE_PPC64_H_
   3/*
   4 * This file contains the functions and defines necessary to modify and use
   5 * the ppc64 hashed page table.
   6 */
   7
   8#ifndef __ASSEMBLY__
   9#include <linux/stddef.h>
  10#include <asm/tlbflush.h>
  11#endif /* __ASSEMBLY__ */
  12
  13#ifdef CONFIG_PPC_64K_PAGES
  14#include <asm/pgtable-64k.h>
  15#else
  16#include <asm/pgtable-4k.h>
  17#endif
  18
  19#define FIRST_USER_ADDRESS      0
  20
  21/*
  22 * Size of EA range mapped by our pagetables.
  23 */
  24#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
  25                            PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
  26#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
  27
  28#if TASK_SIZE_USER64 > PGTABLE_RANGE
  29#error TASK_SIZE_USER64 exceeds pagetable range
  30#endif
  31
  32#if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
  33#error TASK_SIZE_USER64 exceeds user VSID range
  34#endif
  35
  36
  37/*
  38 * Define the address range of the vmalloc VM area.
  39 */
  40#define VMALLOC_START ASM_CONST(0xD000000000000000)
  41#define VMALLOC_SIZE  (PGTABLE_RANGE >> 1)
  42#define VMALLOC_END   (VMALLOC_START + VMALLOC_SIZE)
  43
  44/*
  45 * Define the address ranges for MMIO and IO space :
  46 *
  47 *  ISA_IO_BASE = VMALLOC_END, 64K reserved area
  48 *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
  49 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
  50 */
  51#define FULL_IO_SIZE    0x80000000ul
  52#define  ISA_IO_BASE    (VMALLOC_END)
  53#define  ISA_IO_END     (VMALLOC_END + 0x10000ul)
  54#define  PHB_IO_BASE    (ISA_IO_END)
  55#define  PHB_IO_END     (VMALLOC_END + FULL_IO_SIZE)
  56#define IOREMAP_BASE    (PHB_IO_END)
  57#define IOREMAP_END     (VMALLOC_START + PGTABLE_RANGE)
  58
  59/*
  60 * Region IDs
  61 */
  62#define REGION_SHIFT            60UL
  63#define REGION_MASK             (0xfUL << REGION_SHIFT)
  64#define REGION_ID(ea)           (((unsigned long)(ea)) >> REGION_SHIFT)
  65
  66#define VMALLOC_REGION_ID       (REGION_ID(VMALLOC_START))
  67#define KERNEL_REGION_ID        (REGION_ID(PAGE_OFFSET))
  68#define VMEMMAP_REGION_ID       (0xfUL)
  69#define USER_REGION_ID          (0UL)
  70
  71/*
  72 * Defines the address of the vmemap area, in its own region
  73 */
  74#define VMEMMAP_BASE            (VMEMMAP_REGION_ID << REGION_SHIFT)
  75#define vmemmap                 ((struct page *)VMEMMAP_BASE)
  76
  77
  78/*
  79 * Common bits in a linux-style PTE.  These match the bits in the
  80 * (hardware-defined) PowerPC PTE as closely as possible. Additional
  81 * bits may be defined in pgtable-*.h
  82 */
  83#define _PAGE_PRESENT   0x0001 /* software: pte contains a translation */
  84#define _PAGE_USER      0x0002 /* matches one of the PP bits */
  85#define _PAGE_FILE      0x0002 /* (!present only) software: pte holds file offset */
  86#define _PAGE_EXEC      0x0004 /* No execute on POWER4 and newer (we invert) */
  87#define _PAGE_GUARDED   0x0008
  88#define _PAGE_COHERENT  0x0010 /* M: enforce memory coherence (SMP systems) */
  89#define _PAGE_NO_CACHE  0x0020 /* I: cache inhibit */
  90#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
  91#define _PAGE_DIRTY     0x0080 /* C: page changed */
  92#define _PAGE_ACCESSED  0x0100 /* R: page referenced */
  93#define _PAGE_RW        0x0200 /* software: user write access allowed */
  94#define _PAGE_BUSY      0x0800 /* software: PTE & hash are busy */
  95
  96/* Strong Access Ordering */
  97#define _PAGE_SAO       (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
  98
  99#define _PAGE_BASE      (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
 100
 101#define _PAGE_WRENABLE  (_PAGE_RW | _PAGE_DIRTY)
 102
 103/* __pgprot defined in arch/powerpc/incliude/asm/page.h */
 104#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
 105
 106#define PAGE_SHARED     __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
 107#define PAGE_SHARED_X   __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
 108#define PAGE_COPY       __pgprot(_PAGE_BASE | _PAGE_USER)
 109#define PAGE_COPY_X     __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 110#define PAGE_READONLY   __pgprot(_PAGE_BASE | _PAGE_USER)
 111#define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
 112#define PAGE_KERNEL     __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
 113#define PAGE_KERNEL_CI  __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
 114                               _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
 115#define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
 116
 117#define PAGE_AGP        __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
 118#define HAVE_PAGE_AGP
 119
 120#define PAGE_PROT_BITS  (_PAGE_GUARDED | _PAGE_COHERENT | \
 121                         _PAGE_NO_CACHE | _PAGE_WRITETHRU |             \
 122                         _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER |         \
 123                         _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
 124/* PTEIDX nibble */
 125#define _PTEIDX_SECONDARY       0x8
 126#define _PTEIDX_GROUP_IX        0x7
 127
 128
 129/*
 130 * POWER4 and newer have per page execute protection, older chips can only
 131 * do this on a segment (256MB) basis.
 132 *
 133 * Also, write permissions imply read permissions.
 134 * This is the closest we can get..
 135 *
 136 * Note due to the way vm flags are laid out, the bits are XWR
 137 */
 138#define __P000  PAGE_NONE
 139#define __P001  PAGE_READONLY
 140#define __P010  PAGE_COPY
 141#define __P011  PAGE_COPY
 142#define __P100  PAGE_READONLY_X
 143#define __P101  PAGE_READONLY_X
 144#define __P110  PAGE_COPY_X
 145#define __P111  PAGE_COPY_X
 146
 147#define __S000  PAGE_NONE
 148#define __S001  PAGE_READONLY
 149#define __S010  PAGE_SHARED
 150#define __S011  PAGE_SHARED
 151#define __S100  PAGE_READONLY_X
 152#define __S101  PAGE_READONLY_X
 153#define __S110  PAGE_SHARED_X
 154#define __S111  PAGE_SHARED_X
 155
 156#ifdef CONFIG_PPC_MM_SLICES
 157#define HAVE_ARCH_UNMAPPED_AREA
 158#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
 159#endif /* CONFIG_PPC_MM_SLICES */
 160
 161#ifndef __ASSEMBLY__
 162
 163/*
 164 * Conversion functions: convert a page and protection to a page entry,
 165 * and a page entry and page directory to the page they refer to.
 166 *
 167 * mk_pte takes a (struct page *) as input
 168 */
 169#define mk_pte(page, pgprot)    pfn_pte(page_to_pfn(page), (pgprot))
 170
 171static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
 172{
 173        pte_t pte;
 174
 175
 176        pte_val(pte) = (pfn << PTE_RPN_SHIFT) | pgprot_val(pgprot);
 177        return pte;
 178}
 179
 180#define pte_modify(_pte, newprot) \
 181  (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
 182
 183#define pte_none(pte)           ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
 184#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
 185
 186/* pte_clear moved to later in this file */
 187
 188#define pte_pfn(x)              ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
 189#define pte_page(x)             pfn_to_page(pte_pfn(x))
 190
 191#define PMD_BAD_BITS            (PTE_TABLE_SIZE-1)
 192#define PUD_BAD_BITS            (PMD_TABLE_SIZE-1)
 193
 194#define pmd_set(pmdp, pmdval)   (pmd_val(*(pmdp)) = (pmdval))
 195#define pmd_none(pmd)           (!pmd_val(pmd))
 196#define pmd_bad(pmd)            (!is_kernel_addr(pmd_val(pmd)) \
 197                                 || (pmd_val(pmd) & PMD_BAD_BITS))
 198#define pmd_present(pmd)        (pmd_val(pmd) != 0)
 199#define pmd_clear(pmdp)         (pmd_val(*(pmdp)) = 0)
 200#define pmd_page_vaddr(pmd)     (pmd_val(pmd) & ~PMD_MASKED_BITS)
 201#define pmd_page(pmd)           virt_to_page(pmd_page_vaddr(pmd))
 202
 203#define pud_set(pudp, pudval)   (pud_val(*(pudp)) = (pudval))
 204#define pud_none(pud)           (!pud_val(pud))
 205#define pud_bad(pud)            (!is_kernel_addr(pud_val(pud)) \
 206                                 || (pud_val(pud) & PUD_BAD_BITS))
 207#define pud_present(pud)        (pud_val(pud) != 0)
 208#define pud_clear(pudp)         (pud_val(*(pudp)) = 0)
 209#define pud_page_vaddr(pud)     (pud_val(pud) & ~PUD_MASKED_BITS)
 210#define pud_page(pud)           virt_to_page(pud_page_vaddr(pud))
 211
 212#define pgd_set(pgdp, pudp)     ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
 213
 214/*
 215 * Find an entry in a page-table-directory.  We combine the address region
 216 * (the high order N bits) and the pgd portion of the address.
 217 */
 218/* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
 219#define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
 220
 221#define pgd_offset(mm, address)  ((mm)->pgd + pgd_index(address))
 222
 223#define pmd_offset(pudp,addr) \
 224  (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
 225
 226#define pte_offset_kernel(dir,addr) \
 227  (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
 228
 229#define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
 230#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 231#define pte_unmap(pte)                  do { } while(0)
 232#define pte_unmap_nested(pte)           do { } while(0)
 233
 234/* to find an entry in a kernel page-table-directory */
 235/* This now only contains the vmalloc pages */
 236#define pgd_offset_k(address) pgd_offset(&init_mm, address)
 237
 238/*
 239 * The following only work if pte_present() is true.
 240 * Undefined behaviour if not..
 241 */
 242static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW;}
 243static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY;}
 244static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED;}
 245static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE;}
 246static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
 247
 248static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
 249static inline void pte_cache(pte_t pte)   { pte_val(pte) &= ~_PAGE_NO_CACHE; }
 250
 251static inline pte_t pte_wrprotect(pte_t pte) {
 252        pte_val(pte) &= ~(_PAGE_RW); return pte; }
 253static inline pte_t pte_mkclean(pte_t pte) {
 254        pte_val(pte) &= ~(_PAGE_DIRTY); return pte; }
 255static inline pte_t pte_mkold(pte_t pte) {
 256        pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
 257static inline pte_t pte_mkwrite(pte_t pte) {
 258        pte_val(pte) |= _PAGE_RW; return pte; }
 259static inline pte_t pte_mkdirty(pte_t pte) {
 260        pte_val(pte) |= _PAGE_DIRTY; return pte; }
 261static inline pte_t pte_mkyoung(pte_t pte) {
 262        pte_val(pte) |= _PAGE_ACCESSED; return pte; }
 263static inline pte_t pte_mkhuge(pte_t pte) {
 264        return pte; }
 265static inline pte_t pte_mkspecial(pte_t pte) {
 266        pte_val(pte) |= _PAGE_SPECIAL; return pte; }
 267static inline pgprot_t pte_pgprot(pte_t pte)
 268{
 269        return __pgprot(pte_val(pte) & PAGE_PROT_BITS);
 270}
 271
 272/* Atomic PTE updates */
 273static inline unsigned long pte_update(struct mm_struct *mm,
 274                                       unsigned long addr,
 275                                       pte_t *ptep, unsigned long clr,
 276                                       int huge)
 277{
 278        unsigned long old, tmp;
 279
 280        __asm__ __volatile__(
 281        "1:     ldarx   %0,0,%3         # pte_update\n\
 282        andi.   %1,%0,%6\n\
 283        bne-    1b \n\
 284        andc    %1,%0,%4 \n\
 285        stdcx.  %1,0,%3 \n\
 286        bne-    1b"
 287        : "=&r" (old), "=&r" (tmp), "=m" (*ptep)
 288        : "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY)
 289        : "cc" );
 290
 291        if (old & _PAGE_HASHPTE)
 292                hpte_need_flush(mm, addr, ptep, old, huge);
 293        return old;
 294}
 295
 296static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 297                                              unsigned long addr, pte_t *ptep)
 298{
 299        unsigned long old;
 300
 301        if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
 302                return 0;
 303        old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0);
 304        return (old & _PAGE_ACCESSED) != 0;
 305}
 306#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 307#define ptep_test_and_clear_young(__vma, __addr, __ptep)                   \
 308({                                                                         \
 309        int __r;                                                           \
 310        __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
 311        __r;                                                               \
 312})
 313
 314#define __HAVE_ARCH_PTEP_SET_WRPROTECT
 315static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
 316                                      pte_t *ptep)
 317{
 318        unsigned long old;
 319
 320        if ((pte_val(*ptep) & _PAGE_RW) == 0)
 321                return;
 322        old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
 323}
 324
 325static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
 326                                           unsigned long addr, pte_t *ptep)
 327{
 328        unsigned long old;
 329
 330        if ((pte_val(*ptep) & _PAGE_RW) == 0)
 331                return;
 332        old = pte_update(mm, addr, ptep, _PAGE_RW, 1);
 333}
 334
 335/*
 336 * We currently remove entries from the hashtable regardless of whether
 337 * the entry was young or dirty. The generic routines only flush if the
 338 * entry was young or dirty which is not good enough.
 339 *
 340 * We should be more intelligent about this but for the moment we override
 341 * these functions and force a tlb flush unconditionally
 342 */
 343#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 344#define ptep_clear_flush_young(__vma, __address, __ptep)                \
 345({                                                                      \
 346        int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
 347                                                  __ptep);              \
 348        __young;                                                        \
 349})
 350
 351#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 352static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 353                                       unsigned long addr, pte_t *ptep)
 354{
 355        unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0);
 356        return __pte(old);
 357}
 358
 359static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 360                             pte_t * ptep)
 361{
 362        pte_update(mm, addr, ptep, ~0UL, 0);
 363}
 364
 365/*
 366 * set_pte stores a linux PTE into the linux page table.
 367 */
 368static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 369                              pte_t *ptep, pte_t pte)
 370{
 371        if (pte_present(*ptep))
 372                pte_clear(mm, addr, ptep);
 373        pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
 374        *ptep = pte;
 375}
 376
 377/* Set the dirty and/or accessed bits atomically in a linux PTE, this
 378 * function doesn't need to flush the hash entry
 379 */
 380#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 381static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry, int dirty)
 382{
 383        unsigned long bits = pte_val(entry) &
 384                (_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
 385        unsigned long old, tmp;
 386
 387        __asm__ __volatile__(
 388        "1:     ldarx   %0,0,%4\n\
 389                andi.   %1,%0,%6\n\
 390                bne-    1b \n\
 391                or      %0,%3,%0\n\
 392                stdcx.  %0,0,%4\n\
 393                bne-    1b"
 394        :"=&r" (old), "=&r" (tmp), "=m" (*ptep)
 395        :"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
 396        :"cc");
 397}
 398#define  ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
 399({                                                                         \
 400        int __changed = !pte_same(*(__ptep), __entry);                     \
 401        if (__changed) {                                                   \
 402                __ptep_set_access_flags(__ptep, __entry, __dirty);         \
 403                flush_tlb_page_nohash(__vma, __address);                   \
 404        }                                                                  \
 405        __changed;                                                         \
 406})
 407
 408/*
 409 * Macro to mark a page protection value as "uncacheable".
 410 */
 411#define pgprot_noncached(prot)  (__pgprot(pgprot_val(prot) | _PAGE_NO_CACHE | _PAGE_GUARDED))
 412
 413struct file;
 414extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
 415                                     unsigned long size, pgprot_t vma_prot);
 416#define __HAVE_PHYS_MEM_ACCESS_PROT
 417
 418#define __HAVE_ARCH_PTE_SAME
 419#define pte_same(A,B)   (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
 420
 421#define pte_ERROR(e) \
 422        printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
 423#define pmd_ERROR(e) \
 424        printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
 425#define pgd_ERROR(e) \
 426        printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
 427
 428/* Encode and de-code a swap entry */
 429#define __swp_type(entry)       (((entry).val >> 1) & 0x3f)
 430#define __swp_offset(entry)     ((entry).val >> 8)
 431#define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
 432#define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
 433#define __swp_entry_to_pte(x)   ((pte_t) { (x).val << PTE_RPN_SHIFT })
 434#define pte_to_pgoff(pte)       (pte_val(pte) >> PTE_RPN_SHIFT)
 435#define pgoff_to_pte(off)       ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
 436#define PTE_FILE_MAX_BITS       (BITS_PER_LONG - PTE_RPN_SHIFT)
 437
 438void pgtable_cache_init(void);
 439
 440/*
 441 * find_linux_pte returns the address of a linux pte for a given
 442 * effective address and directory.  If not found, it returns zero.
 443 */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
 444{
 445        pgd_t *pg;
 446        pud_t *pu;
 447        pmd_t *pm;
 448        pte_t *pt = NULL;
 449
 450        pg = pgdir + pgd_index(ea);
 451        if (!pgd_none(*pg)) {
 452                pu = pud_offset(pg, ea);
 453                if (!pud_none(*pu)) {
 454                        pm = pmd_offset(pu, ea);
 455                        if (pmd_present(*pm))
 456                                pt = pte_offset_kernel(pm, ea);
 457                }
 458        }
 459        return pt;
 460}
 461
 462pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long address);
 463
 464#endif /* __ASSEMBLY__ */
 465
 466#endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */
 467