linux/arch/mips/kernel/smp.c
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   1/*
   2 * This program is free software; you can redistribute it and/or
   3 * modify it under the terms of the GNU General Public License
   4 * as published by the Free Software Foundation; either version 2
   5 * of the License, or (at your option) any later version.
   6 *
   7 * This program is distributed in the hope that it will be useful,
   8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10 * GNU General Public License for more details.
  11 *
  12 * You should have received a copy of the GNU General Public License
  13 * along with this program; if not, write to the Free Software
  14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15 *
  16 * Copyright (C) 2000, 2001 Kanoj Sarcar
  17 * Copyright (C) 2000, 2001 Ralf Baechle
  18 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19 * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20 */
  21#include <linux/cache.h>
  22#include <linux/delay.h>
  23#include <linux/init.h>
  24#include <linux/interrupt.h>
  25#include <linux/spinlock.h>
  26#include <linux/threads.h>
  27#include <linux/module.h>
  28#include <linux/time.h>
  29#include <linux/timex.h>
  30#include <linux/sched.h>
  31#include <linux/cpumask.h>
  32#include <linux/cpu.h>
  33#include <linux/err.h>
  34
  35#include <asm/atomic.h>
  36#include <asm/cpu.h>
  37#include <asm/processor.h>
  38#include <asm/r4k-timer.h>
  39#include <asm/system.h>
  40#include <asm/mmu_context.h>
  41#include <asm/time.h>
  42
  43#ifdef CONFIG_MIPS_MT_SMTC
  44#include <asm/mipsmtregs.h>
  45#endif /* CONFIG_MIPS_MT_SMTC */
  46
  47cpumask_t phys_cpu_present_map;         /* Bitmask of available CPUs */
  48volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
  49cpumask_t cpu_online_map;               /* Bitmask of currently online CPUs */
  50int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  51int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  52
  53EXPORT_SYMBOL(phys_cpu_present_map);
  54EXPORT_SYMBOL(cpu_online_map);
  55
  56extern void cpu_idle(void);
  57
  58/* Number of TCs (or siblings in Intel speak) per CPU core */
  59int smp_num_siblings = 1;
  60EXPORT_SYMBOL(smp_num_siblings);
  61
  62/* representing the TCs (or siblings in Intel speak) of each logical CPU */
  63cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  64EXPORT_SYMBOL(cpu_sibling_map);
  65
  66/* representing cpus for which sibling maps can be computed */
  67static cpumask_t cpu_sibling_setup_map;
  68
  69static inline void set_cpu_sibling_map(int cpu)
  70{
  71        int i;
  72
  73        cpu_set(cpu, cpu_sibling_setup_map);
  74
  75        if (smp_num_siblings > 1) {
  76                for_each_cpu_mask(i, cpu_sibling_setup_map) {
  77                        if (cpu_data[cpu].core == cpu_data[i].core) {
  78                                cpu_set(i, cpu_sibling_map[cpu]);
  79                                cpu_set(cpu, cpu_sibling_map[i]);
  80                        }
  81                }
  82        } else
  83                cpu_set(cpu, cpu_sibling_map[cpu]);
  84}
  85
  86struct plat_smp_ops *mp_ops;
  87
  88__cpuinit void register_smp_ops(struct plat_smp_ops *ops)
  89{
  90        if (mp_ops)
  91                printk(KERN_WARNING "Overriding previously set SMP ops\n");
  92
  93        mp_ops = ops;
  94}
  95
  96/*
  97 * First C code run on the secondary CPUs after being started up by
  98 * the master.
  99 */
 100asmlinkage __cpuinit void start_secondary(void)
 101{
 102        unsigned int cpu;
 103
 104#ifdef CONFIG_MIPS_MT_SMTC
 105        /* Only do cpu_probe for first TC of CPU */
 106        if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
 107#endif /* CONFIG_MIPS_MT_SMTC */
 108        cpu_probe();
 109        cpu_report();
 110        per_cpu_trap_init();
 111        mips_clockevent_init();
 112        mp_ops->init_secondary();
 113
 114        /*
 115         * XXX parity protection should be folded in here when it's converted
 116         * to an option instead of something based on .cputype
 117         */
 118
 119        calibrate_delay();
 120        preempt_disable();
 121        cpu = smp_processor_id();
 122        cpu_data[cpu].udelay_val = loops_per_jiffy;
 123
 124        notify_cpu_starting(cpu);
 125
 126        mp_ops->smp_finish();
 127        set_cpu_sibling_map(cpu);
 128
 129        cpu_set(cpu, cpu_callin_map);
 130
 131        synchronise_count_slave();
 132
 133        cpu_idle();
 134}
 135
 136void arch_send_call_function_ipi(cpumask_t mask)
 137{
 138        mp_ops->send_ipi_mask(mask, SMP_CALL_FUNCTION);
 139}
 140
 141/*
 142 * We reuse the same vector for the single IPI
 143 */
 144void arch_send_call_function_single_ipi(int cpu)
 145{
 146        mp_ops->send_ipi_mask(cpumask_of_cpu(cpu), SMP_CALL_FUNCTION);
 147}
 148
 149/*
 150 * Call into both interrupt handlers, as we share the IPI for them
 151 */
 152void smp_call_function_interrupt(void)
 153{
 154        irq_enter();
 155        generic_smp_call_function_single_interrupt();
 156        generic_smp_call_function_interrupt();
 157        irq_exit();
 158}
 159
 160static void stop_this_cpu(void *dummy)
 161{
 162        /*
 163         * Remove this CPU:
 164         */
 165        cpu_clear(smp_processor_id(), cpu_online_map);
 166        for (;;) {
 167                if (cpu_wait)
 168                        (*cpu_wait)();          /* Wait if available. */
 169        }
 170}
 171
 172void smp_send_stop(void)
 173{
 174        smp_call_function(stop_this_cpu, NULL, 0);
 175}
 176
 177void __init smp_cpus_done(unsigned int max_cpus)
 178{
 179        mp_ops->cpus_done();
 180        synchronise_count_master();
 181}
 182
 183/* called from main before smp_init() */
 184void __init smp_prepare_cpus(unsigned int max_cpus)
 185{
 186        init_new_context(current, &init_mm);
 187        current_thread_info()->cpu = 0;
 188        mp_ops->prepare_cpus(max_cpus);
 189        set_cpu_sibling_map(0);
 190#ifndef CONFIG_HOTPLUG_CPU
 191        cpu_present_map = cpu_possible_map;
 192#endif
 193}
 194
 195/* preload SMP state for boot cpu */
 196void __devinit smp_prepare_boot_cpu(void)
 197{
 198        cpu_set(0, phys_cpu_present_map);
 199        cpu_set(0, cpu_online_map);
 200        cpu_set(0, cpu_callin_map);
 201}
 202
 203/*
 204 * Called once for each "cpu_possible(cpu)".  Needs to spin up the cpu
 205 * and keep control until "cpu_online(cpu)" is set.  Note: cpu is
 206 * physical, not logical.
 207 */
 208int __cpuinit __cpu_up(unsigned int cpu)
 209{
 210        struct task_struct *idle;
 211
 212        /*
 213         * Processor goes to start_secondary(), sets online flag
 214         * The following code is purely to make sure
 215         * Linux can schedule processes on this slave.
 216         */
 217        idle = fork_idle(cpu);
 218        if (IS_ERR(idle))
 219                panic(KERN_ERR "Fork failed for CPU %d", cpu);
 220
 221        mp_ops->boot_secondary(cpu, idle);
 222
 223        /*
 224         * Trust is futile.  We should really have timeouts ...
 225         */
 226        while (!cpu_isset(cpu, cpu_callin_map))
 227                udelay(100);
 228
 229        cpu_set(cpu, cpu_online_map);
 230
 231        return 0;
 232}
 233
 234/* Not really SMP stuff ... */
 235int setup_profiling_timer(unsigned int multiplier)
 236{
 237        return 0;
 238}
 239
 240static void flush_tlb_all_ipi(void *info)
 241{
 242        local_flush_tlb_all();
 243}
 244
 245void flush_tlb_all(void)
 246{
 247        on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 248}
 249
 250static void flush_tlb_mm_ipi(void *mm)
 251{
 252        local_flush_tlb_mm((struct mm_struct *)mm);
 253}
 254
 255/*
 256 * Special Variant of smp_call_function for use by TLB functions:
 257 *
 258 *  o No return value
 259 *  o collapses to normal function call on UP kernels
 260 *  o collapses to normal function call on systems with a single shared
 261 *    primary cache.
 262 *  o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
 263 */
 264static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 265{
 266#ifndef CONFIG_MIPS_MT_SMTC
 267        smp_call_function(func, info, 1);
 268#endif
 269}
 270
 271static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 272{
 273        preempt_disable();
 274
 275        smp_on_other_tlbs(func, info);
 276        func(info);
 277
 278        preempt_enable();
 279}
 280
 281/*
 282 * The following tlb flush calls are invoked when old translations are
 283 * being torn down, or pte attributes are changing. For single threaded
 284 * address spaces, a new context is obtained on the current cpu, and tlb
 285 * context on other cpus are invalidated to force a new context allocation
 286 * at switch_mm time, should the mm ever be used on other cpus. For
 287 * multithreaded address spaces, intercpu interrupts have to be sent.
 288 * Another case where intercpu interrupts are required is when the target
 289 * mm might be active on another cpu (eg debuggers doing the flushes on
 290 * behalf of debugees, kswapd stealing pages from another process etc).
 291 * Kanoj 07/00.
 292 */
 293
 294void flush_tlb_mm(struct mm_struct *mm)
 295{
 296        preempt_disable();
 297
 298        if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 299                smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 300        } else {
 301                cpumask_t mask = cpu_online_map;
 302                unsigned int cpu;
 303
 304                cpu_clear(smp_processor_id(), mask);
 305                for_each_cpu_mask(cpu, mask)
 306                        if (cpu_context(cpu, mm))
 307                                cpu_context(cpu, mm) = 0;
 308        }
 309        local_flush_tlb_mm(mm);
 310
 311        preempt_enable();
 312}
 313
 314struct flush_tlb_data {
 315        struct vm_area_struct *vma;
 316        unsigned long addr1;
 317        unsigned long addr2;
 318};
 319
 320static void flush_tlb_range_ipi(void *info)
 321{
 322        struct flush_tlb_data *fd = info;
 323
 324        local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 325}
 326
 327void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 328{
 329        struct mm_struct *mm = vma->vm_mm;
 330
 331        preempt_disable();
 332        if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 333                struct flush_tlb_data fd = {
 334                        .vma = vma,
 335                        .addr1 = start,
 336                        .addr2 = end,
 337                };
 338
 339                smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 340        } else {
 341                cpumask_t mask = cpu_online_map;
 342                unsigned int cpu;
 343
 344                cpu_clear(smp_processor_id(), mask);
 345                for_each_cpu_mask(cpu, mask)
 346                        if (cpu_context(cpu, mm))
 347                                cpu_context(cpu, mm) = 0;
 348        }
 349        local_flush_tlb_range(vma, start, end);
 350        preempt_enable();
 351}
 352
 353static void flush_tlb_kernel_range_ipi(void *info)
 354{
 355        struct flush_tlb_data *fd = info;
 356
 357        local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 358}
 359
 360void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 361{
 362        struct flush_tlb_data fd = {
 363                .addr1 = start,
 364                .addr2 = end,
 365        };
 366
 367        on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 368}
 369
 370static void flush_tlb_page_ipi(void *info)
 371{
 372        struct flush_tlb_data *fd = info;
 373
 374        local_flush_tlb_page(fd->vma, fd->addr1);
 375}
 376
 377void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 378{
 379        preempt_disable();
 380        if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 381                struct flush_tlb_data fd = {
 382                        .vma = vma,
 383                        .addr1 = page,
 384                };
 385
 386                smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 387        } else {
 388                cpumask_t mask = cpu_online_map;
 389                unsigned int cpu;
 390
 391                cpu_clear(smp_processor_id(), mask);
 392                for_each_cpu_mask(cpu, mask)
 393                        if (cpu_context(cpu, vma->vm_mm))
 394                                cpu_context(cpu, vma->vm_mm) = 0;
 395        }
 396        local_flush_tlb_page(vma, page);
 397        preempt_enable();
 398}
 399
 400static void flush_tlb_one_ipi(void *info)
 401{
 402        unsigned long vaddr = (unsigned long) info;
 403
 404        local_flush_tlb_one(vaddr);
 405}
 406
 407void flush_tlb_one(unsigned long vaddr)
 408{
 409        smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 410}
 411
 412EXPORT_SYMBOL(flush_tlb_page);
 413EXPORT_SYMBOL(flush_tlb_one);
 414
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