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23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/init.h>
27#include <linux/device.h>
28#include <linux/firmware.h>
29#include <sound/core.h>
30#include <sound/pcm.h>
31#include <sound/asoundef.h>
32#include <sound/info.h>
33#include <asm/io.h>
34#include <sound/vx_core.h>
35#include "vx_cmd.h"
36
37MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
38MODULE_DESCRIPTION("Common routines for Digigram VX drivers");
39MODULE_LICENSE("GPL");
40
41
42
43
44
45
46
47
48
49
50
51int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time)
52{
53 unsigned long end_time = jiffies + (time * HZ + 999) / 1000;
54#ifdef CONFIG_SND_DEBUG
55 static char *reg_names[VX_REG_MAX] = {
56 "ICR", "CVR", "ISR", "IVR", "RXH", "RXM", "RXL",
57 "DMA", "CDSP", "RFREQ", "RUER/V2", "DATA", "MEMIRQ",
58 "ACQ", "BIT0", "BIT1", "MIC0", "MIC1", "MIC2",
59 "MIC3", "INTCSR", "CNTRL", "GPIOC",
60 "LOFREQ", "HIFREQ", "CSUER", "RUER"
61 };
62#endif
63 do {
64 if ((snd_vx_inb(chip, reg) & mask) == bit)
65 return 0;
66
67 } while (time_after_eq(end_time, jiffies));
68 snd_printd(KERN_DEBUG "vx_check_reg_bit: timeout, reg=%s, mask=0x%x, val=0x%x\n", reg_names[reg], mask, snd_vx_inb(chip, reg));
69 return -EIO;
70}
71
72EXPORT_SYMBOL(snd_vx_check_reg_bit);
73
74
75
76
77
78
79
80
81
82static int vx_send_irq_dsp(struct vx_core *chip, int num)
83{
84 int nirq;
85
86
87 if (snd_vx_check_reg_bit(chip, VX_CVR, CVR_HC, 0, 200) < 0)
88 return -EIO;
89
90 nirq = num;
91 if (vx_has_new_dsp(chip))
92 nirq += VXP_IRQ_OFFSET;
93 vx_outb(chip, CVR, (nirq >> 1) | CVR_HC);
94 return 0;
95}
96
97
98
99
100
101
102
103static int vx_reset_chk(struct vx_core *chip)
104{
105
106 if (vx_send_irq_dsp(chip, IRQ_RESET_CHK) < 0)
107 return -EIO;
108
109 if (vx_check_isr(chip, ISR_CHK, 0, 200) < 0)
110 return -EIO;
111 return 0;
112}
113
114
115
116
117
118
119
120
121
122static int vx_transfer_end(struct vx_core *chip, int cmd)
123{
124 int err;
125
126 if ((err = vx_reset_chk(chip)) < 0)
127 return err;
128
129
130 if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
131 return err;
132
133
134 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
135 return err;
136
137
138 if ((err = vx_inb(chip, ISR)) & ISR_ERR) {
139 if ((err = vx_wait_for_rx_full(chip)) < 0) {
140 snd_printd(KERN_DEBUG "transfer_end: error in rx_full\n");
141 return err;
142 }
143 err = vx_inb(chip, RXH) << 16;
144 err |= vx_inb(chip, RXM) << 8;
145 err |= vx_inb(chip, RXL);
146 snd_printd(KERN_DEBUG "transfer_end: error = 0x%x\n", err);
147 return -(VX_ERR_MASK | err);
148 }
149 return 0;
150}
151
152
153
154
155
156
157
158
159
160static int vx_read_status(struct vx_core *chip, struct vx_rmh *rmh)
161{
162 int i, err, val, size;
163
164
165 if (rmh->DspStat == RMH_SSIZE_FIXED && rmh->LgStat == 0)
166 return 0;
167
168
169
170
171 err = vx_wait_for_rx_full(chip);
172 if (err < 0)
173 return err;
174
175
176 val = vx_inb(chip, RXH) << 16;
177 val |= vx_inb(chip, RXM) << 8;
178 val |= vx_inb(chip, RXL);
179
180
181 switch (rmh->DspStat) {
182 case RMH_SSIZE_ARG:
183 size = val & 0xff;
184 rmh->Stat[0] = val & 0xffff00;
185 rmh->LgStat = size + 1;
186 break;
187 case RMH_SSIZE_MASK:
188
189 rmh->Stat[0] = val;
190 size = 0;
191 while (val) {
192 if (val & 0x01)
193 size++;
194 val >>= 1;
195 }
196 rmh->LgStat = size + 1;
197 break;
198 default:
199
200 size = rmh->LgStat;
201 rmh->Stat[0] = val;
202 size--;
203 break;
204 }
205
206 if (size < 1)
207 return 0;
208 snd_assert(size <= SIZE_MAX_STATUS, return -EINVAL);
209
210 for (i = 1; i <= size; i++) {
211
212 err = vx_send_irq_dsp(chip, IRQ_MESS_WRITE_NEXT);
213 if (err < 0)
214 return err;
215
216 err = vx_wait_for_rx_full(chip);
217 if (err < 0)
218 return err;
219 rmh->Stat[i] = vx_inb(chip, RXH) << 16;
220 rmh->Stat[i] |= vx_inb(chip, RXM) << 8;
221 rmh->Stat[i] |= vx_inb(chip, RXL);
222 }
223
224 return vx_transfer_end(chip, IRQ_MESS_WRITE_END);
225}
226
227
228#define MASK_MORE_THAN_1_WORD_COMMAND 0x00008000
229#define MASK_1_WORD_COMMAND 0x00ff7fff
230
231
232
233
234
235
236
237
238
239
240int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh)
241{
242 int i, err;
243
244 if (chip->chip_status & VX_STAT_IS_STALE)
245 return -EBUSY;
246
247 if ((err = vx_reset_chk(chip)) < 0) {
248 snd_printd(KERN_DEBUG "vx_send_msg: vx_reset_chk error\n");
249 return err;
250 }
251
252#if 0
253 printk(KERN_DEBUG "rmh: cmd = 0x%06x, length = %d, stype = %d\n",
254 rmh->Cmd[0], rmh->LgCmd, rmh->DspStat);
255 if (rmh->LgCmd > 1) {
256 printk(KERN_DEBUG " ");
257 for (i = 1; i < rmh->LgCmd; i++)
258 printk("0x%06x ", rmh->Cmd[i]);
259 printk("\n");
260 }
261#endif
262
263 if (rmh->LgCmd > 1)
264 rmh->Cmd[0] |= MASK_MORE_THAN_1_WORD_COMMAND;
265 else
266 rmh->Cmd[0] &= MASK_1_WORD_COMMAND;
267
268
269 if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
270 snd_printd(KERN_DEBUG "vx_send_msg: wait tx empty error\n");
271 return err;
272 }
273
274
275 vx_outb(chip, TXH, (rmh->Cmd[0] >> 16) & 0xff);
276 vx_outb(chip, TXM, (rmh->Cmd[0] >> 8) & 0xff);
277 vx_outb(chip, TXL, rmh->Cmd[0] & 0xff);
278
279
280 if ((err = vx_send_irq_dsp(chip, IRQ_MESSAGE)) < 0) {
281 snd_printd(KERN_DEBUG "vx_send_msg: send IRQ_MESSAGE error\n");
282 return err;
283 }
284
285
286 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
287 return err;
288
289
290 if (vx_inb(chip, ISR) & ISR_ERR) {
291 if ((err = vx_wait_for_rx_full(chip)) < 0) {
292 snd_printd(KERN_DEBUG "vx_send_msg: rx_full read error\n");
293 return err;
294 }
295 err = vx_inb(chip, RXH) << 16;
296 err |= vx_inb(chip, RXM) << 8;
297 err |= vx_inb(chip, RXL);
298 snd_printd(KERN_DEBUG "msg got error = 0x%x at cmd[0]\n", err);
299 err = -(VX_ERR_MASK | err);
300 return err;
301 }
302
303
304 if (rmh->LgCmd > 1) {
305 for (i = 1; i < rmh->LgCmd; i++) {
306
307 if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
308 snd_printd(KERN_DEBUG "vx_send_msg: tx_ready error\n");
309 return err;
310 }
311
312
313 vx_outb(chip, TXH, (rmh->Cmd[i] >> 16) & 0xff);
314 vx_outb(chip, TXM, (rmh->Cmd[i] >> 8) & 0xff);
315 vx_outb(chip, TXL, rmh->Cmd[i] & 0xff);
316
317
318 if ((err = vx_send_irq_dsp(chip, IRQ_MESS_READ_NEXT)) < 0) {
319 snd_printd(KERN_DEBUG "vx_send_msg: IRQ_READ_NEXT error\n");
320 return err;
321 }
322 }
323
324 if ((err = vx_wait_isr_bit(chip, ISR_TX_READY)) < 0) {
325 snd_printd(KERN_DEBUG "vx_send_msg: TX_READY error\n");
326 return err;
327 }
328
329 err = vx_transfer_end(chip, IRQ_MESS_READ_END);
330 if (err < 0)
331 return err;
332 }
333
334 return vx_read_status(chip, rmh);
335}
336
337
338
339
340
341
342
343
344
345int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh)
346{
347 unsigned long flags;
348 int err;
349
350 spin_lock_irqsave(&chip->lock, flags);
351 err = vx_send_msg_nolock(chip, rmh);
352 spin_unlock_irqrestore(&chip->lock, flags);
353 return err;
354}
355
356
357
358
359
360
361
362
363
364
365
366
367
368int vx_send_rih_nolock(struct vx_core *chip, int cmd)
369{
370 int err;
371
372 if (chip->chip_status & VX_STAT_IS_STALE)
373 return -EBUSY;
374
375#if 0
376 printk(KERN_DEBUG "send_rih: cmd = 0x%x\n", cmd);
377#endif
378 if ((err = vx_reset_chk(chip)) < 0)
379 return err;
380
381 if ((err = vx_send_irq_dsp(chip, cmd)) < 0)
382 return err;
383
384 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
385 return err;
386
387 if (vx_inb(chip, ISR) & ISR_ERR) {
388 if ((err = vx_wait_for_rx_full(chip)) < 0)
389 return err;
390 err = vx_inb(chip, RXH) << 16;
391 err |= vx_inb(chip, RXM) << 8;
392 err |= vx_inb(chip, RXL);
393 return -(VX_ERR_MASK | err);
394 }
395 return 0;
396}
397
398
399
400
401
402
403
404
405int vx_send_rih(struct vx_core *chip, int cmd)
406{
407 unsigned long flags;
408 int err;
409
410 spin_lock_irqsave(&chip->lock, flags);
411 err = vx_send_rih_nolock(chip, cmd);
412 spin_unlock_irqrestore(&chip->lock, flags);
413 return err;
414}
415
416#define END_OF_RESET_WAIT_TIME 500
417
418
419
420
421
422int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *boot)
423{
424 unsigned int i;
425 int no_fillup = vx_has_new_dsp(chip);
426
427
428 snd_assert(boot->size > 0, return -EINVAL);
429 snd_assert(boot->size % 3 == 0, return -EINVAL);
430#if 0
431 {
432
433 unsigned int c = ((u32)boot->data[0] << 16) | ((u32)boot->data[1] << 8) | boot->data[2];
434 snd_assert(boot->size == (c + 2) * 3, return -EINVAL);
435 }
436#endif
437
438
439 vx_reset_dsp(chip);
440
441 udelay(END_OF_RESET_WAIT_TIME);
442
443
444 for (i = 0; i < 0x600; i += 3) {
445 if (i >= boot->size) {
446 if (no_fillup)
447 break;
448 if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
449 snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
450 return -EIO;
451 }
452 vx_outb(chip, TXH, 0);
453 vx_outb(chip, TXM, 0);
454 vx_outb(chip, TXL, 0);
455 } else {
456 const unsigned char *image = boot->data + i;
457 if (vx_wait_isr_bit(chip, ISR_TX_EMPTY) < 0) {
458 snd_printk(KERN_ERR "dsp boot failed at %d\n", i);
459 return -EIO;
460 }
461 vx_outb(chip, TXH, image[0]);
462 vx_outb(chip, TXM, image[1]);
463 vx_outb(chip, TXL, image[2]);
464 }
465 }
466 return 0;
467}
468
469EXPORT_SYMBOL(snd_vx_load_boot_image);
470
471
472
473
474
475
476static int vx_test_irq_src(struct vx_core *chip, unsigned int *ret)
477{
478 int err;
479
480 vx_init_rmh(&chip->irq_rmh, CMD_TEST_IT);
481 spin_lock(&chip->lock);
482 err = vx_send_msg_nolock(chip, &chip->irq_rmh);
483 if (err < 0)
484 *ret = 0;
485 else
486 *ret = chip->irq_rmh.Stat[0];
487 spin_unlock(&chip->lock);
488 return err;
489}
490
491
492
493
494
495static void vx_interrupt(unsigned long private_data)
496{
497 struct vx_core *chip = (struct vx_core *) private_data;
498 unsigned int events;
499
500 if (chip->chip_status & VX_STAT_IS_STALE)
501 return;
502
503 if (vx_test_irq_src(chip, &events) < 0)
504 return;
505
506#if 0
507 if (events & 0x000800)
508 printk(KERN_ERR "DSP Stream underrun ! IRQ events = 0x%x\n", events);
509#endif
510
511
512
513
514
515
516 if (events & FATAL_DSP_ERROR) {
517 snd_printk(KERN_ERR "vx_core: fatal DSP error!!\n");
518 return;
519 }
520
521
522
523
524 if (events & TIME_CODE_EVENT_PENDING)
525 ;
526
527
528 if (events & FREQUENCY_CHANGE_EVENT_PENDING)
529 vx_change_frequency(chip);
530
531
532 vx_pcm_update_intr(chip, events);
533}
534
535
536
537
538
539irqreturn_t snd_vx_irq_handler(int irq, void *dev)
540{
541 struct vx_core *chip = dev;
542
543 if (! (chip->chip_status & VX_STAT_CHIP_INIT) ||
544 (chip->chip_status & VX_STAT_IS_STALE))
545 return IRQ_NONE;
546 if (! vx_test_and_ack(chip))
547 tasklet_hi_schedule(&chip->tq);
548 return IRQ_HANDLED;
549}
550
551EXPORT_SYMBOL(snd_vx_irq_handler);
552
553
554
555static void vx_reset_board(struct vx_core *chip, int cold_reset)
556{
557 snd_assert(chip->ops->reset_board, return);
558
559
560 chip->audio_source = VX_AUDIO_SRC_LINE;
561 if (cold_reset) {
562 chip->audio_source_target = chip->audio_source;
563 chip->clock_source = INTERNAL_QUARTZ;
564 chip->clock_mode = VX_CLOCK_MODE_AUTO;
565 chip->freq = 48000;
566 chip->uer_detected = VX_UER_MODE_NOT_PRESENT;
567 chip->uer_bits = SNDRV_PCM_DEFAULT_CON_SPDIF;
568 }
569
570 chip->ops->reset_board(chip, cold_reset);
571
572 vx_reset_codec(chip, cold_reset);
573
574 vx_set_internal_clock(chip, chip->freq);
575
576
577 vx_reset_dsp(chip);
578
579 if (vx_is_pcmcia(chip)) {
580
581 vx_test_and_ack(chip);
582 vx_validate_irq(chip, 1);
583 }
584
585
586 vx_set_iec958_status(chip, chip->uer_bits);
587}
588
589
590
591
592
593
594static void vx_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
595{
596 struct vx_core *chip = entry->private_data;
597 static char *audio_src_vxp[] = { "Line", "Mic", "Digital" };
598 static char *audio_src_vx2[] = { "Analog", "Analog", "Digital" };
599 static char *clock_mode[] = { "Auto", "Internal", "External" };
600 static char *clock_src[] = { "Internal", "External" };
601 static char *uer_type[] = { "Consumer", "Professional", "Not Present" };
602
603 snd_iprintf(buffer, "%s\n", chip->card->longname);
604 snd_iprintf(buffer, "Xilinx Firmware: %s\n",
605 chip->chip_status & VX_STAT_XILINX_LOADED ? "Loaded" : "No");
606 snd_iprintf(buffer, "Device Initialized: %s\n",
607 chip->chip_status & VX_STAT_DEVICE_INIT ? "Yes" : "No");
608 snd_iprintf(buffer, "DSP audio info:");
609 if (chip->audio_info & VX_AUDIO_INFO_REAL_TIME)
610 snd_iprintf(buffer, " realtime");
611 if (chip->audio_info & VX_AUDIO_INFO_OFFLINE)
612 snd_iprintf(buffer, " offline");
613 if (chip->audio_info & VX_AUDIO_INFO_MPEG1)
614 snd_iprintf(buffer, " mpeg1");
615 if (chip->audio_info & VX_AUDIO_INFO_MPEG2)
616 snd_iprintf(buffer, " mpeg2");
617 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_8)
618 snd_iprintf(buffer, " linear8");
619 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_16)
620 snd_iprintf(buffer, " linear16");
621 if (chip->audio_info & VX_AUDIO_INFO_LINEAR_24)
622 snd_iprintf(buffer, " linear24");
623 snd_iprintf(buffer, "\n");
624 snd_iprintf(buffer, "Input Source: %s\n", vx_is_pcmcia(chip) ?
625 audio_src_vxp[chip->audio_source] :
626 audio_src_vx2[chip->audio_source]);
627 snd_iprintf(buffer, "Clock Mode: %s\n", clock_mode[chip->clock_mode]);
628 snd_iprintf(buffer, "Clock Source: %s\n", clock_src[chip->clock_source]);
629 snd_iprintf(buffer, "Frequency: %d\n", chip->freq);
630 snd_iprintf(buffer, "Detected Frequency: %d\n", chip->freq_detected);
631 snd_iprintf(buffer, "Detected UER type: %s\n", uer_type[chip->uer_detected]);
632 snd_iprintf(buffer, "Min/Max/Cur IBL: %d/%d/%d (granularity=%d)\n",
633 chip->ibl.min_size, chip->ibl.max_size, chip->ibl.size,
634 chip->ibl.granularity);
635}
636
637static void vx_proc_init(struct vx_core *chip)
638{
639 struct snd_info_entry *entry;
640
641 if (! snd_card_proc_new(chip->card, "vx-status", &entry))
642 snd_info_set_text_ops(entry, chip, vx_proc_read);
643}
644
645
646
647
648
649int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *boot)
650{
651 int err;
652 int cold_reset = !(chip->chip_status & VX_STAT_DEVICE_INIT);
653
654 vx_reset_board(chip, cold_reset);
655 vx_validate_irq(chip, 0);
656
657 if ((err = snd_vx_load_boot_image(chip, boot)) < 0)
658 return err;
659 msleep(10);
660
661 return 0;
662}
663
664EXPORT_SYMBOL(snd_vx_dsp_boot);
665
666
667
668
669int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp)
670{
671 unsigned int i;
672 int err;
673 unsigned int csum = 0;
674 const unsigned char *image, *cptr;
675
676 snd_assert(dsp->size % 3 == 0, return -EINVAL);
677
678 vx_toggle_dac_mute(chip, 1);
679
680
681 for (i = 0; i < dsp->size; i += 3) {
682 image = dsp->data + i;
683
684 if ((err = vx_wait_isr_bit(chip, ISR_TX_EMPTY)) < 0) {
685 printk("dsp loading error at position %d\n", i);
686 return err;
687 }
688 cptr = image;
689 csum ^= *cptr;
690 csum = (csum >> 24) | (csum << 8);
691 vx_outb(chip, TXH, *cptr++);
692 csum ^= *cptr;
693 csum = (csum >> 24) | (csum << 8);
694 vx_outb(chip, TXM, *cptr++);
695 csum ^= *cptr;
696 csum = (csum >> 24) | (csum << 8);
697 vx_outb(chip, TXL, *cptr++);
698 }
699 snd_printdd(KERN_DEBUG "checksum = 0x%08x\n", csum);
700
701 msleep(200);
702
703 if ((err = vx_wait_isr_bit(chip, ISR_CHK)) < 0)
704 return err;
705
706 vx_toggle_dac_mute(chip, 0);
707
708 vx_test_and_ack(chip);
709 vx_validate_irq(chip, 1);
710
711 return 0;
712}
713
714EXPORT_SYMBOL(snd_vx_dsp_load);
715
716#ifdef CONFIG_PM
717
718
719
720int snd_vx_suspend(struct vx_core *chip, pm_message_t state)
721{
722 unsigned int i;
723
724 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D3hot);
725 chip->chip_status |= VX_STAT_IN_SUSPEND;
726 for (i = 0; i < chip->hw->num_codecs; i++)
727 snd_pcm_suspend_all(chip->pcm[i]);
728
729 return 0;
730}
731
732EXPORT_SYMBOL(snd_vx_suspend);
733
734
735
736
737int snd_vx_resume(struct vx_core *chip)
738{
739 int i, err;
740
741 chip->chip_status &= ~VX_STAT_CHIP_INIT;
742
743 for (i = 0; i < 4; i++) {
744 if (! chip->firmware[i])
745 continue;
746 err = chip->ops->load_dsp(chip, i, chip->firmware[i]);
747 if (err < 0) {
748 snd_printk(KERN_ERR "vx: firmware resume error at DSP %d\n", i);
749 return -EIO;
750 }
751 }
752
753 chip->chip_status |= VX_STAT_CHIP_INIT;
754 chip->chip_status &= ~VX_STAT_IN_SUSPEND;
755
756 snd_power_change_state(chip->card, SNDRV_CTL_POWER_D0);
757 return 0;
758}
759
760EXPORT_SYMBOL(snd_vx_resume);
761#endif
762
763
764
765
766
767
768
769
770
771
772struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
773 struct snd_vx_ops *ops,
774 int extra_size)
775{
776 struct vx_core *chip;
777
778 snd_assert(card && hw && ops, return NULL);
779
780 chip = kzalloc(sizeof(*chip) + extra_size, GFP_KERNEL);
781 if (! chip) {
782 snd_printk(KERN_ERR "vx_core: no memory\n");
783 return NULL;
784 }
785 spin_lock_init(&chip->lock);
786 spin_lock_init(&chip->irq_lock);
787 chip->irq = -1;
788 chip->hw = hw;
789 chip->type = hw->type;
790 chip->ops = ops;
791 tasklet_init(&chip->tq, vx_interrupt, (unsigned long)chip);
792 mutex_init(&chip->mixer_mutex);
793
794 chip->card = card;
795 card->private_data = chip;
796 strcpy(card->driver, hw->name);
797 sprintf(card->shortname, "Digigram %s", hw->name);
798
799 vx_proc_init(chip);
800
801 return chip;
802}
803
804EXPORT_SYMBOL(snd_vx_create);
805
806
807
808
809static int __init alsa_vx_core_init(void)
810{
811 return 0;
812}
813
814static void __exit alsa_vx_core_exit(void)
815{
816}
817
818module_init(alsa_vx_core_init)
819module_exit(alsa_vx_core_exit)
820