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27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/slab.h>
30#include <linux/pci.h>
31#include <sound/core.h>
32#include <sound/asoundef.h>
33#include "hda_codec.h"
34#include "hda_local.h"
35#include "hda_patch.h"
36
37#define NUM_CONTROL_ALLOC 32
38#define STAC_PWR_EVENT 0x20
39#define STAC_HP_EVENT 0x30
40
41enum {
42 STAC_REF,
43 STAC_9200_OQO,
44 STAC_9200_DELL_D21,
45 STAC_9200_DELL_D22,
46 STAC_9200_DELL_D23,
47 STAC_9200_DELL_M21,
48 STAC_9200_DELL_M22,
49 STAC_9200_DELL_M23,
50 STAC_9200_DELL_M24,
51 STAC_9200_DELL_M25,
52 STAC_9200_DELL_M26,
53 STAC_9200_DELL_M27,
54 STAC_9200_GATEWAY,
55 STAC_9200_PANASONIC,
56 STAC_9200_MODELS
57};
58
59enum {
60 STAC_9205_REF,
61 STAC_9205_DELL_M42,
62 STAC_9205_DELL_M43,
63 STAC_9205_DELL_M44,
64 STAC_9205_MODELS
65};
66
67enum {
68 STAC_92HD73XX_REF,
69 STAC_DELL_M6,
70 STAC_DELL_EQ,
71 STAC_92HD73XX_MODELS
72};
73
74enum {
75 STAC_92HD71BXX_REF,
76 STAC_DELL_M4_1,
77 STAC_DELL_M4_2,
78 STAC_92HD71BXX_MODELS
79};
80
81enum {
82 STAC_925x_REF,
83 STAC_M2_2,
84 STAC_MA6,
85 STAC_PA6,
86 STAC_925x_MODELS
87};
88
89enum {
90 STAC_D945_REF,
91 STAC_D945GTP3,
92 STAC_D945GTP5,
93 STAC_INTEL_MAC_V1,
94 STAC_INTEL_MAC_V2,
95 STAC_INTEL_MAC_V3,
96 STAC_INTEL_MAC_V4,
97 STAC_INTEL_MAC_V5,
98 STAC_INTEL_MAC_AUTO,
99
100
101
102 STAC_MACMINI,
103 STAC_MACBOOK,
104 STAC_MACBOOK_PRO_V1,
105 STAC_MACBOOK_PRO_V2,
106 STAC_IMAC_INTEL,
107 STAC_IMAC_INTEL_20,
108 STAC_922X_DELL_D81,
109 STAC_922X_DELL_D82,
110 STAC_922X_DELL_M81,
111 STAC_922X_DELL_M82,
112 STAC_922X_MODELS
113};
114
115enum {
116 STAC_D965_REF,
117 STAC_D965_3ST,
118 STAC_D965_5ST,
119 STAC_DELL_3ST,
120 STAC_DELL_BIOS,
121 STAC_927X_MODELS
122};
123
124struct sigmatel_spec {
125 struct snd_kcontrol_new *mixers[4];
126 unsigned int num_mixers;
127
128 int board_config;
129 unsigned int surr_switch: 1;
130 unsigned int line_switch: 1;
131 unsigned int mic_switch: 1;
132 unsigned int alt_switch: 1;
133 unsigned int hp_detect: 1;
134
135
136 unsigned int eapd_mask;
137 unsigned int gpio_mask;
138 unsigned int gpio_dir;
139 unsigned int gpio_data;
140 unsigned int gpio_mute;
141
142
143 unsigned char aloopback_mask;
144 unsigned char aloopback_shift;
145
146
147 unsigned int num_pwrs;
148 hda_nid_t *pwr_nids;
149 hda_nid_t *dac_list;
150
151
152 struct hda_input_mux *mono_mux;
153 unsigned int cur_mmux;
154 struct hda_multi_out multiout;
155 hda_nid_t dac_nids[5];
156
157
158 hda_nid_t *adc_nids;
159 unsigned int num_adcs;
160 hda_nid_t *mux_nids;
161 unsigned int num_muxes;
162 hda_nid_t *dmic_nids;
163 unsigned int num_dmics;
164 hda_nid_t *dmux_nids;
165 unsigned int num_dmuxes;
166 hda_nid_t dig_in_nid;
167 hda_nid_t mono_nid;
168
169
170 hda_nid_t *pin_nids;
171 unsigned int num_pins;
172 unsigned int *pin_configs;
173 unsigned int *bios_pin_configs;
174
175
176 struct hda_verb *init;
177 struct snd_kcontrol_new *mixer;
178
179
180 struct hda_input_mux *dinput_mux;
181 unsigned int cur_dmux[2];
182 struct hda_input_mux *input_mux;
183 unsigned int cur_mux[3];
184
185
186 unsigned int io_switch[2];
187 unsigned int clfe_swap;
188 unsigned int hp_switch;
189 unsigned int aloopback;
190
191 struct hda_pcm pcm_rec[2];
192
193
194 struct auto_pin_cfg autocfg;
195 unsigned int num_kctl_alloc, num_kctl_used;
196 struct snd_kcontrol_new *kctl_alloc;
197 struct hda_input_mux private_dimux;
198 struct hda_input_mux private_imux;
199 struct hda_input_mux private_mono_mux;
200};
201
202static hda_nid_t stac9200_adc_nids[1] = {
203 0x03,
204};
205
206static hda_nid_t stac9200_mux_nids[1] = {
207 0x0c,
208};
209
210static hda_nid_t stac9200_dac_nids[1] = {
211 0x02,
212};
213
214static hda_nid_t stac92hd73xx_pwr_nids[8] = {
215 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
216 0x0f, 0x10, 0x11
217};
218
219static hda_nid_t stac92hd73xx_adc_nids[2] = {
220 0x1a, 0x1b
221};
222
223#define STAC92HD73XX_NUM_DMICS 2
224static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
225 0x13, 0x14, 0
226};
227
228#define STAC92HD73_DAC_COUNT 5
229static hda_nid_t stac92hd73xx_dac_nids[STAC92HD73_DAC_COUNT] = {
230 0x15, 0x16, 0x17, 0x18, 0x19,
231};
232
233static hda_nid_t stac92hd73xx_mux_nids[4] = {
234 0x28, 0x29, 0x2a, 0x2b,
235};
236
237static hda_nid_t stac92hd73xx_dmux_nids[2] = {
238 0x20, 0x21,
239};
240
241static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
242 0x0a, 0x0d, 0x0f
243};
244
245static hda_nid_t stac92hd71bxx_adc_nids[2] = {
246 0x12, 0x13,
247};
248
249static hda_nid_t stac92hd71bxx_mux_nids[2] = {
250 0x1a, 0x1b
251};
252
253static hda_nid_t stac92hd71bxx_dmux_nids[1] = {
254 0x1c,
255};
256
257static hda_nid_t stac92hd71bxx_dac_nids[1] = {
258 0x10,
259};
260
261#define STAC92HD71BXX_NUM_DMICS 2
262static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
263 0x18, 0x19, 0
264};
265
266static hda_nid_t stac925x_adc_nids[1] = {
267 0x03,
268};
269
270static hda_nid_t stac925x_mux_nids[1] = {
271 0x0f,
272};
273
274static hda_nid_t stac925x_dac_nids[1] = {
275 0x02,
276};
277
278#define STAC925X_NUM_DMICS 1
279static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
280 0x15, 0
281};
282
283static hda_nid_t stac925x_dmux_nids[1] = {
284 0x14,
285};
286
287static hda_nid_t stac922x_adc_nids[2] = {
288 0x06, 0x07,
289};
290
291static hda_nid_t stac922x_mux_nids[2] = {
292 0x12, 0x13,
293};
294
295static hda_nid_t stac927x_adc_nids[3] = {
296 0x07, 0x08, 0x09
297};
298
299static hda_nid_t stac927x_mux_nids[3] = {
300 0x15, 0x16, 0x17
301};
302
303static hda_nid_t stac927x_dac_nids[6] = {
304 0x02, 0x03, 0x04, 0x05, 0x06, 0
305};
306
307static hda_nid_t stac927x_dmux_nids[1] = {
308 0x1b,
309};
310
311#define STAC927X_NUM_DMICS 2
312static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
313 0x13, 0x14, 0
314};
315
316static hda_nid_t stac9205_adc_nids[2] = {
317 0x12, 0x13
318};
319
320static hda_nid_t stac9205_mux_nids[2] = {
321 0x19, 0x1a
322};
323
324static hda_nid_t stac9205_dmux_nids[1] = {
325 0x1d,
326};
327
328#define STAC9205_NUM_DMICS 2
329static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
330 0x17, 0x18, 0
331};
332
333static hda_nid_t stac9200_pin_nids[8] = {
334 0x08, 0x09, 0x0d, 0x0e,
335 0x0f, 0x10, 0x11, 0x12,
336};
337
338static hda_nid_t stac925x_pin_nids[8] = {
339 0x07, 0x08, 0x0a, 0x0b,
340 0x0c, 0x0d, 0x10, 0x11,
341};
342
343static hda_nid_t stac922x_pin_nids[10] = {
344 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
345 0x0f, 0x10, 0x11, 0x15, 0x1b,
346};
347
348static hda_nid_t stac92hd73xx_pin_nids[13] = {
349 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
350 0x0f, 0x10, 0x11, 0x12, 0x13,
351 0x14, 0x1e, 0x22
352};
353
354static hda_nid_t stac92hd71bxx_pin_nids[10] = {
355 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
356 0x0f, 0x14, 0x18, 0x19, 0x1e,
357};
358
359static hda_nid_t stac927x_pin_nids[14] = {
360 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
361 0x0f, 0x10, 0x11, 0x12, 0x13,
362 0x14, 0x21, 0x22, 0x23,
363};
364
365static hda_nid_t stac9205_pin_nids[12] = {
366 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
367 0x0f, 0x14, 0x16, 0x17, 0x18,
368 0x21, 0x22,
369};
370
371static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
372 struct snd_ctl_elem_info *uinfo)
373{
374 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
375 struct sigmatel_spec *spec = codec->spec;
376 return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
377}
378
379static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
380 struct snd_ctl_elem_value *ucontrol)
381{
382 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
383 struct sigmatel_spec *spec = codec->spec;
384 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
385
386 ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
387 return 0;
388}
389
390static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
391 struct snd_ctl_elem_value *ucontrol)
392{
393 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
394 struct sigmatel_spec *spec = codec->spec;
395 unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
396
397 return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
398 spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
399}
400
401static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
402{
403 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
404 struct sigmatel_spec *spec = codec->spec;
405 return snd_hda_input_mux_info(spec->input_mux, uinfo);
406}
407
408static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
409{
410 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
411 struct sigmatel_spec *spec = codec->spec;
412 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
413
414 ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
415 return 0;
416}
417
418static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
419{
420 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
421 struct sigmatel_spec *spec = codec->spec;
422 unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
423
424 return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
425 spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
426}
427
428static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
429 struct snd_ctl_elem_info *uinfo)
430{
431 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
432 struct sigmatel_spec *spec = codec->spec;
433 return snd_hda_input_mux_info(spec->mono_mux, uinfo);
434}
435
436static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
437 struct snd_ctl_elem_value *ucontrol)
438{
439 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
440 struct sigmatel_spec *spec = codec->spec;
441
442 ucontrol->value.enumerated.item[0] = spec->cur_mmux;
443 return 0;
444}
445
446static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
447 struct snd_ctl_elem_value *ucontrol)
448{
449 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
450 struct sigmatel_spec *spec = codec->spec;
451
452 return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
453 spec->mono_nid, &spec->cur_mmux);
454}
455
456#define stac92xx_aloopback_info snd_ctl_boolean_mono_info
457
458static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
459 struct snd_ctl_elem_value *ucontrol)
460{
461 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
462 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
463 struct sigmatel_spec *spec = codec->spec;
464
465 ucontrol->value.integer.value[0] = !!(spec->aloopback &
466 (spec->aloopback_mask << idx));
467 return 0;
468}
469
470static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
471 struct snd_ctl_elem_value *ucontrol)
472{
473 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
474 struct sigmatel_spec *spec = codec->spec;
475 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
476 unsigned int dac_mode;
477 unsigned int val, idx_val;
478
479 idx_val = spec->aloopback_mask << idx;
480 if (ucontrol->value.integer.value[0])
481 val = spec->aloopback | idx_val;
482 else
483 val = spec->aloopback & ~idx_val;
484 if (spec->aloopback == val)
485 return 0;
486
487 spec->aloopback = val;
488
489
490
491
492 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
493 kcontrol->private_value & 0xFFFF, 0x0);
494 dac_mode >>= spec->aloopback_shift;
495
496 if (spec->aloopback & idx_val) {
497 snd_hda_power_up(codec);
498 dac_mode |= idx_val;
499 } else {
500 snd_hda_power_down(codec);
501 dac_mode &= ~idx_val;
502 }
503
504 snd_hda_codec_write_cache(codec, codec->afg, 0,
505 kcontrol->private_value >> 16, dac_mode);
506
507 return 1;
508}
509
510static struct hda_verb stac9200_core_init[] = {
511
512 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
513 {}
514};
515
516static struct hda_verb stac9200_eapd_init[] = {
517
518 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
519 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
520 {}
521};
522
523static struct hda_verb stac92hd73xx_6ch_core_init[] = {
524
525 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
526
527 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
528 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
529 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
530
531 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
532 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
533 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
534 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
535 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
536
537 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
538 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
539 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
540 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
541 {}
542};
543
544static struct hda_verb dell_eq_core_init[] = {
545
546
547 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
548
549 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
550 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
551 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
552
553 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
554 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
555
556 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
557 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
558 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
559 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
560 {}
561};
562
563static struct hda_verb dell_m6_core_init[] = {
564 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
565
566 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x00},
567 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
568 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x02},
569
570 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
571 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
572
573 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
574 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
575 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
576 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x00},
577 {}
578};
579
580static struct hda_verb stac92hd73xx_8ch_core_init[] = {
581
582 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
583
584 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00},
585 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01},
586 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02},
587
588 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x03},
589 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x03},
590
591 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
592 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
593 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
594 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
595 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
596
597 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
598 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
599 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
600 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
601 {}
602};
603
604static struct hda_verb stac92hd73xx_10ch_core_init[] = {
605
606 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
607
608 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x00 },
609 { 0x10, AC_VERB_SET_CONNECT_SEL, 0x01 },
610 { 0x11, AC_VERB_SET_CONNECT_SEL, 0x02 },
611
612 { 0x18, AC_VERB_SET_AMP_GAIN_MUTE, 0xb07f},
613
614 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x04},
615 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x04},
616
617 { 0x20, AC_VERB_SET_CONNECT_SEL, 0x0b},
618 { 0x21, AC_VERB_SET_CONNECT_SEL, 0x0b},
619 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
620 { 0x10, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
621 { 0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
622
623 { 0x28, AC_VERB_SET_CONNECT_SEL, 0x01},
624 { 0x29, AC_VERB_SET_CONNECT_SEL, 0x01},
625 { 0x2a, AC_VERB_SET_CONNECT_SEL, 0x01},
626 { 0x2b, AC_VERB_SET_CONNECT_SEL, 0x03},
627 {}
628};
629
630static struct hda_verb stac92hd71bxx_core_init[] = {
631
632 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
633
634 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
635 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
636
637 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
638 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
639 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
640};
641
642#define HD_DISABLE_PORTF 3
643static struct hda_verb stac92hd71bxx_analog_core_init[] = {
644
645
646
647 { 0x0f, AC_VERB_SET_CONNECT_SEL, 0x2},
648 { 0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT},
649
650 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
651
652
653
654 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
655
656 { 0x0a, AC_VERB_SET_CONNECT_SEL, 0x01},
657
658 { 0x0d, AC_VERB_SET_CONNECT_SEL, 0x2},
659
660 { 0x17, AC_VERB_SET_AMP_GAIN_MUTE, 0x701f},
661
662 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
663 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
664 {}
665};
666
667static struct hda_verb stac925x_core_init[] = {
668
669 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
670 {}
671};
672
673static struct hda_verb stac922x_core_init[] = {
674
675 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
676 {}
677};
678
679static struct hda_verb d965_core_init[] = {
680
681 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
682
683 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
684
685 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
686 {}
687};
688
689static struct hda_verb stac927x_core_init[] = {
690
691 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
692 {}
693};
694
695static struct hda_verb stac9205_core_init[] = {
696
697 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
698 {}
699};
700
701#define STAC_MONO_MUX \
702 { \
703 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
704 .name = "Mono Mux", \
705 .count = 1, \
706 .info = stac92xx_mono_mux_enum_info, \
707 .get = stac92xx_mono_mux_enum_get, \
708 .put = stac92xx_mono_mux_enum_put, \
709 }
710
711#define STAC_INPUT_SOURCE(cnt) \
712 { \
713 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
714 .name = "Input Source", \
715 .count = cnt, \
716 .info = stac92xx_mux_enum_info, \
717 .get = stac92xx_mux_enum_get, \
718 .put = stac92xx_mux_enum_put, \
719 }
720
721#define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
722 { \
723 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
724 .name = "Analog Loopback", \
725 .count = cnt, \
726 .info = stac92xx_aloopback_info, \
727 .get = stac92xx_aloopback_get, \
728 .put = stac92xx_aloopback_put, \
729 .private_value = verb_read | (verb_write << 16), \
730 }
731
732static struct snd_kcontrol_new stac9200_mixer[] = {
733 HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
734 HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
735 STAC_INPUT_SOURCE(1),
736 HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
737 HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
738 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
739 { }
740};
741
742static struct snd_kcontrol_new stac92hd73xx_6ch_mixer[] = {
743 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
744
745 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
746 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
747
748 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
749 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
750
751 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
752 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
753
754 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
755 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
756
757 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
758 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
759
760 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
761 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
762
763 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
764 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
765 { }
766};
767
768static struct snd_kcontrol_new stac92hd73xx_8ch_mixer[] = {
769 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
770
771 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
772 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
773
774 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
775 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
776
777 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
778 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
779
780 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
781 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
782
783 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
784 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
785
786 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
787 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
788
789 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
790 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
791 { }
792};
793
794static struct snd_kcontrol_new stac92hd73xx_10ch_mixer[] = {
795 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
796
797 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x20, 0x0, HDA_OUTPUT),
798 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x20, 0x0, HDA_OUTPUT),
799
800 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x21, 0x0, HDA_OUTPUT),
801 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x21, 0x0, HDA_OUTPUT),
802
803 HDA_CODEC_VOLUME("Front Mic Mixer Capture Volume", 0x1d, 0, HDA_INPUT),
804 HDA_CODEC_MUTE("Front Mic Mixer Capture Switch", 0x1d, 0, HDA_INPUT),
805
806 HDA_CODEC_VOLUME("Mic Mixer Capture Volume", 0x1d, 0x1, HDA_INPUT),
807 HDA_CODEC_MUTE("Mic Mixer Capture Switch", 0x1d, 0x1, HDA_INPUT),
808
809 HDA_CODEC_VOLUME("Line In Mixer Capture Volume", 0x1d, 0x2, HDA_INPUT),
810 HDA_CODEC_MUTE("Line In Mixer Capture Switch", 0x1d, 0x2, HDA_INPUT),
811
812 HDA_CODEC_VOLUME("DAC Mixer Capture Volume", 0x1d, 0x3, HDA_INPUT),
813 HDA_CODEC_MUTE("DAC Mixer Capture Switch", 0x1d, 0x3, HDA_INPUT),
814
815 HDA_CODEC_VOLUME("CD Mixer Capture Volume", 0x1d, 0x4, HDA_INPUT),
816 HDA_CODEC_MUTE("CD Mixer Capture Switch", 0x1d, 0x4, HDA_INPUT),
817 { }
818};
819
820static struct snd_kcontrol_new stac92hd71bxx_analog_mixer[] = {
821 STAC_INPUT_SOURCE(2),
822
823 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
824 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
825 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
826
827 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
828 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
829 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
830
831 HDA_CODEC_VOLUME("PC Beep Volume", 0x17, 0x2, HDA_INPUT),
832 HDA_CODEC_MUTE("PC Beep Switch", 0x17, 0x2, HDA_INPUT),
833
834 HDA_CODEC_MUTE("Analog Loopback 1", 0x17, 0x3, HDA_INPUT),
835 HDA_CODEC_MUTE("Analog Loopback 2", 0x17, 0x4, HDA_INPUT),
836 { }
837};
838
839static struct snd_kcontrol_new stac92hd71bxx_mixer[] = {
840 STAC_INPUT_SOURCE(2),
841 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2),
842
843 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1c, 0x0, HDA_OUTPUT),
844 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1c, 0x0, HDA_OUTPUT),
845 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x0, 0x1a, 0x0, HDA_OUTPUT),
846
847 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1d, 0x0, HDA_OUTPUT),
848 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1d, 0x0, HDA_OUTPUT),
849 HDA_CODEC_VOLUME_IDX("Capture Mux Volume", 0x1, 0x1b, 0x0, HDA_OUTPUT),
850 { }
851};
852
853static struct snd_kcontrol_new stac925x_mixer[] = {
854 STAC_INPUT_SOURCE(1),
855 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
856 HDA_CODEC_MUTE("Capture Switch", 0x14, 0, HDA_OUTPUT),
857 HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
858 { }
859};
860
861static struct snd_kcontrol_new stac9205_mixer[] = {
862 STAC_INPUT_SOURCE(2),
863 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
864
865 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
866 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
867 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
868
869 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
870 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
871 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
872
873 { }
874};
875
876
877static struct snd_kcontrol_new stac922x_mixer[] = {
878 STAC_INPUT_SOURCE(2),
879 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
880 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
881 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
882
883 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
884 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
885 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
886 { }
887};
888
889
890static struct snd_kcontrol_new stac927x_mixer[] = {
891 STAC_INPUT_SOURCE(3),
892 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
893
894 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
895 HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
896 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
897
898 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
899 HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
900 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
901
902 HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
903 HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
904 HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
905 { }
906};
907
908static struct snd_kcontrol_new stac_dmux_mixer = {
909 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
910 .name = "Digital Input Source",
911
912 .info = stac92xx_dmux_enum_info,
913 .get = stac92xx_dmux_enum_get,
914 .put = stac92xx_dmux_enum_put,
915};
916
917static const char *slave_vols[] = {
918 "Front Playback Volume",
919 "Surround Playback Volume",
920 "Center Playback Volume",
921 "LFE Playback Volume",
922 "Side Playback Volume",
923 "Headphone Playback Volume",
924 "Headphone Playback Volume",
925 "Speaker Playback Volume",
926 "External Speaker Playback Volume",
927 "Speaker2 Playback Volume",
928 NULL
929};
930
931static const char *slave_sws[] = {
932 "Front Playback Switch",
933 "Surround Playback Switch",
934 "Center Playback Switch",
935 "LFE Playback Switch",
936 "Side Playback Switch",
937 "Headphone Playback Switch",
938 "Headphone Playback Switch",
939 "Speaker Playback Switch",
940 "External Speaker Playback Switch",
941 "Speaker2 Playback Switch",
942 "IEC958 Playback Switch",
943 NULL
944};
945
946static int stac92xx_build_controls(struct hda_codec *codec)
947{
948 struct sigmatel_spec *spec = codec->spec;
949 int err;
950 int i;
951
952 err = snd_hda_add_new_ctls(codec, spec->mixer);
953 if (err < 0)
954 return err;
955
956 for (i = 0; i < spec->num_mixers; i++) {
957 err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
958 if (err < 0)
959 return err;
960 }
961 if (spec->num_dmuxes > 0) {
962 stac_dmux_mixer.count = spec->num_dmuxes;
963 err = snd_ctl_add(codec->bus->card,
964 snd_ctl_new1(&stac_dmux_mixer, codec));
965 if (err < 0)
966 return err;
967 }
968
969 if (spec->multiout.dig_out_nid) {
970 err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
971 if (err < 0)
972 return err;
973 err = snd_hda_create_spdif_share_sw(codec,
974 &spec->multiout);
975 if (err < 0)
976 return err;
977 spec->multiout.share_spdif = 1;
978 }
979 if (spec->dig_in_nid) {
980 err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
981 if (err < 0)
982 return err;
983 }
984
985
986 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
987 unsigned int vmaster_tlv[4];
988 snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
989 HDA_OUTPUT, vmaster_tlv);
990 err = snd_hda_add_vmaster(codec, "Master Playback Volume",
991 vmaster_tlv, slave_vols);
992 if (err < 0)
993 return err;
994 }
995 if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
996 err = snd_hda_add_vmaster(codec, "Master Playback Switch",
997 NULL, slave_sws);
998 if (err < 0)
999 return err;
1000 }
1001
1002 return 0;
1003}
1004
1005static unsigned int ref9200_pin_configs[8] = {
1006 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
1007 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1008};
1009
1010
1011
1012
1013
1014
1015
1016static unsigned int dell9200_d21_pin_configs[8] = {
1017 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
1018 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
1019};
1020
1021
1022
1023
1024
1025
1026static unsigned int dell9200_d22_pin_configs[8] = {
1027 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1028 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
1029};
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040static unsigned int dell9200_d23_pin_configs[8] = {
1041 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
1042 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
1043};
1044
1045
1046
1047
1048
1049
1050
1051static unsigned int dell9200_m21_pin_configs[8] = {
1052 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
1053 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
1054};
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064static unsigned int dell9200_m22_pin_configs[8] = {
1065 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
1066 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
1067};
1068
1069
1070
1071
1072
1073
1074static unsigned int dell9200_m23_pin_configs[8] = {
1075 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
1076 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
1077};
1078
1079
1080
1081
1082
1083
1084
1085
1086static unsigned int dell9200_m24_pin_configs[8] = {
1087 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
1088 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
1089};
1090
1091
1092
1093
1094
1095
1096
1097static unsigned int dell9200_m25_pin_configs[8] = {
1098 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1099 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
1100};
1101
1102
1103
1104
1105
1106
1107static unsigned int dell9200_m26_pin_configs[8] = {
1108 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
1109 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
1110};
1111
1112
1113
1114
1115
1116static unsigned int dell9200_m27_pin_configs[8] = {
1117 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
1118 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
1119};
1120
1121static unsigned int oqo9200_pin_configs[8] = {
1122 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
1123 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
1124};
1125
1126
1127static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
1128 [STAC_REF] = ref9200_pin_configs,
1129 [STAC_9200_OQO] = oqo9200_pin_configs,
1130 [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
1131 [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
1132 [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
1133 [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
1134 [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
1135 [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
1136 [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
1137 [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
1138 [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
1139 [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
1140 [STAC_9200_PANASONIC] = ref9200_pin_configs,
1141};
1142
1143static const char *stac9200_models[STAC_9200_MODELS] = {
1144 [STAC_REF] = "ref",
1145 [STAC_9200_OQO] = "oqo",
1146 [STAC_9200_DELL_D21] = "dell-d21",
1147 [STAC_9200_DELL_D22] = "dell-d22",
1148 [STAC_9200_DELL_D23] = "dell-d23",
1149 [STAC_9200_DELL_M21] = "dell-m21",
1150 [STAC_9200_DELL_M22] = "dell-m22",
1151 [STAC_9200_DELL_M23] = "dell-m23",
1152 [STAC_9200_DELL_M24] = "dell-m24",
1153 [STAC_9200_DELL_M25] = "dell-m25",
1154 [STAC_9200_DELL_M26] = "dell-m26",
1155 [STAC_9200_DELL_M27] = "dell-m27",
1156 [STAC_9200_GATEWAY] = "gateway",
1157 [STAC_9200_PANASONIC] = "panasonic",
1158};
1159
1160static struct snd_pci_quirk stac9200_cfg_tbl[] = {
1161
1162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1163 "DFI LanParty", STAC_REF),
1164
1165 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1166 "unknown Dell", STAC_9200_DELL_D21),
1167 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1168 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1170 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1172 "unknown Dell", STAC_9200_DELL_D22),
1173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1174 "unknown Dell", STAC_9200_DELL_D22),
1175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1176 "Dell Latitude D620", STAC_9200_DELL_M22),
1177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1178 "unknown Dell", STAC_9200_DELL_D23),
1179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1180 "unknown Dell", STAC_9200_DELL_D23),
1181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1182 "unknown Dell", STAC_9200_DELL_M22),
1183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1184 "unknown Dell", STAC_9200_DELL_M24),
1185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1186 "unknown Dell", STAC_9200_DELL_M24),
1187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1188 "Dell Latitude 120L", STAC_9200_DELL_M24),
1189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1190 "Dell Latitude D820", STAC_9200_DELL_M22),
1191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1192 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1194 "Dell XPS M1710", STAC_9200_DELL_M23),
1195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1196 "Dell Precision M90", STAC_9200_DELL_M23),
1197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1198 "unknown Dell", STAC_9200_DELL_M22),
1199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1200 "unknown Dell", STAC_9200_DELL_M22),
1201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1202 "unknown Dell", STAC_9200_DELL_M22),
1203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1204 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1206 "unknown Dell", STAC_9200_DELL_D23),
1207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1208 "unknown Dell", STAC_9200_DELL_D23),
1209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1210 "unknown Dell", STAC_9200_DELL_D21),
1211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1212 "unknown Dell", STAC_9200_DELL_D23),
1213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1214 "unknown Dell", STAC_9200_DELL_D21),
1215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1216 "unknown Dell", STAC_9200_DELL_M25),
1217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1218 "unknown Dell", STAC_9200_DELL_M25),
1219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1220 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1221 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1222 "unknown Dell", STAC_9200_DELL_M26),
1223
1224 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1225
1226 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
1227 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
1228 STAC_9200_GATEWAY),
1229 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
1230 STAC_9200_GATEWAY),
1231
1232 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1233 {}
1234};
1235
1236static unsigned int ref925x_pin_configs[8] = {
1237 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1238 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
1239};
1240
1241static unsigned int stac925x_MA6_pin_configs[8] = {
1242 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1243 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
1244};
1245
1246static unsigned int stac925x_PA6_pin_configs[8] = {
1247 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
1248 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
1249};
1250
1251static unsigned int stac925xM2_2_pin_configs[8] = {
1252 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
1253 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
1254};
1255
1256static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
1257 [STAC_REF] = ref925x_pin_configs,
1258 [STAC_M2_2] = stac925xM2_2_pin_configs,
1259 [STAC_MA6] = stac925x_MA6_pin_configs,
1260 [STAC_PA6] = stac925x_PA6_pin_configs,
1261};
1262
1263static const char *stac925x_models[STAC_925x_MODELS] = {
1264 [STAC_REF] = "ref",
1265 [STAC_M2_2] = "m2-2",
1266 [STAC_MA6] = "m6",
1267 [STAC_PA6] = "pa6",
1268};
1269
1270static struct snd_pci_quirk stac925x_cfg_tbl[] = {
1271
1272 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1273 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1274 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
1275 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
1276 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
1277 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
1278 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
1279 {}
1280};
1281
1282static unsigned int ref92hd73xx_pin_configs[13] = {
1283 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
1284 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
1285 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
1286 0x01452050,
1287};
1288
1289static unsigned int dell_m6_pin_configs[13] = {
1290 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
1291 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
1292 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
1293 0x4f0000f0,
1294};
1295
1296static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
1297 [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
1298 [STAC_DELL_M6] = dell_m6_pin_configs,
1299 [STAC_DELL_EQ] = dell_m6_pin_configs,
1300};
1301
1302static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
1303 [STAC_92HD73XX_REF] = "ref",
1304 [STAC_DELL_M6] = "dell-m6",
1305 [STAC_DELL_EQ] = "dell-eq",
1306};
1307
1308static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
1309
1310 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1311 "DFI LanParty", STAC_92HD73XX_REF),
1312 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1313 "unknown Dell", STAC_DELL_M6),
1314 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1315 "unknown Dell", STAC_DELL_M6),
1316 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1317 "unknown Dell", STAC_DELL_M6),
1318 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1319 "unknown Dell", STAC_DELL_M6),
1320 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1321 "unknown Dell", STAC_DELL_M6),
1322 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1323 "unknown Dell", STAC_DELL_M6),
1324 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1325 "unknown Dell", STAC_DELL_M6),
1326 {}
1327};
1328
1329static unsigned int ref92hd71bxx_pin_configs[10] = {
1330 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
1331 0x0181302e, 0x01114010, 0x01019020, 0x90a000f0,
1332 0x90a000f0, 0x01452050,
1333};
1334
1335static unsigned int dell_m4_1_pin_configs[10] = {
1336 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
1337 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
1338 0x40f000f0, 0x4f0000f0,
1339};
1340
1341static unsigned int dell_m4_2_pin_configs[10] = {
1342 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
1343 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
1344 0x40f000f0, 0x044413b0,
1345};
1346
1347static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
1348 [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
1349 [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
1350 [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
1351};
1352
1353static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
1354 [STAC_92HD71BXX_REF] = "ref",
1355 [STAC_DELL_M4_1] = "dell-m4-1",
1356 [STAC_DELL_M4_2] = "dell-m4-2",
1357};
1358
1359static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
1360
1361 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1362 "DFI LanParty", STAC_92HD71BXX_REF),
1363 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
1364 "unknown Dell", STAC_DELL_M4_1),
1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
1366 "unknown Dell", STAC_DELL_M4_1),
1367 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
1368 "unknown Dell", STAC_DELL_M4_1),
1369 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
1370 "unknown Dell", STAC_DELL_M4_1),
1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
1372 "unknown Dell", STAC_DELL_M4_1),
1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
1374 "unknown Dell", STAC_DELL_M4_1),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
1376 "unknown Dell", STAC_DELL_M4_1),
1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
1378 "unknown Dell", STAC_DELL_M4_2),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
1380 "unknown Dell", STAC_DELL_M4_2),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
1382 "unknown Dell", STAC_DELL_M4_2),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
1384 "unknown Dell", STAC_DELL_M4_2),
1385 {}
1386};
1387
1388static unsigned int ref922x_pin_configs[10] = {
1389 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
1390 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
1391 0x40000100, 0x40000100,
1392};
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402static unsigned int dell_922x_d81_pin_configs[10] = {
1403 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1404 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
1405 0x01813122, 0x400001f2,
1406};
1407
1408
1409
1410
1411
1412
1413static unsigned int dell_922x_d82_pin_configs[10] = {
1414 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
1415 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
1416 0x01813122, 0x400001f1,
1417};
1418
1419
1420
1421
1422
1423static unsigned int dell_922x_m81_pin_configs[10] = {
1424 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
1425 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
1426 0x40C003f1, 0x405003f0,
1427};
1428
1429
1430
1431
1432
1433static unsigned int dell_922x_m82_pin_configs[10] = {
1434 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
1435 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
1436 0x508003f3, 0x405003f4,
1437};
1438
1439static unsigned int d945gtp3_pin_configs[10] = {
1440 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
1441 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1442 0x02a19120, 0x40000100,
1443};
1444
1445static unsigned int d945gtp5_pin_configs[10] = {
1446 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
1447 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
1448 0x02a19320, 0x40000100,
1449};
1450
1451static unsigned int intel_mac_v1_pin_configs[10] = {
1452 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
1453 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
1454 0x400000fc, 0x400000fb,
1455};
1456
1457static unsigned int intel_mac_v2_pin_configs[10] = {
1458 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1459 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
1460 0x400000fc, 0x400000fb,
1461};
1462
1463static unsigned int intel_mac_v3_pin_configs[10] = {
1464 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
1465 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
1466 0x400000fc, 0x400000fb,
1467};
1468
1469static unsigned int intel_mac_v4_pin_configs[10] = {
1470 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1471 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1472 0x400000fc, 0x400000fb,
1473};
1474
1475static unsigned int intel_mac_v5_pin_configs[10] = {
1476 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
1477 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
1478 0x400000fc, 0x400000fb,
1479};
1480
1481
1482static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
1483 [STAC_D945_REF] = ref922x_pin_configs,
1484 [STAC_D945GTP3] = d945gtp3_pin_configs,
1485 [STAC_D945GTP5] = d945gtp5_pin_configs,
1486 [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
1487 [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
1488 [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
1489 [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
1490 [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
1491 [STAC_INTEL_MAC_AUTO] = intel_mac_v3_pin_configs,
1492
1493 [STAC_MACMINI] = intel_mac_v3_pin_configs,
1494 [STAC_MACBOOK] = intel_mac_v5_pin_configs,
1495 [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
1496 [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
1497 [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
1498 [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
1499 [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
1500 [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
1501 [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
1502 [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
1503};
1504
1505static const char *stac922x_models[STAC_922X_MODELS] = {
1506 [STAC_D945_REF] = "ref",
1507 [STAC_D945GTP5] = "5stack",
1508 [STAC_D945GTP3] = "3stack",
1509 [STAC_INTEL_MAC_V1] = "intel-mac-v1",
1510 [STAC_INTEL_MAC_V2] = "intel-mac-v2",
1511 [STAC_INTEL_MAC_V3] = "intel-mac-v3",
1512 [STAC_INTEL_MAC_V4] = "intel-mac-v4",
1513 [STAC_INTEL_MAC_V5] = "intel-mac-v5",
1514 [STAC_INTEL_MAC_AUTO] = "intel-mac-auto",
1515
1516 [STAC_MACMINI] = "macmini",
1517 [STAC_MACBOOK] = "macbook",
1518 [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
1519 [STAC_MACBOOK_PRO_V2] = "macbook-pro",
1520 [STAC_IMAC_INTEL] = "imac-intel",
1521 [STAC_IMAC_INTEL_20] = "imac-intel-20",
1522 [STAC_922X_DELL_D81] = "dell-d81",
1523 [STAC_922X_DELL_D82] = "dell-d82",
1524 [STAC_922X_DELL_M81] = "dell-m81",
1525 [STAC_922X_DELL_M82] = "dell-m82",
1526};
1527
1528static struct snd_pci_quirk stac922x_cfg_tbl[] = {
1529
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1531 "DFI LanParty", STAC_D945_REF),
1532
1533 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
1534 "Intel D945G", STAC_D945GTP3),
1535 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
1536 "Intel D945G", STAC_D945GTP3),
1537 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
1538 "Intel D945G", STAC_D945GTP3),
1539 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
1540 "Intel D945G", STAC_D945GTP3),
1541 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
1542 "Intel D945G", STAC_D945GTP3),
1543 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
1544 "Intel D945G", STAC_D945GTP3),
1545 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
1546 "Intel D945G", STAC_D945GTP3),
1547 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
1548 "Intel D945G", STAC_D945GTP3),
1549 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
1550 "Intel D945G", STAC_D945GTP3),
1551 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
1552 "Intel D945G", STAC_D945GTP3),
1553 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
1554 "Intel D945G", STAC_D945GTP3),
1555 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
1556 "Intel D945G", STAC_D945GTP3),
1557 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
1558 "Intel D945G", STAC_D945GTP3),
1559 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
1560 "Intel D945G", STAC_D945GTP3),
1561 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
1562 "Intel D945G", STAC_D945GTP3),
1563
1564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
1565 "Intel D945G", STAC_D945GTP5),
1566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
1567 "Intel D945G", STAC_D945GTP5),
1568 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
1569 "Intel D945G", STAC_D945GTP5),
1570 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
1571 "Intel D945G", STAC_D945GTP5),
1572
1573 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
1574 "Intel D945P", STAC_D945GTP3),
1575 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
1576 "Intel D945P", STAC_D945GTP3),
1577 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
1578 "Intel D945P", STAC_D945GTP3),
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
1580 "Intel D945P", STAC_D945GTP3),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
1582 "Intel D945P", STAC_D945GTP3),
1583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
1584 "Intel D945P", STAC_D945GTP5),
1585
1586
1587 SND_PCI_QUIRK(0x8384, 0x7680,
1588 "Mac", STAC_INTEL_MAC_AUTO),
1589
1590 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
1591 "unknown Dell", STAC_922X_DELL_D81),
1592 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
1593 "unknown Dell", STAC_922X_DELL_D81),
1594 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
1595 "unknown Dell", STAC_922X_DELL_D81),
1596 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
1597 "unknown Dell", STAC_922X_DELL_D82),
1598 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
1599 "unknown Dell", STAC_922X_DELL_M81),
1600 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
1601 "unknown Dell", STAC_922X_DELL_D82),
1602 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
1603 "unknown Dell", STAC_922X_DELL_D81),
1604 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
1605 "unknown Dell", STAC_922X_DELL_D81),
1606 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
1607 "Dell XPS M1210", STAC_922X_DELL_M82),
1608 {}
1609};
1610
1611static unsigned int ref927x_pin_configs[14] = {
1612 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1613 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
1614 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
1615 0x01c42190, 0x40000100,
1616};
1617
1618static unsigned int d965_3st_pin_configs[14] = {
1619 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
1620 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
1621 0x40000100, 0x40000100, 0x40000100, 0x40000100,
1622 0x40000100, 0x40000100
1623};
1624
1625static unsigned int d965_5st_pin_configs[14] = {
1626 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
1627 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
1628 0x40000100, 0x40000100, 0x40000100, 0x01442070,
1629 0x40000100, 0x40000100
1630};
1631
1632static unsigned int dell_3st_pin_configs[14] = {
1633 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
1634 0x01111212, 0x01116211, 0x01813050, 0x01112214,
1635 0x403003fa, 0x90a60040, 0x90a60040, 0x404003fb,
1636 0x40c003fc, 0x40000100
1637};
1638
1639static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
1640 [STAC_D965_REF] = ref927x_pin_configs,
1641 [STAC_D965_3ST] = d965_3st_pin_configs,
1642 [STAC_D965_5ST] = d965_5st_pin_configs,
1643 [STAC_DELL_3ST] = dell_3st_pin_configs,
1644 [STAC_DELL_BIOS] = NULL,
1645};
1646
1647static const char *stac927x_models[STAC_927X_MODELS] = {
1648 [STAC_D965_REF] = "ref",
1649 [STAC_D965_3ST] = "3stack",
1650 [STAC_D965_5ST] = "5stack",
1651 [STAC_DELL_3ST] = "dell-3stack",
1652 [STAC_DELL_BIOS] = "dell-bios",
1653};
1654
1655static struct snd_pci_quirk stac927x_cfg_tbl[] = {
1656
1657 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1658 "DFI LanParty", STAC_D965_REF),
1659
1660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
1661 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
1662
1663 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
1664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
1665 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
1666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
1667 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
1668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
1669 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
1670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
1671 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
1672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
1673 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
1674 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
1675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
1676 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
1677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
1678 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
1679
1680 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_3ST),
1681 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
1682 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
1683 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
1684
1685 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
1686 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
1687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS),
1688 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_3ST),
1689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
1690 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
1692 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS),
1693
1694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
1695 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
1696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
1697 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
1698 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
1699 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
1700 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
1701 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
1702 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
1703 {}
1704};
1705
1706static unsigned int ref9205_pin_configs[12] = {
1707 0x40000100, 0x40000100, 0x01016011, 0x01014010,
1708 0x01813122, 0x01a19021, 0x01019020, 0x40000100,
1709 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
1710};
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722static unsigned int dell_9205_m42_pin_configs[12] = {
1723 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
1724 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
1725 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
1726};
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738static unsigned int dell_9205_m43_pin_configs[12] = {
1739 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
1740 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
1741 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
1742};
1743
1744static unsigned int dell_9205_m44_pin_configs[12] = {
1745 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
1746 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
1747 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
1748};
1749
1750static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
1751 [STAC_9205_REF] = ref9205_pin_configs,
1752 [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
1753 [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
1754 [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
1755};
1756
1757static const char *stac9205_models[STAC_9205_MODELS] = {
1758 [STAC_9205_REF] = "ref",
1759 [STAC_9205_DELL_M42] = "dell-m42",
1760 [STAC_9205_DELL_M43] = "dell-m43",
1761 [STAC_9205_DELL_M44] = "dell-m44",
1762};
1763
1764static struct snd_pci_quirk stac9205_cfg_tbl[] = {
1765
1766 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1767 "DFI LanParty", STAC_9205_REF),
1768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
1769 "unknown Dell", STAC_9205_DELL_M42),
1770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
1771 "unknown Dell", STAC_9205_DELL_M42),
1772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
1773 "Dell Precision", STAC_9205_DELL_M43),
1774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
1775 "Dell Precision", STAC_9205_DELL_M43),
1776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
1777 "Dell Precision", STAC_9205_DELL_M43),
1778 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
1779 "unknown Dell", STAC_9205_DELL_M42),
1780 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
1781 "unknown Dell", STAC_9205_DELL_M42),
1782 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
1783 "Dell Precision", STAC_9205_DELL_M43),
1784 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
1785 "Dell Precision M4300", STAC_9205_DELL_M43),
1786 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
1787 "unknown Dell", STAC_9205_DELL_M42),
1788 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
1789 "Dell Precision", STAC_9205_DELL_M43),
1790 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
1791 "Dell Precision", STAC_9205_DELL_M43),
1792 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
1793 "Dell Precision", STAC_9205_DELL_M43),
1794 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
1795 "Dell Inspiron", STAC_9205_DELL_M44),
1796 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
1797 "Dell Vostro 1500", STAC_9205_DELL_M42),
1798 {}
1799};
1800
1801static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
1802{
1803 int i;
1804 struct sigmatel_spec *spec = codec->spec;
1805
1806 if (! spec->bios_pin_configs) {
1807 spec->bios_pin_configs = kcalloc(spec->num_pins,
1808 sizeof(*spec->bios_pin_configs), GFP_KERNEL);
1809 if (! spec->bios_pin_configs)
1810 return -ENOMEM;
1811 }
1812
1813 for (i = 0; i < spec->num_pins; i++) {
1814 hda_nid_t nid = spec->pin_nids[i];
1815 unsigned int pin_cfg;
1816
1817 pin_cfg = snd_hda_codec_read(codec, nid, 0,
1818 AC_VERB_GET_CONFIG_DEFAULT, 0x00);
1819 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
1820 nid, pin_cfg);
1821 spec->bios_pin_configs[i] = pin_cfg;
1822 }
1823
1824 return 0;
1825}
1826
1827static void stac92xx_set_config_reg(struct hda_codec *codec,
1828 hda_nid_t pin_nid, unsigned int pin_config)
1829{
1830 int i;
1831 snd_hda_codec_write(codec, pin_nid, 0,
1832 AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
1833 pin_config & 0x000000ff);
1834 snd_hda_codec_write(codec, pin_nid, 0,
1835 AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
1836 (pin_config & 0x0000ff00) >> 8);
1837 snd_hda_codec_write(codec, pin_nid, 0,
1838 AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
1839 (pin_config & 0x00ff0000) >> 16);
1840 snd_hda_codec_write(codec, pin_nid, 0,
1841 AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
1842 pin_config >> 24);
1843 i = snd_hda_codec_read(codec, pin_nid, 0,
1844 AC_VERB_GET_CONFIG_DEFAULT,
1845 0x00);
1846 snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
1847 pin_nid, i);
1848}
1849
1850static void stac92xx_set_config_regs(struct hda_codec *codec)
1851{
1852 int i;
1853 struct sigmatel_spec *spec = codec->spec;
1854
1855 if (!spec->pin_configs)
1856 return;
1857
1858 for (i = 0; i < spec->num_pins; i++)
1859 stac92xx_set_config_reg(codec, spec->pin_nids[i],
1860 spec->pin_configs[i]);
1861}
1862
1863
1864
1865
1866static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
1867 struct hda_codec *codec,
1868 struct snd_pcm_substream *substream)
1869{
1870 struct sigmatel_spec *spec = codec->spec;
1871 return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream,
1872 hinfo);
1873}
1874
1875static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1876 struct hda_codec *codec,
1877 unsigned int stream_tag,
1878 unsigned int format,
1879 struct snd_pcm_substream *substream)
1880{
1881 struct sigmatel_spec *spec = codec->spec;
1882 return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
1883}
1884
1885static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1886 struct hda_codec *codec,
1887 struct snd_pcm_substream *substream)
1888{
1889 struct sigmatel_spec *spec = codec->spec;
1890 return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
1891}
1892
1893
1894
1895
1896static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
1897 struct hda_codec *codec,
1898 struct snd_pcm_substream *substream)
1899{
1900 struct sigmatel_spec *spec = codec->spec;
1901 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1902}
1903
1904static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
1905 struct hda_codec *codec,
1906 struct snd_pcm_substream *substream)
1907{
1908 struct sigmatel_spec *spec = codec->spec;
1909 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1910}
1911
1912static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1913 struct hda_codec *codec,
1914 unsigned int stream_tag,
1915 unsigned int format,
1916 struct snd_pcm_substream *substream)
1917{
1918 struct sigmatel_spec *spec = codec->spec;
1919 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1920 stream_tag, format, substream);
1921}
1922
1923
1924
1925
1926
1927static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
1928 struct hda_codec *codec,
1929 unsigned int stream_tag,
1930 unsigned int format,
1931 struct snd_pcm_substream *substream)
1932{
1933 struct sigmatel_spec *spec = codec->spec;
1934
1935 snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
1936 stream_tag, 0, format);
1937 return 0;
1938}
1939
1940static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
1941 struct hda_codec *codec,
1942 struct snd_pcm_substream *substream)
1943{
1944 struct sigmatel_spec *spec = codec->spec;
1945
1946 snd_hda_codec_cleanup_stream(codec, spec->adc_nids[substream->number]);
1947 return 0;
1948}
1949
1950static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
1951 .substreams = 1,
1952 .channels_min = 2,
1953 .channels_max = 2,
1954
1955 .ops = {
1956 .open = stac92xx_dig_playback_pcm_open,
1957 .close = stac92xx_dig_playback_pcm_close,
1958 .prepare = stac92xx_dig_playback_pcm_prepare
1959 },
1960};
1961
1962static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
1963 .substreams = 1,
1964 .channels_min = 2,
1965 .channels_max = 2,
1966
1967};
1968
1969static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
1970 .substreams = 1,
1971 .channels_min = 2,
1972 .channels_max = 8,
1973 .nid = 0x02,
1974 .ops = {
1975 .open = stac92xx_playback_pcm_open,
1976 .prepare = stac92xx_playback_pcm_prepare,
1977 .cleanup = stac92xx_playback_pcm_cleanup
1978 },
1979};
1980
1981static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
1982 .substreams = 1,
1983 .channels_min = 2,
1984 .channels_max = 2,
1985 .nid = 0x06,
1986 .ops = {
1987 .open = stac92xx_playback_pcm_open,
1988 .prepare = stac92xx_playback_pcm_prepare,
1989 .cleanup = stac92xx_playback_pcm_cleanup
1990 },
1991};
1992
1993static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
1994 .channels_min = 2,
1995 .channels_max = 2,
1996
1997 .ops = {
1998 .prepare = stac92xx_capture_pcm_prepare,
1999 .cleanup = stac92xx_capture_pcm_cleanup
2000 },
2001};
2002
2003static int stac92xx_build_pcms(struct hda_codec *codec)
2004{
2005 struct sigmatel_spec *spec = codec->spec;
2006 struct hda_pcm *info = spec->pcm_rec;
2007
2008 codec->num_pcms = 1;
2009 codec->pcm_info = info;
2010
2011 info->name = "STAC92xx Analog";
2012 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
2013 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
2014 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
2015 info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
2016
2017 if (spec->alt_switch) {
2018 codec->num_pcms++;
2019 info++;
2020 info->name = "STAC92xx Analog Alt";
2021 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
2022 }
2023
2024 if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
2025 codec->num_pcms++;
2026 info++;
2027 info->name = "STAC92xx Digital";
2028 info->pcm_type = HDA_PCM_TYPE_SPDIF;
2029 if (spec->multiout.dig_out_nid) {
2030 info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
2031 info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
2032 }
2033 if (spec->dig_in_nid) {
2034 info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
2035 info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
2036 }
2037 }
2038
2039 return 0;
2040}
2041
2042static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
2043{
2044 unsigned int pincap = snd_hda_param_read(codec, nid,
2045 AC_PAR_PIN_CAP);
2046 pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
2047 if (pincap & AC_PINCAP_VREF_100)
2048 return AC_PINCTL_VREF_100;
2049 if (pincap & AC_PINCAP_VREF_80)
2050 return AC_PINCTL_VREF_80;
2051 if (pincap & AC_PINCAP_VREF_50)
2052 return AC_PINCTL_VREF_50;
2053 if (pincap & AC_PINCAP_VREF_GRD)
2054 return AC_PINCTL_VREF_GRD;
2055 return 0;
2056}
2057
2058static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
2059
2060{
2061 snd_hda_codec_write_cache(codec, nid, 0,
2062 AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
2063}
2064
2065#define stac92xx_hp_switch_info snd_ctl_boolean_mono_info
2066
2067static int stac92xx_hp_switch_get(struct snd_kcontrol *kcontrol,
2068 struct snd_ctl_elem_value *ucontrol)
2069{
2070 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2071 struct sigmatel_spec *spec = codec->spec;
2072
2073 ucontrol->value.integer.value[0] = spec->hp_switch;
2074 return 0;
2075}
2076
2077static int stac92xx_hp_switch_put(struct snd_kcontrol *kcontrol,
2078 struct snd_ctl_elem_value *ucontrol)
2079{
2080 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2081 struct sigmatel_spec *spec = codec->spec;
2082
2083 spec->hp_switch = ucontrol->value.integer.value[0];
2084
2085
2086
2087
2088 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2089
2090 return 1;
2091}
2092
2093#define stac92xx_io_switch_info snd_ctl_boolean_mono_info
2094
2095static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2096{
2097 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2098 struct sigmatel_spec *spec = codec->spec;
2099 int io_idx = kcontrol-> private_value & 0xff;
2100
2101 ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
2102 return 0;
2103}
2104
2105static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2106{
2107 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2108 struct sigmatel_spec *spec = codec->spec;
2109 hda_nid_t nid = kcontrol->private_value >> 8;
2110 int io_idx = kcontrol-> private_value & 0xff;
2111 unsigned short val = !!ucontrol->value.integer.value[0];
2112
2113 spec->io_switch[io_idx] = val;
2114
2115 if (val)
2116 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2117 else {
2118 unsigned int pinctl = AC_PINCTL_IN_EN;
2119 if (io_idx)
2120 pinctl |= stac92xx_get_vref(codec, nid);
2121 stac92xx_auto_set_pinctl(codec, nid, pinctl);
2122 }
2123
2124
2125
2126
2127 if (spec->hp_detect)
2128 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
2129
2130 return 1;
2131}
2132
2133#define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
2134
2135static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
2136 struct snd_ctl_elem_value *ucontrol)
2137{
2138 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2139 struct sigmatel_spec *spec = codec->spec;
2140
2141 ucontrol->value.integer.value[0] = spec->clfe_swap;
2142 return 0;
2143}
2144
2145static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
2146 struct snd_ctl_elem_value *ucontrol)
2147{
2148 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2149 struct sigmatel_spec *spec = codec->spec;
2150 hda_nid_t nid = kcontrol->private_value & 0xff;
2151 unsigned int val = !!ucontrol->value.integer.value[0];
2152
2153 if (spec->clfe_swap == val)
2154 return 0;
2155
2156 spec->clfe_swap = val;
2157
2158 snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
2159 spec->clfe_swap ? 0x4 : 0x0);
2160
2161 return 1;
2162}
2163
2164#define STAC_CODEC_HP_SWITCH(xname) \
2165 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2166 .name = xname, \
2167 .index = 0, \
2168 .info = stac92xx_hp_switch_info, \
2169 .get = stac92xx_hp_switch_get, \
2170 .put = stac92xx_hp_switch_put, \
2171 }
2172
2173#define STAC_CODEC_IO_SWITCH(xname, xpval) \
2174 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2175 .name = xname, \
2176 .index = 0, \
2177 .info = stac92xx_io_switch_info, \
2178 .get = stac92xx_io_switch_get, \
2179 .put = stac92xx_io_switch_put, \
2180 .private_value = xpval, \
2181 }
2182
2183#define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
2184 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2185 .name = xname, \
2186 .index = 0, \
2187 .info = stac92xx_clfe_switch_info, \
2188 .get = stac92xx_clfe_switch_get, \
2189 .put = stac92xx_clfe_switch_put, \
2190 .private_value = xpval, \
2191 }
2192
2193enum {
2194 STAC_CTL_WIDGET_VOL,
2195 STAC_CTL_WIDGET_MUTE,
2196 STAC_CTL_WIDGET_MONO_MUX,
2197 STAC_CTL_WIDGET_HP_SWITCH,
2198 STAC_CTL_WIDGET_IO_SWITCH,
2199 STAC_CTL_WIDGET_CLFE_SWITCH
2200};
2201
2202static struct snd_kcontrol_new stac92xx_control_templates[] = {
2203 HDA_CODEC_VOLUME(NULL, 0, 0, 0),
2204 HDA_CODEC_MUTE(NULL, 0, 0, 0),
2205 STAC_MONO_MUX,
2206 STAC_CODEC_HP_SWITCH(NULL),
2207 STAC_CODEC_IO_SWITCH(NULL, 0),
2208 STAC_CODEC_CLFE_SWITCH(NULL, 0),
2209};
2210
2211
2212static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
2213{
2214 struct snd_kcontrol_new *knew;
2215
2216 if (spec->num_kctl_used >= spec->num_kctl_alloc) {
2217 int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
2218
2219 knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL);
2220 if (! knew)
2221 return -ENOMEM;
2222 if (spec->kctl_alloc) {
2223 memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
2224 kfree(spec->kctl_alloc);
2225 }
2226 spec->kctl_alloc = knew;
2227 spec->num_kctl_alloc = num;
2228 }
2229
2230 knew = &spec->kctl_alloc[spec->num_kctl_used];
2231 *knew = stac92xx_control_templates[type];
2232 knew->name = kstrdup(name, GFP_KERNEL);
2233 if (! knew->name)
2234 return -ENOMEM;
2235 knew->private_value = val;
2236 spec->num_kctl_used++;
2237 return 0;
2238}
2239
2240
2241static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
2242{
2243 struct sigmatel_spec *spec = codec->spec;
2244 unsigned int wcaps, wtype;
2245 int i, num_dacs = 0;
2246
2247
2248 for (i = 0; i < codec->num_nodes; i++) {
2249 wcaps = codec->wcaps[i];
2250 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2251
2252 if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
2253 num_dacs++;
2254 }
2255
2256 snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
2257
2258 switch (cfg->line_outs) {
2259 case 3:
2260
2261 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
2262 cfg->line_out_pins[cfg->line_outs] =
2263 cfg->input_pins[AUTO_PIN_LINE];
2264 spec->line_switch = 1;
2265 cfg->line_outs++;
2266 }
2267 break;
2268 case 2:
2269
2270 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
2271 cfg->line_out_pins[cfg->line_outs] =
2272 cfg->input_pins[AUTO_PIN_LINE];
2273 spec->line_switch = 1;
2274 cfg->line_outs++;
2275 }
2276 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
2277 cfg->line_out_pins[cfg->line_outs] =
2278 cfg->input_pins[AUTO_PIN_MIC];
2279 spec->mic_switch = 1;
2280 cfg->line_outs++;
2281 }
2282 break;
2283 case 1:
2284
2285 if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
2286 cfg->line_out_pins[cfg->line_outs] =
2287 cfg->input_pins[AUTO_PIN_LINE];
2288 spec->line_switch = 1;
2289 cfg->line_outs++;
2290 }
2291 if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
2292 cfg->line_out_pins[cfg->line_outs] =
2293 cfg->input_pins[AUTO_PIN_MIC];
2294 spec->mic_switch = 1;
2295 cfg->line_outs++;
2296 }
2297 break;
2298 }
2299
2300 return 0;
2301}
2302
2303
2304static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2305{
2306 int i;
2307
2308 for (i = 0; i < spec->multiout.num_dacs; i++) {
2309 if (spec->multiout.dac_nids[i] == nid)
2310 return 1;
2311 }
2312
2313 return 0;
2314}
2315
2316
2317
2318
2319
2320
2321
2322
2323static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
2324 struct auto_pin_cfg *cfg)
2325{
2326 struct sigmatel_spec *spec = codec->spec;
2327 int i, j, conn_len = 0;
2328 hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
2329 unsigned int wcaps, wtype;
2330
2331 for (i = 0; i < cfg->line_outs; i++) {
2332 nid = cfg->line_out_pins[i];
2333 conn_len = snd_hda_get_connections(codec, nid, conn,
2334 HDA_MAX_CONNECTIONS);
2335 for (j = 0; j < conn_len; j++) {
2336 wcaps = snd_hda_param_read(codec, conn[j],
2337 AC_PAR_AUDIO_WIDGET_CAP);
2338 wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
2339 if (wtype != AC_WID_AUD_OUT ||
2340 (wcaps & AC_WCAP_DIGITAL))
2341 continue;
2342
2343 if (!is_in_dac_nids(spec, conn[j]))
2344 break;
2345 }
2346
2347 if (j == conn_len) {
2348 if (spec->multiout.num_dacs > 0) {
2349
2350
2351
2352 cfg->line_outs = spec->multiout.num_dacs;
2353 break;
2354 }
2355
2356 snd_printk(KERN_ERR
2357 "%s: No available DAC for pin 0x%x\n",
2358 __func__, nid);
2359 return -ENODEV;
2360 }
2361
2362 spec->multiout.dac_nids[i] = conn[j];
2363 spec->multiout.num_dacs++;
2364 if (conn_len > 1) {
2365
2366 snd_hda_codec_write_cache(codec, nid, 0,
2367 AC_VERB_SET_CONNECT_SEL, j);
2368
2369 }
2370 }
2371
2372 snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
2373 spec->multiout.num_dacs,
2374 spec->multiout.dac_nids[0],
2375 spec->multiout.dac_nids[1],
2376 spec->multiout.dac_nids[2],
2377 spec->multiout.dac_nids[3],
2378 spec->multiout.dac_nids[4]);
2379 return 0;
2380}
2381
2382
2383static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
2384{
2385 char name[32];
2386 int err;
2387
2388 sprintf(name, "%s Playback Volume", pfx);
2389 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
2390 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2391 if (err < 0)
2392 return err;
2393 sprintf(name, "%s Playback Switch", pfx);
2394 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
2395 HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
2396 if (err < 0)
2397 return err;
2398 return 0;
2399}
2400
2401static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
2402{
2403 if (!spec->multiout.hp_nid)
2404 spec->multiout.hp_nid = nid;
2405 else if (spec->multiout.num_dacs > 4) {
2406 printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
2407 return 1;
2408 } else {
2409 spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
2410 spec->multiout.num_dacs++;
2411 }
2412 return 0;
2413}
2414
2415static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
2416{
2417 if (is_in_dac_nids(spec, nid))
2418 return 1;
2419 if (spec->multiout.hp_nid == nid)
2420 return 1;
2421 return 0;
2422}
2423
2424
2425static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
2426 const struct auto_pin_cfg *cfg)
2427{
2428 static const char *chname[4] = {
2429 "Front", "Surround", NULL /*CLFE*/, "Side"
2430 };
2431 hda_nid_t nid;
2432 int i, err;
2433
2434 struct sigmatel_spec *spec = codec->spec;
2435 unsigned int wid_caps, pincap;
2436
2437
2438 for (i = 0; i < cfg->line_outs && i < spec->multiout.num_dacs; i++) {
2439 if (!spec->multiout.dac_nids[i])
2440 continue;
2441
2442 nid = spec->multiout.dac_nids[i];
2443
2444 if (i == 2) {
2445
2446 err = create_controls(spec, "Center", nid, 1);
2447 if (err < 0)
2448 return err;
2449 err = create_controls(spec, "LFE", nid, 2);
2450 if (err < 0)
2451 return err;
2452
2453 wid_caps = get_wcaps(codec, nid);
2454
2455 if (wid_caps & AC_WCAP_LR_SWAP) {
2456 err = stac92xx_add_control(spec,
2457 STAC_CTL_WIDGET_CLFE_SWITCH,
2458 "Swap Center/LFE Playback Switch", nid);
2459
2460 if (err < 0)
2461 return err;
2462 }
2463
2464 } else {
2465 err = create_controls(spec, chname[i], nid, 3);
2466 if (err < 0)
2467 return err;
2468 }
2469 }
2470
2471 if (cfg->hp_outs > 1) {
2472 err = stac92xx_add_control(spec,
2473 STAC_CTL_WIDGET_HP_SWITCH,
2474 "Headphone as Line Out Switch", 0);
2475 if (err < 0)
2476 return err;
2477 }
2478
2479 if (spec->line_switch) {
2480 nid = cfg->input_pins[AUTO_PIN_LINE];
2481 pincap = snd_hda_param_read(codec, nid,
2482 AC_PAR_PIN_CAP);
2483 if (pincap & AC_PINCAP_OUT) {
2484 err = stac92xx_add_control(spec,
2485 STAC_CTL_WIDGET_IO_SWITCH,
2486 "Line In as Output Switch", nid << 8);
2487 if (err < 0)
2488 return err;
2489 }
2490 }
2491
2492 if (spec->mic_switch) {
2493 unsigned int def_conf;
2494 unsigned int mic_pin = AUTO_PIN_MIC;
2495again:
2496 nid = cfg->input_pins[mic_pin];
2497 def_conf = snd_hda_codec_read(codec, nid, 0,
2498 AC_VERB_GET_CONFIG_DEFAULT, 0);
2499
2500
2501 if (get_defcfg_connect(def_conf) != AC_JACK_PORT_FIXED) {
2502 pincap = snd_hda_param_read(codec, nid,
2503 AC_PAR_PIN_CAP);
2504 if (pincap & AC_PINCAP_OUT) {
2505 err = stac92xx_add_control(spec,
2506 STAC_CTL_WIDGET_IO_SWITCH,
2507 "Mic as Output Switch", (nid << 8) | 1);
2508 nid = snd_hda_codec_read(codec, nid, 0,
2509 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2510 if (!check_in_dac_nids(spec, nid))
2511 add_spec_dacs(spec, nid);
2512 if (err < 0)
2513 return err;
2514 }
2515 } else if (mic_pin == AUTO_PIN_MIC) {
2516 mic_pin = AUTO_PIN_FRONT_MIC;
2517 goto again;
2518 }
2519 }
2520
2521 return 0;
2522}
2523
2524
2525static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
2526 struct auto_pin_cfg *cfg)
2527{
2528 struct sigmatel_spec *spec = codec->spec;
2529 hda_nid_t nid;
2530 int i, old_num_dacs, err;
2531
2532 old_num_dacs = spec->multiout.num_dacs;
2533 for (i = 0; i < cfg->hp_outs; i++) {
2534 unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
2535 if (wid_caps & AC_WCAP_UNSOL_CAP)
2536 spec->hp_detect = 1;
2537 nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
2538 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2539 if (check_in_dac_nids(spec, nid))
2540 nid = 0;
2541 if (! nid)
2542 continue;
2543 add_spec_dacs(spec, nid);
2544 }
2545 for (i = 0; i < cfg->speaker_outs; i++) {
2546 nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
2547 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2548 if (check_in_dac_nids(spec, nid))
2549 nid = 0;
2550 if (! nid)
2551 continue;
2552 add_spec_dacs(spec, nid);
2553 }
2554 for (i = 0; i < cfg->line_outs; i++) {
2555 nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
2556 AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
2557 if (check_in_dac_nids(spec, nid))
2558 nid = 0;
2559 if (! nid)
2560 continue;
2561 add_spec_dacs(spec, nid);
2562 }
2563 for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
2564 static const char *pfxs[] = {
2565 "Speaker", "External Speaker", "Speaker2",
2566 };
2567 err = create_controls(spec, pfxs[i - old_num_dacs],
2568 spec->multiout.dac_nids[i], 3);
2569 if (err < 0)
2570 return err;
2571 }
2572 if (spec->multiout.hp_nid) {
2573 err = create_controls(spec, "Headphone",
2574 spec->multiout.hp_nid, 3);
2575 if (err < 0)
2576 return err;
2577 }
2578
2579 return 0;
2580}
2581
2582
2583static const char *stac92xx_mono_labels[3] = {
2584 "DAC0", "DAC1", "Mixer"
2585};
2586
2587
2588static int stac92xx_auto_create_mono_output_ctls(struct hda_codec *codec)
2589{
2590 struct sigmatel_spec *spec = codec->spec;
2591 struct hda_input_mux *mono_mux = &spec->private_mono_mux;
2592 int i, num_cons;
2593 hda_nid_t con_lst[ARRAY_SIZE(stac92xx_mono_labels)];
2594
2595 num_cons = snd_hda_get_connections(codec,
2596 spec->mono_nid,
2597 con_lst,
2598 HDA_MAX_NUM_INPUTS);
2599 if (!num_cons || num_cons > ARRAY_SIZE(stac92xx_mono_labels))
2600 return -EINVAL;
2601
2602 for (i = 0; i < num_cons; i++) {
2603 mono_mux->items[mono_mux->num_items].label =
2604 stac92xx_mono_labels[i];
2605 mono_mux->items[mono_mux->num_items].index = i;
2606 mono_mux->num_items++;
2607 }
2608
2609 return stac92xx_add_control(spec, STAC_CTL_WIDGET_MONO_MUX,
2610 "Mono Mux", spec->mono_nid);
2611}
2612
2613
2614static const char *stac92xx_dmic_labels[5] = {
2615 "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
2616 "Digital Mic 3", "Digital Mic 4"
2617};
2618
2619
2620static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
2621 const struct auto_pin_cfg *cfg)
2622{
2623 struct sigmatel_spec *spec = codec->spec;
2624 struct hda_input_mux *dimux = &spec->private_dimux;
2625 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2626 int err, i, j;
2627 char name[32];
2628
2629 dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
2630 dimux->items[dimux->num_items].index = 0;
2631 dimux->num_items++;
2632
2633 for (i = 0; i < spec->num_dmics; i++) {
2634 hda_nid_t nid;
2635 int index;
2636 int num_cons;
2637 unsigned int wcaps;
2638 unsigned int def_conf;
2639
2640 def_conf = snd_hda_codec_read(codec,
2641 spec->dmic_nids[i],
2642 0,
2643 AC_VERB_GET_CONFIG_DEFAULT,
2644 0);
2645 if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
2646 continue;
2647
2648 nid = spec->dmic_nids[i];
2649 num_cons = snd_hda_get_connections(codec,
2650 spec->dmux_nids[0],
2651 con_lst,
2652 HDA_MAX_NUM_INPUTS);
2653 for (j = 0; j < num_cons; j++)
2654 if (con_lst[j] == nid) {
2655 index = j;
2656 goto found;
2657 }
2658 continue;
2659found:
2660 wcaps = get_wcaps(codec, nid);
2661
2662 if (wcaps & AC_WCAP_OUT_AMP) {
2663 sprintf(name, "%s Capture Volume",
2664 stac92xx_dmic_labels[dimux->num_items]);
2665
2666 err = stac92xx_add_control(spec,
2667 STAC_CTL_WIDGET_VOL,
2668 name,
2669 HDA_COMPOSE_AMP_VAL(nid, 3, 0, HDA_OUTPUT));
2670 if (err < 0)
2671 return err;
2672 }
2673
2674 dimux->items[dimux->num_items].label =
2675 stac92xx_dmic_labels[dimux->num_items];
2676 dimux->items[dimux->num_items].index = index;
2677 dimux->num_items++;
2678 }
2679
2680 return 0;
2681}
2682
2683
2684static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
2685{
2686 struct sigmatel_spec *spec = codec->spec;
2687 struct hda_input_mux *imux = &spec->private_imux;
2688 hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
2689 int i, j, k;
2690
2691 for (i = 0; i < AUTO_PIN_LAST; i++) {
2692 int index;
2693
2694 if (!cfg->input_pins[i])
2695 continue;
2696 index = -1;
2697 for (j = 0; j < spec->num_muxes; j++) {
2698 int num_cons;
2699 num_cons = snd_hda_get_connections(codec,
2700 spec->mux_nids[j],
2701 con_lst,
2702 HDA_MAX_NUM_INPUTS);
2703 for (k = 0; k < num_cons; k++)
2704 if (con_lst[k] == cfg->input_pins[i]) {
2705 index = k;
2706 goto found;
2707 }
2708 }
2709 continue;
2710 found:
2711 imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
2712 imux->items[imux->num_items].index = index;
2713 imux->num_items++;
2714 }
2715
2716 if (imux->num_items) {
2717
2718
2719
2720
2721
2722 for (i = 0; i < spec->num_muxes; i++) {
2723 snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
2724 AC_VERB_SET_CONNECT_SEL,
2725 imux->items[0].index);
2726 }
2727 }
2728
2729 return 0;
2730}
2731
2732static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
2733{
2734 struct sigmatel_spec *spec = codec->spec;
2735 int i;
2736
2737 for (i = 0; i < spec->autocfg.line_outs; i++) {
2738 hda_nid_t nid = spec->autocfg.line_out_pins[i];
2739 stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
2740 }
2741}
2742
2743static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
2744{
2745 struct sigmatel_spec *spec = codec->spec;
2746 int i;
2747
2748 for (i = 0; i < spec->autocfg.hp_outs; i++) {
2749 hda_nid_t pin;
2750 pin = spec->autocfg.hp_pins[i];
2751 if (pin)
2752 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
2753 }
2754 for (i = 0; i < spec->autocfg.speaker_outs; i++) {
2755 hda_nid_t pin;
2756 pin = spec->autocfg.speaker_pins[i];
2757 if (pin)
2758 stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
2759 }
2760}
2761
2762static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
2763{
2764 struct sigmatel_spec *spec = codec->spec;
2765 int err;
2766 int hp_speaker_swap = 0;
2767
2768 if ((err = snd_hda_parse_pin_def_config(codec,
2769 &spec->autocfg,
2770 spec->dmic_nids)) < 0)
2771 return err;
2772 if (! spec->autocfg.line_outs)
2773 return 0;
2774
2775
2776
2777
2778 if (spec->autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT &&
2779 spec->autocfg.hp_outs > 1) {
2780
2781
2782
2783
2784 memcpy(spec->autocfg.speaker_pins, spec->autocfg.line_out_pins,
2785 sizeof(spec->autocfg.line_out_pins));
2786 spec->autocfg.speaker_outs = spec->autocfg.line_outs;
2787 memcpy(spec->autocfg.line_out_pins, spec->autocfg.hp_pins,
2788 sizeof(spec->autocfg.hp_pins));
2789 spec->autocfg.line_outs = spec->autocfg.hp_outs;
2790 hp_speaker_swap = 1;
2791 }
2792 if (spec->autocfg.mono_out_pin) {
2793 int dir = (get_wcaps(codec, spec->autocfg.mono_out_pin)
2794 & AC_WCAP_OUT_AMP) ? HDA_OUTPUT : HDA_INPUT;
2795 u32 caps = query_amp_caps(codec,
2796 spec->autocfg.mono_out_pin, dir);
2797 hda_nid_t conn_list[1];
2798
2799
2800 if (snd_hda_get_connections(codec,
2801 spec->autocfg.mono_out_pin, conn_list, 1) &&
2802 snd_hda_get_connections(codec, conn_list[0],
2803 conn_list, 1)) {
2804
2805 int wcaps = get_wcaps(codec, conn_list[0]);
2806 int wid_type = (wcaps & AC_WCAP_TYPE)
2807 >> AC_WCAP_TYPE_SHIFT;
2808
2809
2810
2811
2812 if (wid_type == AC_WID_AUD_SEL &&
2813 !(wcaps & AC_WCAP_LR_SWAP))
2814 spec->mono_nid = conn_list[0];
2815 }
2816
2817 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE,
2818 "Mono Playback Switch",
2819 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2820 1, 0, dir));
2821 if (err < 0)
2822 return err;
2823
2824 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
2825 err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL,
2826 "Mono Playback Volume",
2827 HDA_COMPOSE_AMP_VAL(spec->autocfg.mono_out_pin,
2828 1, 0, dir));
2829 if (err < 0)
2830 return err;
2831 }
2832
2833 stac92xx_auto_set_pinctl(codec, spec->autocfg.mono_out_pin,
2834 AC_PINCTL_OUT_EN);
2835 }
2836
2837 if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
2838 return err;
2839 if (spec->multiout.num_dacs == 0)
2840 if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
2841 return err;
2842
2843 err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
2844
2845 if (err < 0)
2846 return err;
2847
2848 if (hp_speaker_swap == 1) {
2849
2850 memcpy(spec->autocfg.hp_pins, spec->autocfg.line_out_pins,
2851 sizeof(spec->autocfg.line_out_pins));
2852 spec->autocfg.hp_outs = spec->autocfg.line_outs;
2853 memcpy(spec->autocfg.line_out_pins, spec->autocfg.speaker_pins,
2854 sizeof(spec->autocfg.speaker_pins));
2855 spec->autocfg.line_outs = spec->autocfg.speaker_outs;
2856 memset(spec->autocfg.speaker_pins, 0,
2857 sizeof(spec->autocfg.speaker_pins));
2858 spec->autocfg.speaker_outs = 0;
2859 }
2860
2861 err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
2862
2863 if (err < 0)
2864 return err;
2865
2866 err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
2867
2868 if (err < 0)
2869 return err;
2870
2871 if (spec->mono_nid > 0) {
2872 err = stac92xx_auto_create_mono_output_ctls(codec);
2873 if (err < 0)
2874 return err;
2875 }
2876
2877 if (spec->num_dmics > 0)
2878 if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
2879 &spec->autocfg)) < 0)
2880 return err;
2881
2882 spec->multiout.max_channels = spec->multiout.num_dacs * 2;
2883 if (spec->multiout.max_channels > 2)
2884 spec->surr_switch = 1;
2885
2886 if (spec->autocfg.dig_out_pin)
2887 spec->multiout.dig_out_nid = dig_out;
2888 if (spec->autocfg.dig_in_pin)
2889 spec->dig_in_nid = dig_in;
2890
2891 if (spec->kctl_alloc)
2892 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2893
2894 spec->input_mux = &spec->private_imux;
2895 if (!spec->dinput_mux)
2896 spec->dinput_mux = &spec->private_dimux;
2897 spec->mono_mux = &spec->private_mono_mux;
2898
2899 return 1;
2900}
2901
2902
2903static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
2904 struct auto_pin_cfg *cfg)
2905{
2906 struct sigmatel_spec *spec = codec->spec;
2907 hda_nid_t pin = cfg->hp_pins[0];
2908 unsigned int wid_caps;
2909
2910 if (! pin)
2911 return 0;
2912
2913 wid_caps = get_wcaps(codec, pin);
2914 if (wid_caps & AC_WCAP_UNSOL_CAP)
2915 spec->hp_detect = 1;
2916
2917 return 0;
2918}
2919
2920
2921static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
2922 struct auto_pin_cfg *cfg)
2923{
2924 struct sigmatel_spec *spec = codec->spec;
2925 int err;
2926 hda_nid_t lfe_pin = 0x0;
2927 int i;
2928
2929
2930
2931
2932
2933
2934 for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
2935 hda_nid_t pin = spec->autocfg.speaker_pins[i];
2936 unsigned int wcaps = get_wcaps(codec, pin);
2937 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2938 if (wcaps == AC_WCAP_OUT_AMP)
2939
2940 lfe_pin = pin;
2941 }
2942
2943
2944 if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
2945 for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
2946 hda_nid_t pin = spec->autocfg.line_out_pins[i];
2947 unsigned int defcfg;
2948 defcfg = snd_hda_codec_read(codec, pin, 0,
2949 AC_VERB_GET_CONFIG_DEFAULT,
2950 0x00);
2951 if (get_defcfg_device(defcfg) == AC_JACK_SPEAKER) {
2952 unsigned int wcaps = get_wcaps(codec, pin);
2953 wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
2954 if (wcaps == AC_WCAP_OUT_AMP)
2955
2956
2957 lfe_pin = pin;
2958 }
2959 }
2960 }
2961
2962 if (lfe_pin) {
2963 err = create_controls(spec, "LFE", lfe_pin, 1);
2964 if (err < 0)
2965 return err;
2966 }
2967
2968 return 0;
2969}
2970
2971static int stac9200_parse_auto_config(struct hda_codec *codec)
2972{
2973 struct sigmatel_spec *spec = codec->spec;
2974 int err;
2975
2976 if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
2977 return err;
2978
2979 if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
2980 return err;
2981
2982 if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
2983 return err;
2984
2985 if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
2986 return err;
2987
2988 if (spec->autocfg.dig_out_pin)
2989 spec->multiout.dig_out_nid = 0x05;
2990 if (spec->autocfg.dig_in_pin)
2991 spec->dig_in_nid = 0x04;
2992
2993 if (spec->kctl_alloc)
2994 spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
2995
2996 spec->input_mux = &spec->private_imux;
2997 spec->dinput_mux = &spec->private_dimux;
2998
2999 return 1;
3000}
3001
3002
3003
3004
3005
3006
3007static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
3008 unsigned int dir_mask, unsigned int data)
3009{
3010 unsigned int gpiostate, gpiomask, gpiodir;
3011
3012 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
3013 AC_VERB_GET_GPIO_DATA, 0);
3014 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
3015
3016 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
3017 AC_VERB_GET_GPIO_MASK, 0);
3018 gpiomask |= mask;
3019
3020 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
3021 AC_VERB_GET_GPIO_DIRECTION, 0);
3022 gpiodir |= dir_mask;
3023
3024
3025 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
3026
3027 snd_hda_codec_write(codec, codec->afg, 0,
3028 AC_VERB_SET_GPIO_MASK, gpiomask);
3029 snd_hda_codec_read(codec, codec->afg, 0,
3030 AC_VERB_SET_GPIO_DIRECTION, gpiodir);
3031
3032 msleep(1);
3033
3034 snd_hda_codec_read(codec, codec->afg, 0,
3035 AC_VERB_SET_GPIO_DATA, gpiostate);
3036}
3037
3038static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
3039 unsigned int event)
3040{
3041 if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
3042 snd_hda_codec_write_cache(codec, nid, 0,
3043 AC_VERB_SET_UNSOLICITED_ENABLE,
3044 (AC_USRSP_EN | event));
3045}
3046
3047static int is_nid_hp_pin(struct auto_pin_cfg *cfg, hda_nid_t nid)
3048{
3049 int i;
3050 for (i = 0; i < cfg->hp_outs; i++)
3051 if (cfg->hp_pins[i] == nid)
3052 return 1;
3053
3054 return 0;
3055};
3056
3057static void stac92xx_power_down(struct hda_codec *codec)
3058{
3059 struct sigmatel_spec *spec = codec->spec;
3060
3061
3062 hda_nid_t *dac;
3063 for (dac = spec->dac_list; *dac; dac++)
3064 if (!is_in_dac_nids(spec, *dac) &&
3065 spec->multiout.hp_nid != *dac)
3066 snd_hda_codec_write_cache(codec, *dac, 0,
3067 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
3068}
3069
3070static int stac92xx_init(struct hda_codec *codec)
3071{
3072 struct sigmatel_spec *spec = codec->spec;
3073 struct auto_pin_cfg *cfg = &spec->autocfg;
3074 int i;
3075
3076 snd_hda_sequence_write(codec, spec->init);
3077
3078
3079 if (spec->hp_detect) {
3080
3081 for (i = 0; i < cfg->hp_outs; i++)
3082 enable_pin_detect(codec, cfg->hp_pins[i],
3083 STAC_HP_EVENT);
3084
3085
3086
3087 stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
3088 AC_PINCTL_OUT_EN);
3089 stac92xx_auto_init_hp_out(codec);
3090
3091 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3092 } else {
3093 stac92xx_auto_init_multi_out(codec);
3094 stac92xx_auto_init_hp_out(codec);
3095 }
3096 for (i = 0; i < AUTO_PIN_LAST; i++) {
3097 hda_nid_t nid = cfg->input_pins[i];
3098 if (nid) {
3099 unsigned int pinctl = AC_PINCTL_IN_EN;
3100 if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
3101 pinctl |= stac92xx_get_vref(codec, nid);
3102 stac92xx_auto_set_pinctl(codec, nid, pinctl);
3103 }
3104 }
3105 for (i = 0; i < spec->num_dmics; i++)
3106 stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
3107 AC_PINCTL_IN_EN);
3108 for (i = 0; i < spec->num_pwrs; i++) {
3109 int event = is_nid_hp_pin(cfg, spec->pwr_nids[i])
3110 ? STAC_HP_EVENT : STAC_PWR_EVENT;
3111 int pinctl = snd_hda_codec_read(codec, spec->pwr_nids[i],
3112 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3113 int def_conf = snd_hda_codec_read(codec, spec->pwr_nids[i],
3114 0, AC_VERB_GET_CONFIG_DEFAULT, 0);
3115 def_conf = get_defcfg_connect(def_conf);
3116
3117
3118
3119
3120 if (pinctl & AC_PINCTL_IN_EN)
3121 continue;
3122
3123
3124 if (def_conf && def_conf != AC_JACK_PORT_FIXED)
3125 continue;
3126 enable_pin_detect(codec, spec->pwr_nids[i], event | i);
3127 codec->patch_ops.unsol_event(codec, (event | i) << 26);
3128 }
3129 if (spec->dac_list)
3130 stac92xx_power_down(codec);
3131 if (cfg->dig_out_pin)
3132 stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
3133 AC_PINCTL_OUT_EN);
3134 if (cfg->dig_in_pin)
3135 stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
3136 AC_PINCTL_IN_EN);
3137
3138 stac_gpio_set(codec, spec->gpio_mask,
3139 spec->gpio_dir, spec->gpio_data);
3140
3141 return 0;
3142}
3143
3144static void stac92xx_free(struct hda_codec *codec)
3145{
3146 struct sigmatel_spec *spec = codec->spec;
3147 int i;
3148
3149 if (! spec)
3150 return;
3151
3152 if (spec->kctl_alloc) {
3153 for (i = 0; i < spec->num_kctl_used; i++)
3154 kfree(spec->kctl_alloc[i].name);
3155 kfree(spec->kctl_alloc);
3156 }
3157
3158 if (spec->bios_pin_configs)
3159 kfree(spec->bios_pin_configs);
3160
3161 kfree(spec);
3162}
3163
3164static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
3165 unsigned int flag)
3166{
3167 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3168 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
3169
3170 if (pin_ctl & AC_PINCTL_IN_EN) {
3171
3172
3173
3174
3175
3176 struct sigmatel_spec *spec = codec->spec;
3177 struct auto_pin_cfg *cfg = &spec->autocfg;
3178 if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
3179 spec->line_switch) ||
3180 (nid == cfg->input_pins[AUTO_PIN_MIC] &&
3181 spec->mic_switch))
3182 return;
3183 }
3184
3185
3186
3187 if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
3188 pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
3189
3190 snd_hda_codec_write_cache(codec, nid, 0,
3191 AC_VERB_SET_PIN_WIDGET_CONTROL,
3192 pin_ctl | flag);
3193}
3194
3195static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
3196 unsigned int flag)
3197{
3198 unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
3199 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
3200 snd_hda_codec_write_cache(codec, nid, 0,
3201 AC_VERB_SET_PIN_WIDGET_CONTROL,
3202 pin_ctl & ~flag);
3203}
3204
3205static int get_hp_pin_presence(struct hda_codec *codec, hda_nid_t nid)
3206{
3207 if (!nid)
3208 return 0;
3209 if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
3210 & (1 << 31)) {
3211 unsigned int pinctl;
3212 pinctl = snd_hda_codec_read(codec, nid, 0,
3213 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
3214 if (pinctl & AC_PINCTL_IN_EN)
3215 return 0;
3216 else
3217 return 1;
3218 }
3219 return 0;
3220}
3221
3222static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
3223{
3224 struct sigmatel_spec *spec = codec->spec;
3225 struct auto_pin_cfg *cfg = &spec->autocfg;
3226 int nid = cfg->hp_pins[cfg->hp_outs - 1];
3227 int i, presence;
3228
3229 presence = 0;
3230 if (spec->gpio_mute)
3231 presence = !(snd_hda_codec_read(codec, codec->afg, 0,
3232 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
3233
3234 for (i = 0; i < cfg->hp_outs; i++) {
3235 if (presence)
3236 break;
3237 if (spec->hp_switch && cfg->hp_pins[i] == nid)
3238 break;
3239 presence = get_hp_pin_presence(codec, cfg->hp_pins[i]);
3240 }
3241
3242 if (presence) {
3243
3244 if (spec->hp_switch)
3245 stac92xx_reset_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3246 for (i = 0; i < cfg->line_outs; i++)
3247 stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
3248 AC_PINCTL_OUT_EN);
3249 for (i = 0; i < cfg->speaker_outs; i++)
3250 stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
3251 AC_PINCTL_OUT_EN);
3252 if (spec->eapd_mask)
3253 stac_gpio_set(codec, spec->gpio_mask,
3254 spec->gpio_dir, spec->gpio_data &
3255 ~spec->eapd_mask);
3256 } else {
3257
3258 if (spec->hp_switch)
3259 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3260 for (i = 0; i < cfg->line_outs; i++)
3261 stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
3262 AC_PINCTL_OUT_EN);
3263 for (i = 0; i < cfg->speaker_outs; i++)
3264 stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
3265 AC_PINCTL_OUT_EN);
3266 if (spec->eapd_mask)
3267 stac_gpio_set(codec, spec->gpio_mask,
3268 spec->gpio_dir, spec->gpio_data |
3269 spec->eapd_mask);
3270 }
3271 if (!spec->hp_switch && cfg->hp_outs > 1 && presence)
3272 stac92xx_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
3273}
3274
3275static void stac92xx_pin_sense(struct hda_codec *codec, int idx)
3276{
3277 struct sigmatel_spec *spec = codec->spec;
3278 hda_nid_t nid = spec->pwr_nids[idx];
3279 int presence, val;
3280 val = snd_hda_codec_read(codec, codec->afg, 0, 0x0fec, 0x0)
3281 & 0x000000ff;
3282 presence = get_hp_pin_presence(codec, nid);
3283 idx = 1 << idx;
3284
3285 if (presence)
3286 val &= ~idx;
3287 else
3288 val |= idx;
3289
3290
3291 snd_hda_codec_write(codec, codec->afg, 0, 0x7ec, val);
3292};
3293
3294static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
3295{
3296 struct sigmatel_spec *spec = codec->spec;
3297 int idx = res >> 26 & 0x0f;
3298
3299 switch ((res >> 26) & 0x30) {
3300 case STAC_HP_EVENT:
3301 stac92xx_hp_detect(codec, res);
3302
3303 case STAC_PWR_EVENT:
3304 if (spec->num_pwrs > 0)
3305 stac92xx_pin_sense(codec, idx);
3306 }
3307}
3308
3309#ifdef SND_HDA_NEEDS_RESUME
3310static int stac92xx_resume(struct hda_codec *codec)
3311{
3312 struct sigmatel_spec *spec = codec->spec;
3313
3314 stac92xx_set_config_regs(codec);
3315 snd_hda_sequence_write(codec, spec->init);
3316 stac_gpio_set(codec, spec->gpio_mask,
3317 spec->gpio_dir, spec->gpio_data);
3318 snd_hda_codec_resume_amp(codec);
3319 snd_hda_codec_resume_cache(codec);
3320
3321 if (spec->dac_list)
3322 stac92xx_power_down(codec);
3323
3324 if (spec->hp_detect)
3325 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
3326 return 0;
3327}
3328#endif
3329
3330static struct hda_codec_ops stac92xx_patch_ops = {
3331 .build_controls = stac92xx_build_controls,
3332 .build_pcms = stac92xx_build_pcms,
3333 .init = stac92xx_init,
3334 .free = stac92xx_free,
3335 .unsol_event = stac92xx_unsol_event,
3336#ifdef SND_HDA_NEEDS_RESUME
3337 .resume = stac92xx_resume,
3338#endif
3339};
3340
3341static int patch_stac9200(struct hda_codec *codec)
3342{
3343 struct sigmatel_spec *spec;
3344 int err;
3345
3346 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3347 if (spec == NULL)
3348 return -ENOMEM;
3349
3350 codec->spec = spec;
3351 spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
3352 spec->pin_nids = stac9200_pin_nids;
3353 spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
3354 stac9200_models,
3355 stac9200_cfg_tbl);
3356 if (spec->board_config < 0) {
3357 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
3358 err = stac92xx_save_bios_config_regs(codec);
3359 if (err < 0) {
3360 stac92xx_free(codec);
3361 return err;
3362 }
3363 spec->pin_configs = spec->bios_pin_configs;
3364 } else {
3365 spec->pin_configs = stac9200_brd_tbl[spec->board_config];
3366 stac92xx_set_config_regs(codec);
3367 }
3368
3369 spec->multiout.max_channels = 2;
3370 spec->multiout.num_dacs = 1;
3371 spec->multiout.dac_nids = stac9200_dac_nids;
3372 spec->adc_nids = stac9200_adc_nids;
3373 spec->mux_nids = stac9200_mux_nids;
3374 spec->num_muxes = 1;
3375 spec->num_dmics = 0;
3376 spec->num_adcs = 1;
3377 spec->num_pwrs = 0;
3378
3379 if (spec->board_config == STAC_9200_GATEWAY ||
3380 spec->board_config == STAC_9200_OQO)
3381 spec->init = stac9200_eapd_init;
3382 else
3383 spec->init = stac9200_core_init;
3384 spec->mixer = stac9200_mixer;
3385
3386 if (spec->board_config == STAC_9200_PANASONIC) {
3387 spec->gpio_mask = spec->gpio_dir = 0x09;
3388 spec->gpio_data = 0x00;
3389 }
3390
3391 err = stac9200_parse_auto_config(codec);
3392 if (err < 0) {
3393 stac92xx_free(codec);
3394 return err;
3395 }
3396
3397 codec->patch_ops = stac92xx_patch_ops;
3398
3399 return 0;
3400}
3401
3402static int patch_stac925x(struct hda_codec *codec)
3403{
3404 struct sigmatel_spec *spec;
3405 int err;
3406
3407 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3408 if (spec == NULL)
3409 return -ENOMEM;
3410
3411 codec->spec = spec;
3412 spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
3413 spec->pin_nids = stac925x_pin_nids;
3414 spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
3415 stac925x_models,
3416 stac925x_cfg_tbl);
3417 again:
3418 if (spec->board_config < 0) {
3419 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
3420 "using BIOS defaults\n");
3421 err = stac92xx_save_bios_config_regs(codec);
3422 if (err < 0) {
3423 stac92xx_free(codec);
3424 return err;
3425 }
3426 spec->pin_configs = spec->bios_pin_configs;
3427 } else if (stac925x_brd_tbl[spec->board_config] != NULL){
3428 spec->pin_configs = stac925x_brd_tbl[spec->board_config];
3429 stac92xx_set_config_regs(codec);
3430 }
3431
3432 spec->multiout.max_channels = 2;
3433 spec->multiout.num_dacs = 1;
3434 spec->multiout.dac_nids = stac925x_dac_nids;
3435 spec->adc_nids = stac925x_adc_nids;
3436 spec->mux_nids = stac925x_mux_nids;
3437 spec->num_muxes = 1;
3438 spec->num_adcs = 1;
3439 spec->num_pwrs = 0;
3440 switch (codec->vendor_id) {
3441 case 0x83847632:
3442 case 0x83847633:
3443 case 0x83847636:
3444 case 0x83847637:
3445 spec->num_dmics = STAC925X_NUM_DMICS;
3446 spec->dmic_nids = stac925x_dmic_nids;
3447 spec->num_dmuxes = ARRAY_SIZE(stac925x_dmux_nids);
3448 spec->dmux_nids = stac925x_dmux_nids;
3449 break;
3450 default:
3451 spec->num_dmics = 0;
3452 break;
3453 }
3454
3455 spec->init = stac925x_core_init;
3456 spec->mixer = stac925x_mixer;
3457
3458 err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
3459 if (!err) {
3460 if (spec->board_config < 0) {
3461 printk(KERN_WARNING "hda_codec: No auto-config is "
3462 "available, default to model=ref\n");
3463 spec->board_config = STAC_925x_REF;
3464 goto again;
3465 }
3466 err = -EINVAL;
3467 }
3468 if (err < 0) {
3469 stac92xx_free(codec);
3470 return err;
3471 }
3472
3473 codec->patch_ops = stac92xx_patch_ops;
3474
3475 return 0;
3476}
3477
3478static struct hda_input_mux stac92hd73xx_dmux = {
3479 .num_items = 4,
3480 .items = {
3481 { "Analog Inputs", 0x0b },
3482 { "CD", 0x08 },
3483 { "Digital Mic 1", 0x09 },
3484 { "Digital Mic 2", 0x0a },
3485 }
3486};
3487
3488static int patch_stac92hd73xx(struct hda_codec *codec)
3489{
3490 struct sigmatel_spec *spec;
3491 hda_nid_t conn[STAC92HD73_DAC_COUNT + 2];
3492 int err = 0;
3493
3494 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3495 if (spec == NULL)
3496 return -ENOMEM;
3497
3498 codec->spec = spec;
3499 spec->num_pins = ARRAY_SIZE(stac92hd73xx_pin_nids);
3500 spec->pin_nids = stac92hd73xx_pin_nids;
3501 spec->board_config = snd_hda_check_board_config(codec,
3502 STAC_92HD73XX_MODELS,
3503 stac92hd73xx_models,
3504 stac92hd73xx_cfg_tbl);
3505again:
3506 if (spec->board_config < 0) {
3507 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3508 " STAC92HD73XX, using BIOS defaults\n");
3509 err = stac92xx_save_bios_config_regs(codec);
3510 if (err < 0) {
3511 stac92xx_free(codec);
3512 return err;
3513 }
3514 spec->pin_configs = spec->bios_pin_configs;
3515 } else {
3516 spec->pin_configs = stac92hd73xx_brd_tbl[spec->board_config];
3517 stac92xx_set_config_regs(codec);
3518 }
3519
3520 spec->multiout.num_dacs = snd_hda_get_connections(codec, 0x0a,
3521 conn, STAC92HD73_DAC_COUNT + 2) - 1;
3522
3523 if (spec->multiout.num_dacs < 0) {
3524 printk(KERN_WARNING "hda_codec: Could not determine "
3525 "number of channels defaulting to DAC count\n");
3526 spec->multiout.num_dacs = STAC92HD73_DAC_COUNT;
3527 }
3528
3529 switch (spec->multiout.num_dacs) {
3530 case 0x3:
3531 spec->multiout.hp_nid = 0x17;
3532 spec->mixer = stac92hd73xx_6ch_mixer;
3533 spec->init = stac92hd73xx_6ch_core_init;
3534 break;
3535 case 0x4:
3536 spec->multiout.hp_nid = 0x18;
3537 spec->mixer = stac92hd73xx_8ch_mixer;
3538 spec->init = stac92hd73xx_8ch_core_init;
3539 break;
3540 case 0x5:
3541 spec->multiout.hp_nid = 0x19;
3542 spec->mixer = stac92hd73xx_10ch_mixer;
3543 spec->init = stac92hd73xx_10ch_core_init;
3544 };
3545
3546 spec->multiout.dac_nids = stac92hd73xx_dac_nids;
3547 spec->aloopback_mask = 0x01;
3548 spec->aloopback_shift = 8;
3549
3550 spec->mux_nids = stac92hd73xx_mux_nids;
3551 spec->adc_nids = stac92hd73xx_adc_nids;
3552 spec->dmic_nids = stac92hd73xx_dmic_nids;
3553 spec->dmux_nids = stac92hd73xx_dmux_nids;
3554
3555 spec->num_muxes = ARRAY_SIZE(stac92hd73xx_mux_nids);
3556 spec->num_adcs = ARRAY_SIZE(stac92hd73xx_adc_nids);
3557 spec->num_dmuxes = ARRAY_SIZE(stac92hd73xx_dmux_nids);
3558 spec->dinput_mux = &stac92hd73xx_dmux;
3559
3560 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3561 spec->gpio_data = 0x01;
3562
3563 switch (spec->board_config) {
3564 case STAC_DELL_EQ:
3565 spec->init = dell_eq_core_init;
3566
3567 case STAC_DELL_M6:
3568 if (!spec->init)
3569 spec->init = dell_m6_core_init;
3570 switch (codec->subsystem_id) {
3571 case 0x1028025e:
3572 case 0x1028025f:
3573 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3574 spec->num_dmics = 0;
3575 break;
3576 case 0x10280271:
3577 case 0x10280272:
3578 case 0x10280254:
3579 case 0x10280255:
3580 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3581 spec->num_dmics = 1;
3582 break;
3583 case 0x10280256:
3584 case 0x10280057:
3585 stac92xx_set_config_reg(codec, 0x0b, 0x90A70170);
3586 stac92xx_set_config_reg(codec, 0x13, 0x90A60160);
3587 spec->num_dmics = 1;
3588 break;
3589 }
3590 break;
3591 default:
3592 spec->num_dmics = STAC92HD73XX_NUM_DMICS;
3593 }
3594
3595 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3596 spec->pwr_nids = stac92hd73xx_pwr_nids;
3597
3598 err = stac92xx_parse_auto_config(codec, 0x22, 0x24);
3599
3600 if (!err) {
3601 if (spec->board_config < 0) {
3602 printk(KERN_WARNING "hda_codec: No auto-config is "
3603 "available, default to model=ref\n");
3604 spec->board_config = STAC_92HD73XX_REF;
3605 goto again;
3606 }
3607 err = -EINVAL;
3608 }
3609
3610 if (err < 0) {
3611 stac92xx_free(codec);
3612 return err;
3613 }
3614
3615 codec->patch_ops = stac92xx_patch_ops;
3616
3617 return 0;
3618}
3619
3620static int patch_stac92hd71bxx(struct hda_codec *codec)
3621{
3622 struct sigmatel_spec *spec;
3623 int err = 0;
3624
3625 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3626 if (spec == NULL)
3627 return -ENOMEM;
3628
3629 codec->spec = spec;
3630 spec->num_pins = ARRAY_SIZE(stac92hd71bxx_pin_nids);
3631 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3632 spec->pin_nids = stac92hd71bxx_pin_nids;
3633 spec->board_config = snd_hda_check_board_config(codec,
3634 STAC_92HD71BXX_MODELS,
3635 stac92hd71bxx_models,
3636 stac92hd71bxx_cfg_tbl);
3637again:
3638 if (spec->board_config < 0) {
3639 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3640 " STAC92HD71BXX, using BIOS defaults\n");
3641 err = stac92xx_save_bios_config_regs(codec);
3642 if (err < 0) {
3643 stac92xx_free(codec);
3644 return err;
3645 }
3646 spec->pin_configs = spec->bios_pin_configs;
3647 } else {
3648 spec->pin_configs = stac92hd71bxx_brd_tbl[spec->board_config];
3649 stac92xx_set_config_regs(codec);
3650 }
3651
3652 switch (codec->vendor_id) {
3653 case 0x111d76b6:
3654 case 0x111d76b7:
3655 case 0x111d76b4:
3656 case 0x111d76b5:
3657 spec->mixer = stac92hd71bxx_mixer;
3658 spec->init = stac92hd71bxx_core_init;
3659 break;
3660 case 0x111d7608:
3661
3662 spec->num_pwrs = 0;
3663 spec->mixer = stac92hd71bxx_analog_mixer;
3664
3665
3666 spec->init = &stac92hd71bxx_analog_core_init[HD_DISABLE_PORTF];
3667 stac92xx_set_config_reg(codec, 0xf, 0x40f000f0);
3668 break;
3669 case 0x111d7603:
3670
3671 spec->num_pwrs = 0;
3672
3673 default:
3674 spec->mixer = stac92hd71bxx_analog_mixer;
3675 spec->init = stac92hd71bxx_analog_core_init;
3676 }
3677
3678 spec->aloopback_mask = 0x20;
3679 spec->aloopback_shift = 0;
3680
3681
3682 spec->gpio_mask = 0x01;
3683 spec->gpio_dir = 0x01;
3684 spec->gpio_data = 0x01;
3685
3686 spec->mux_nids = stac92hd71bxx_mux_nids;
3687 spec->adc_nids = stac92hd71bxx_adc_nids;
3688 spec->dmic_nids = stac92hd71bxx_dmic_nids;
3689 spec->dmux_nids = stac92hd71bxx_dmux_nids;
3690 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3691
3692 spec->num_muxes = ARRAY_SIZE(stac92hd71bxx_mux_nids);
3693 spec->num_adcs = ARRAY_SIZE(stac92hd71bxx_adc_nids);
3694 spec->num_dmics = STAC92HD71BXX_NUM_DMICS;
3695 spec->num_dmuxes = ARRAY_SIZE(stac92hd71bxx_dmux_nids);
3696
3697 spec->multiout.num_dacs = 1;
3698 spec->multiout.hp_nid = 0x11;
3699 spec->multiout.dac_nids = stac92hd71bxx_dac_nids;
3700
3701 err = stac92xx_parse_auto_config(codec, 0x21, 0x23);
3702 if (!err) {
3703 if (spec->board_config < 0) {
3704 printk(KERN_WARNING "hda_codec: No auto-config is "
3705 "available, default to model=ref\n");
3706 spec->board_config = STAC_92HD71BXX_REF;
3707 goto again;
3708 }
3709 err = -EINVAL;
3710 }
3711
3712 if (err < 0) {
3713 stac92xx_free(codec);
3714 return err;
3715 }
3716
3717 codec->patch_ops = stac92xx_patch_ops;
3718
3719 return 0;
3720};
3721
3722static int patch_stac922x(struct hda_codec *codec)
3723{
3724 struct sigmatel_spec *spec;
3725 int err;
3726
3727 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3728 if (spec == NULL)
3729 return -ENOMEM;
3730
3731 codec->spec = spec;
3732 spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
3733 spec->pin_nids = stac922x_pin_nids;
3734 spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
3735 stac922x_models,
3736 stac922x_cfg_tbl);
3737 if (spec->board_config == STAC_INTEL_MAC_AUTO) {
3738 spec->gpio_mask = spec->gpio_dir = 0x03;
3739 spec->gpio_data = 0x03;
3740
3741
3742
3743 printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
3744 switch (codec->subsystem_id) {
3745
3746 case 0x106b0800:
3747 spec->board_config = STAC_INTEL_MAC_V1;
3748 break;
3749 case 0x106b0600:
3750 case 0x106b0700:
3751 spec->board_config = STAC_INTEL_MAC_V2;
3752 break;
3753 case 0x106b0e00:
3754 case 0x106b0f00:
3755 case 0x106b1600:
3756 case 0x106b1700:
3757 case 0x106b0200:
3758 case 0x106b1e00:
3759 spec->board_config = STAC_INTEL_MAC_V3;
3760 break;
3761 case 0x106b1a00:
3762 case 0x00000100:
3763 spec->board_config = STAC_INTEL_MAC_V4;
3764 break;
3765 case 0x106b0a00:
3766 case 0x106b2200:
3767 spec->board_config = STAC_INTEL_MAC_V5;
3768 break;
3769 default:
3770 spec->board_config = STAC_INTEL_MAC_V3;
3771 break;
3772 }
3773 }
3774
3775 again:
3776 if (spec->board_config < 0) {
3777 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
3778 "using BIOS defaults\n");
3779 err = stac92xx_save_bios_config_regs(codec);
3780 if (err < 0) {
3781 stac92xx_free(codec);
3782 return err;
3783 }
3784 spec->pin_configs = spec->bios_pin_configs;
3785 } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
3786 spec->pin_configs = stac922x_brd_tbl[spec->board_config];
3787 stac92xx_set_config_regs(codec);
3788 }
3789
3790 spec->adc_nids = stac922x_adc_nids;
3791 spec->mux_nids = stac922x_mux_nids;
3792 spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
3793 spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
3794 spec->num_dmics = 0;
3795 spec->num_pwrs = 0;
3796
3797 spec->init = stac922x_core_init;
3798 spec->mixer = stac922x_mixer;
3799
3800 spec->multiout.dac_nids = spec->dac_nids;
3801
3802 err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
3803 if (!err) {
3804 if (spec->board_config < 0) {
3805 printk(KERN_WARNING "hda_codec: No auto-config is "
3806 "available, default to model=ref\n");
3807 spec->board_config = STAC_D945_REF;
3808 goto again;
3809 }
3810 err = -EINVAL;
3811 }
3812 if (err < 0) {
3813 stac92xx_free(codec);
3814 return err;
3815 }
3816
3817 codec->patch_ops = stac92xx_patch_ops;
3818
3819
3820 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3821 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3822 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3823 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3824 (0 << AC_AMPCAP_MUTE_SHIFT));
3825
3826 return 0;
3827}
3828
3829static int patch_stac927x(struct hda_codec *codec)
3830{
3831 struct sigmatel_spec *spec;
3832 int err;
3833
3834 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3835 if (spec == NULL)
3836 return -ENOMEM;
3837
3838 codec->spec = spec;
3839 spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
3840 spec->pin_nids = stac927x_pin_nids;
3841 spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
3842 stac927x_models,
3843 stac927x_cfg_tbl);
3844 again:
3845 if (spec->board_config < 0 || !stac927x_brd_tbl[spec->board_config]) {
3846 if (spec->board_config < 0)
3847 snd_printdd(KERN_INFO "hda_codec: Unknown model for"
3848 "STAC927x, using BIOS defaults\n");
3849 err = stac92xx_save_bios_config_regs(codec);
3850 if (err < 0) {
3851 stac92xx_free(codec);
3852 return err;
3853 }
3854 spec->pin_configs = spec->bios_pin_configs;
3855 } else {
3856 spec->pin_configs = stac927x_brd_tbl[spec->board_config];
3857 stac92xx_set_config_regs(codec);
3858 }
3859
3860 spec->adc_nids = stac927x_adc_nids;
3861 spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
3862 spec->mux_nids = stac927x_mux_nids;
3863 spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
3864 spec->dac_list = stac927x_dac_nids;
3865 spec->multiout.dac_nids = spec->dac_nids;
3866
3867 switch (spec->board_config) {
3868 case STAC_D965_3ST:
3869 case STAC_D965_5ST:
3870
3871 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x01;
3872 spec->gpio_data = 0x01;
3873 spec->num_dmics = 0;
3874
3875 spec->init = d965_core_init;
3876 spec->mixer = stac927x_mixer;
3877 break;
3878 case STAC_DELL_BIOS:
3879 switch (codec->subsystem_id) {
3880 case 0x10280209:
3881 case 0x1028022e:
3882
3883 stac92xx_set_config_reg(codec, 0x21, 0x01442070);
3884 break;
3885 };
3886
3887 stac92xx_set_config_reg(codec, 0x0c, 0x90a79130);
3888
3889 stac92xx_set_config_reg(codec, 0x0f, 0x0227011f);
3890
3891 stac92xx_set_config_reg(codec, 0x0e, 0x02a79130);
3892
3893 case STAC_DELL_3ST:
3894
3895 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x04;
3896 spec->gpio_data = 0x04;
3897 spec->dmic_nids = stac927x_dmic_nids;
3898 spec->num_dmics = STAC927X_NUM_DMICS;
3899
3900 spec->init = d965_core_init;
3901 spec->mixer = stac927x_mixer;
3902 spec->dmux_nids = stac927x_dmux_nids;
3903 spec->num_dmuxes = ARRAY_SIZE(stac927x_dmux_nids);
3904 break;
3905 default:
3906
3907 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3908 spec->gpio_data = 0x01;
3909 spec->num_dmics = 0;
3910
3911 spec->init = stac927x_core_init;
3912 spec->mixer = stac927x_mixer;
3913 }
3914
3915 spec->num_pwrs = 0;
3916 spec->aloopback_mask = 0x40;
3917 spec->aloopback_shift = 0;
3918
3919 err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
3920 if (!err) {
3921 if (spec->board_config < 0) {
3922 printk(KERN_WARNING "hda_codec: No auto-config is "
3923 "available, default to model=ref\n");
3924 spec->board_config = STAC_D965_REF;
3925 goto again;
3926 }
3927 err = -EINVAL;
3928 }
3929 if (err < 0) {
3930 stac92xx_free(codec);
3931 return err;
3932 }
3933
3934 codec->patch_ops = stac92xx_patch_ops;
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946 codec->bus->needs_damn_long_delay = 1;
3947
3948 return 0;
3949}
3950
3951static int patch_stac9205(struct hda_codec *codec)
3952{
3953 struct sigmatel_spec *spec;
3954 int err;
3955
3956 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3957 if (spec == NULL)
3958 return -ENOMEM;
3959
3960 codec->spec = spec;
3961 spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
3962 spec->pin_nids = stac9205_pin_nids;
3963 spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
3964 stac9205_models,
3965 stac9205_cfg_tbl);
3966 again:
3967 if (spec->board_config < 0) {
3968 snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
3969 err = stac92xx_save_bios_config_regs(codec);
3970 if (err < 0) {
3971 stac92xx_free(codec);
3972 return err;
3973 }
3974 spec->pin_configs = spec->bios_pin_configs;
3975 } else {
3976 spec->pin_configs = stac9205_brd_tbl[spec->board_config];
3977 stac92xx_set_config_regs(codec);
3978 }
3979
3980 spec->adc_nids = stac9205_adc_nids;
3981 spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
3982 spec->mux_nids = stac9205_mux_nids;
3983 spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
3984 spec->dmic_nids = stac9205_dmic_nids;
3985 spec->num_dmics = STAC9205_NUM_DMICS;
3986 spec->dmux_nids = stac9205_dmux_nids;
3987 spec->num_dmuxes = ARRAY_SIZE(stac9205_dmux_nids);
3988 spec->num_pwrs = 0;
3989
3990 spec->init = stac9205_core_init;
3991 spec->mixer = stac9205_mixer;
3992
3993 spec->aloopback_mask = 0x40;
3994 spec->aloopback_shift = 0;
3995 spec->multiout.dac_nids = spec->dac_nids;
3996
3997 switch (spec->board_config){
3998 case STAC_9205_DELL_M43:
3999
4000 stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
4001 stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
4002
4003
4004 snd_hda_codec_write(codec, codec->afg, 0,
4005 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4006 snd_hda_codec_write_cache(codec, codec->afg, 0,
4007 AC_VERB_SET_UNSOLICITED_ENABLE,
4008 (AC_USRSP_EN | STAC_HP_EVENT));
4009
4010 spec->gpio_dir = 0x0b;
4011 spec->eapd_mask = 0x01;
4012 spec->gpio_mask = 0x1b;
4013 spec->gpio_mute = 0x10;
4014
4015
4016
4017 spec->gpio_data = 0x01;
4018 break;
4019 default:
4020
4021 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4022 spec->gpio_data = 0x01;
4023 break;
4024 }
4025
4026 err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
4027 if (!err) {
4028 if (spec->board_config < 0) {
4029 printk(KERN_WARNING "hda_codec: No auto-config is "
4030 "available, default to model=ref\n");
4031 spec->board_config = STAC_9205_REF;
4032 goto again;
4033 }
4034 err = -EINVAL;
4035 }
4036 if (err < 0) {
4037 stac92xx_free(codec);
4038 return err;
4039 }
4040
4041 codec->patch_ops = stac92xx_patch_ops;
4042
4043 return 0;
4044}
4045
4046
4047
4048
4049
4050
4051static hda_nid_t vaio_dacs[] = { 0x2 };
4052#define VAIO_HP_DAC 0x5
4053static hda_nid_t vaio_adcs[] = { 0x8 };
4054static hda_nid_t vaio_mux_nids[] = { 0x15 };
4055
4056static struct hda_input_mux vaio_mux = {
4057 .num_items = 3,
4058 .items = {
4059
4060 { "Mic Jack", 0x1 },
4061 { "Internal Mic", 0x2 },
4062 { "PCM", 0x3 },
4063 }
4064};
4065
4066static struct hda_verb vaio_init[] = {
4067 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP },
4068 {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
4069 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
4070 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 },
4071 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN },
4072 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 },
4073 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1},
4074 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
4075 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
4076 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
4077 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
4078 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
4079 {}
4080};
4081
4082static struct hda_verb vaio_ar_init[] = {
4083 {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP },
4084 {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },
4085 {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 },
4086 {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN },
4087
4088 {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 },
4089 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1},
4090 {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
4091 {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},
4092
4093 {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)},
4094 {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
4095 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE},
4096 {}
4097};
4098
4099
4100static struct hda_bind_ctls vaio_bind_master_vol = {
4101 .ops = &snd_hda_bind_vol,
4102 .values = {
4103 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4104 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4105 0
4106 },
4107};
4108
4109
4110static struct hda_bind_ctls vaio_bind_master_sw = {
4111 .ops = &snd_hda_bind_sw,
4112 .values = {
4113 HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
4114 HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
4115 0,
4116 },
4117};
4118
4119static struct snd_kcontrol_new vaio_mixer[] = {
4120 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4121 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
4122
4123 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4124 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4125 {
4126 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4127 .name = "Capture Source",
4128 .count = 1,
4129 .info = stac92xx_mux_enum_info,
4130 .get = stac92xx_mux_enum_get,
4131 .put = stac92xx_mux_enum_put,
4132 },
4133 {}
4134};
4135
4136static struct snd_kcontrol_new vaio_ar_mixer[] = {
4137 HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
4138 HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
4139
4140 HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
4141 HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
4142
4143
4144 {
4145 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
4146 .name = "Capture Source",
4147 .count = 1,
4148 .info = stac92xx_mux_enum_info,
4149 .get = stac92xx_mux_enum_get,
4150 .put = stac92xx_mux_enum_put,
4151 },
4152 {}
4153};
4154
4155static struct hda_codec_ops stac9872_patch_ops = {
4156 .build_controls = stac92xx_build_controls,
4157 .build_pcms = stac92xx_build_pcms,
4158 .init = stac92xx_init,
4159 .free = stac92xx_free,
4160#ifdef SND_HDA_NEEDS_RESUME
4161 .resume = stac92xx_resume,
4162#endif
4163};
4164
4165static int stac9872_vaio_init(struct hda_codec *codec)
4166{
4167 int err;
4168
4169 err = stac92xx_init(codec);
4170 if (err < 0)
4171 return err;
4172 if (codec->patch_ops.unsol_event)
4173 codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
4174 return 0;
4175}
4176
4177static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
4178{
4179 if (get_hp_pin_presence(codec, 0x0a)) {
4180 stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4181 stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4182 } else {
4183 stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
4184 stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
4185 }
4186}
4187
4188static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
4189{
4190 switch (res >> 26) {
4191 case STAC_HP_EVENT:
4192 stac9872_vaio_hp_detect(codec, res);
4193 break;
4194 }
4195}
4196
4197static struct hda_codec_ops stac9872_vaio_patch_ops = {
4198 .build_controls = stac92xx_build_controls,
4199 .build_pcms = stac92xx_build_pcms,
4200 .init = stac9872_vaio_init,
4201 .free = stac92xx_free,
4202 .unsol_event = stac9872_vaio_unsol_event,
4203#ifdef CONFIG_PM
4204 .resume = stac92xx_resume,
4205#endif
4206};
4207
4208enum {
4209 CXD9872RD_VAIO,
4210
4211 STAC9872AK_VAIO,
4212
4213 STAC9872K_VAIO,
4214
4215 CXD9872AKD_VAIO,
4216 STAC_9872_MODELS,
4217};
4218
4219static const char *stac9872_models[STAC_9872_MODELS] = {
4220 [CXD9872RD_VAIO] = "vaio",
4221 [CXD9872AKD_VAIO] = "vaio-ar",
4222};
4223
4224static struct snd_pci_quirk stac9872_cfg_tbl[] = {
4225 SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
4226 SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
4227 SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
4228 SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
4229 {}
4230};
4231
4232static int patch_stac9872(struct hda_codec *codec)
4233{
4234 struct sigmatel_spec *spec;
4235 int board_config;
4236
4237 board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
4238 stac9872_models,
4239 stac9872_cfg_tbl);
4240 if (board_config < 0)
4241
4242 return snd_hda_parse_generic_codec(codec);
4243
4244 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4245 if (spec == NULL)
4246 return -ENOMEM;
4247
4248 codec->spec = spec;
4249 switch (board_config) {
4250 case CXD9872RD_VAIO:
4251 case STAC9872AK_VAIO:
4252 case STAC9872K_VAIO:
4253 spec->mixer = vaio_mixer;
4254 spec->init = vaio_init;
4255 spec->multiout.max_channels = 2;
4256 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4257 spec->multiout.dac_nids = vaio_dacs;
4258 spec->multiout.hp_nid = VAIO_HP_DAC;
4259 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4260 spec->adc_nids = vaio_adcs;
4261 spec->num_pwrs = 0;
4262 spec->input_mux = &vaio_mux;
4263 spec->mux_nids = vaio_mux_nids;
4264 codec->patch_ops = stac9872_vaio_patch_ops;
4265 break;
4266
4267 case CXD9872AKD_VAIO:
4268 spec->mixer = vaio_ar_mixer;
4269 spec->init = vaio_ar_init;
4270 spec->multiout.max_channels = 2;
4271 spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
4272 spec->multiout.dac_nids = vaio_dacs;
4273 spec->multiout.hp_nid = VAIO_HP_DAC;
4274 spec->num_adcs = ARRAY_SIZE(vaio_adcs);
4275 spec->num_pwrs = 0;
4276 spec->adc_nids = vaio_adcs;
4277 spec->input_mux = &vaio_mux;
4278 spec->mux_nids = vaio_mux_nids;
4279 codec->patch_ops = stac9872_patch_ops;
4280 break;
4281 }
4282
4283 return 0;
4284}
4285
4286
4287
4288
4289
4290struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4291 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4292 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4293 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4294 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4295 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4296 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4297 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4298 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4299 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4300 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4301 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4302 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4303 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4304 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4305 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4306 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4307 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4308 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4309 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4310 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4311 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4312 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4313 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4314 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4315 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4316 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4317 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4318 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4319 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4320 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4321 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4322
4323
4324
4325
4326 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4327 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4328 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4329 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4330 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4331 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4332 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4333 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4334 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4335 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4336 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4337 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4338 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4339 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4340 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4341 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4342 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4343 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4344 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4345 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4346 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4347 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4348 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4349 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4350 {}
4351};
4352
