1# ========================================================================== 2# Building 3# ========================================================================== 4 5src := $(obj) 6 7PHONY := __build 8__build: 9 10# Init all relevant variables used in kbuild files so 11# 1) they have correct type 12# 2) they do not inherit any value from the environment 13obj-y := 14obj-m := 15lib-y := 16lib-m := 17always := 18targets := 19subdir-y := 20subdir-m := 21EXTRA_AFLAGS := 22EXTRA_CFLAGS := 23EXTRA_CPPFLAGS := 24EXTRA_LDFLAGS := 25asflags-y := 26ccflags-y := 27cppflags-y := 28ldflags-y := 29 30# Read auto.conf if it exists, otherwise ignore 31-include include/config/auto.conf 32 33include scripts/Kbuild.include 34 35# For backward compatibility check that these variables do not change 36save-cflags := $(CFLAGS) 37 38# The filename Kbuild has precedence over Makefile 39kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) 40kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) 41include $(kbuild-file) 42 43# If the save-* variables changed error out 44ifeq ($(KBUILD_NOPEDANTIC),) 45 ifneq ("$(save-cflags)","$(CFLAGS)") 46 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS) 47 endif 48endif 49include scripts/Makefile.lib 50 51ifdef host-progs 52ifneq ($(hostprogs-y),$(host-progs)) 53$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!) 54hostprogs-y += $(host-progs) 55endif 56endif 57 58# Do not include host rules unless needed 59ifneq ($(hostprogs-y)$(hostprogs-m),) 60include scripts/Makefile.host 61endif 62 63ifneq ($(KBUILD_SRC),) 64# Create output directory if not already present 65_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj)) 66 67# Create directories for object files if directory does not exist 68# Needed when obj-y := dir/file.o syntax is used 69_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d))) 70endif 71 72ifndef obj 73$(warning kbuild: Makefile.build is included improperly) 74endif 75 76# =========================================================================== 77 78ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),) 79lib-target := $(obj)/lib.a 80endif 81 82ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),) 83builtin-target := $(obj)/built-in.o 84endif 85 86modorder-target := $(obj)/modules.order 87 88# We keep a list of all modules in $(MODVERDIR) 89 90__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \ 91 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \ 92 $(subdir-ym) $(always) 93 @: 94 95# Linus' kernel sanity checking tool 96ifneq ($(KBUILD_CHECKSRC),0) 97 ifeq ($(KBUILD_CHECKSRC),2) 98 quiet_cmd_force_checksrc = CHECK $< 99 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 100 else 101 quiet_cmd_checksrc = CHECK $< 102 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ; 103 endif 104endif 105 106# Do section mismatch analysis for each module/built-in.o 107ifdef CONFIG_DEBUG_SECTION_MISMATCH 108 cmd_secanalysis = ; scripts/mod/modpost $@ 109endif 110 111# Compile C sources (.c) 112# --------------------------------------------------------------------------- 113 114# Default is built-in, unless we know otherwise 115modkern_cflags := $(CFLAGS_KERNEL) 116quiet_modtag := $(empty) $(empty) 117 118$(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE) 119$(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE) 120$(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE) 121$(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE) 122 123$(real-objs-m) : quiet_modtag := [M] 124$(real-objs-m:.o=.i) : quiet_modtag := [M] 125$(real-objs-m:.o=.s) : quiet_modtag := [M] 126$(real-objs-m:.o=.lst): quiet_modtag := [M] 127 128$(obj-m) : quiet_modtag := [M] 129 130# Default for not multi-part modules 131modname = $(basetarget) 132 133$(multi-objs-m) : modname = $(modname-multi) 134$(multi-objs-m:.o=.i) : modname = $(modname-multi) 135$(multi-objs-m:.o=.s) : modname = $(modname-multi) 136$(multi-objs-m:.o=.lst) : modname = $(modname-multi) 137$(multi-objs-y) : modname = $(modname-multi) 138$(multi-objs-y:.o=.i) : modname = $(modname-multi) 139$(multi-objs-y:.o=.s) : modname = $(modname-multi) 140$(multi-objs-y:.o=.lst) : modname = $(modname-multi) 141 142quiet_cmd_cc_s_c = CC $(quiet_modtag) $@ 143cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $< 144 145$(obj)/%.s: $(src)/%.c FORCE 146 $(call if_changed_dep,cc_s_c) 147 148quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@ 149cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $< 150 151$(obj)/%.i: $(src)/%.c FORCE 152 $(call if_changed_dep,cc_i_c) 153 154quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@ 155cmd_cc_symtypes_c = \ 156 $(CPP) -D__GENKSYMS__ $(c_flags) $< \ 157 | $(GENKSYMS) -T $@ >/dev/null; \ 158 test -s $@ || rm -f $@ 159 160$(obj)/%.symtypes : $(src)/%.c FORCE 161 $(call if_changed_dep,cc_symtypes_c) 162 163# C (.c) files 164# The C file is compiled and updated dependency information is generated. 165# (See cmd_cc_o_c + relevant part of rule_cc_o_c) 166 167quiet_cmd_cc_o_c = CC $(quiet_modtag) $@ 168 169ifndef CONFIG_MODVERSIONS 170cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $< 171 172else 173# When module versioning is enabled the following steps are executed: 174# o compile a .tmp_<file>.o from <file>.c 175# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does 176# not export symbols, we just rename .tmp_<file>.o to <file>.o and 177# are done. 178# o otherwise, we calculate symbol versions using the good old 179# genksyms on the preprocessed source and postprocess them in a way 180# that they are usable as a linker script 181# o generate <file>.o from .tmp_<file>.o using the linker to 182# replace the unresolved symbols __crc_exported_symbol with 183# the actual value of the checksum generated by genksyms 184 185cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $< 186cmd_modversions = \ 187 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \ 188 $(CPP) -D__GENKSYMS__ $(c_flags) $< \ 189 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \ 190 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \ 191 > $(@D)/.tmp_$(@F:.o=.ver); \ 192 \ 193 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \ 194 -T $(@D)/.tmp_$(@F:.o=.ver); \ 195 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \ 196 else \ 197 mv -f $(@D)/.tmp_$(@F) $@; \ 198 fi; 199endif 200 201define rule_cc_o_c 202 $(call echo-cmd,checksrc) $(cmd_checksrc) \ 203 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \ 204 $(cmd_modversions) \ 205 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \ 206 $(dot-target).tmp; \ 207 rm -f $(depfile); \ 208 mv -f $(dot-target).tmp $(dot-target).cmd 209endef 210 211# Built-in and composite module parts 212$(obj)/%.o: $(src)/%.c FORCE 213 $(call cmd,force_checksrc) 214 $(call if_changed_rule,cc_o_c) 215 216# Single-part modules are special since we need to mark them in $(MODVERDIR) 217 218$(single-used-m): $(obj)/%.o: $(src)/%.c FORCE 219 $(call cmd,force_checksrc) 220 $(call if_changed_rule,cc_o_c) 221 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod) 222 223quiet_cmd_cc_lst_c = MKLST $@ 224 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \ 225 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \ 226 System.map $(OBJDUMP) > $@ 227 228$(obj)/%.lst: $(src)/%.c FORCE 229 $(call if_changed_dep,cc_lst_c) 230 231# Compile assembler sources (.S) 232# --------------------------------------------------------------------------- 233 234modkern_aflags := $(AFLAGS_KERNEL) 235 236$(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE) 237$(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE) 238 239quiet_cmd_as_s_S = CPP $(quiet_modtag) $@ 240cmd_as_s_S = $(CPP) $(a_flags) -o $@ $< 241 242$(obj)/%.s: $(src)/%.S FORCE 243 $(call if_changed_dep,as_s_S) 244 245quiet_cmd_as_o_S = AS $(quiet_modtag) $@ 246cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $< 247 248$(obj)/%.o: $(src)/%.S FORCE 249 $(call if_changed_dep,as_o_S) 250 251targets += $(real-objs-y) $(real-objs-m) $(lib-y) 252targets += $(extra-y) $(MAKECMDGOALS) $(always) 253 254# Linker scripts preprocessor (.lds.S -> .lds) 255# --------------------------------------------------------------------------- 256quiet_cmd_cpp_lds_S = LDS $@ 257 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $< 258 259$(obj)/%.lds: $(src)/%.lds.S FORCE 260 $(call if_changed_dep,cpp_lds_S) 261 262# Build the compiled-in targets 263# --------------------------------------------------------------------------- 264 265# To build objects in subdirs, we need to descend into the directories 266$(sort $(subdir-obj-y)): $(subdir-ym) ; 267 268# 269# Rule to compile a set of .o files into one .o file 270# 271ifdef builtin-target 272quiet_cmd_link_o_target = LD $@ 273# If the list of objects to link is empty, just create an empty built-in.o 274cmd_link_o_target = $(if $(strip $(obj-y)),\ 275 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \ 276 $(cmd_secanalysis),\ 277 rm -f $@; $(AR) rcs $@) 278 279$(builtin-target): $(obj-y) FORCE 280 $(call if_changed,link_o_target) 281 282targets += $(builtin-target) 283endif # builtin-target 284 285# 286# Rule to create modules.order file 287# 288# Create commands to either record .ko file or cat modules.order from 289# a subdirectory 290modorder-cmds = \ 291 $(foreach m, $(modorder), \ 292 $(if $(filter %/modules.order, $m), \ 293 cat $m;, echo kernel/$m;)) 294 295$(modorder-target): $(subdir-ym) FORCE 296 $(Q)(cat /dev/null; $(modorder-cmds)) > $@ 297 298# 299# Rule to compile a set of .o files into one .a file 300# 301ifdef lib-target 302quiet_cmd_link_l_target = AR $@ 303cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y) 304 305$(lib-target): $(lib-y) FORCE 306 $(call if_changed,link_l_target) 307 308targets += $(lib-target) 309endif 310 311# 312# Rule to link composite objects 313# 314# Composite objects are specified in kbuild makefile as follows: 315# <composite-object>-objs := <list of .o files> 316# or 317# <composite-object>-y := <list of .o files> 318link_multi_deps = \ 319$(filter $(addprefix $(obj)/, \ 320$($(subst $(obj)/,,$(@:.o=-objs))) \ 321$($(subst $(obj)/,,$(@:.o=-y)))), $^) 322 323quiet_cmd_link_multi-y = LD $@ 324cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis) 325 326quiet_cmd_link_multi-m = LD [M] $@ 327cmd_link_multi-m = $(cmd_link_multi-y) 328 329# We would rather have a list of rules like 330# foo.o: $(foo-objs) 331# but that's not so easy, so we rather make all composite objects depend 332# on the set of all their parts 333$(multi-used-y) : %.o: $(multi-objs-y) FORCE 334 $(call if_changed,link_multi-y) 335 336$(multi-used-m) : %.o: $(multi-objs-m) FORCE 337 $(call if_changed,link_multi-m) 338 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod) 339 340targets += $(multi-used-y) $(multi-used-m) 341 342 343# Descending 344# --------------------------------------------------------------------------- 345 346PHONY += $(subdir-ym) 347$(subdir-ym): 348 $(Q)$(MAKE) $(build)=$@ 349 350# Add FORCE to the prequisites of a target to force it to be always rebuilt. 351# --------------------------------------------------------------------------- 352 353PHONY += FORCE 354 355FORCE: 356 357# Read all saved command lines and dependencies for the $(targets) we 358# may be building above, using $(if_changed{,_dep}). As an 359# optimization, we don't need to read them if the target does not 360# exist, we will rebuild anyway in that case. 361 362targets := $(wildcard $(sort $(targets))) 363cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd)) 364 365ifneq ($(cmd_files),) 366 include $(cmd_files) 367endif 368 369 370# Declare the contents of the .PHONY variable as phony. We keep that 371# information in a variable se we can use it in if_changed and friends. 372 373.PHONY: $(PHONY) 374