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30#include <linux/module.h>
31#include <linux/moduleparam.h>
32#include <linux/string.h>
33#include <linux/errno.h>
34#include <linux/mm.h>
35#include <linux/ip.h>
36#include <linux/inetdevice.h>
37#include <linux/netdevice.h>
38#include <linux/sched.h>
39#include <linux/workqueue.h>
40#include <linux/kernel.h>
41#include <linux/slab.h>
42#include <linux/interrupt.h>
43#include <linux/tcp.h>
44#include <linux/icmp.h>
45#include <linux/skbuff.h>
46#include <linux/in.h>
47#include <linux/igmp.h>
48#include <linux/init.h>
49#include <linux/reboot.h>
50#include <linux/mii.h>
51#include <linux/rcupdate.h>
52#include <linux/ethtool.h>
53
54#include <net/arp.h>
55#include <net/ip.h>
56#include <net/route.h>
57
58#include <asm/ebcdic.h>
59#include <asm/io.h>
60#include <asm/qeth.h>
61#include <asm/timex.h>
62#include <asm/semaphore.h>
63#include <asm/uaccess.h>
64#include <asm/s390_rdev.h>
65
66#include "qeth.h"
67#include "qeth_mpc.h"
68#include "qeth_fs.h"
69#include "qeth_eddp.h"
70#include "qeth_tso.h"
71
72static const char *version = "qeth S/390 OSA-Express driver";
73
74
75
76
77static debug_info_t *qeth_dbf_setup = NULL;
78static debug_info_t *qeth_dbf_data = NULL;
79static debug_info_t *qeth_dbf_misc = NULL;
80static debug_info_t *qeth_dbf_control = NULL;
81debug_info_t *qeth_dbf_trace = NULL;
82static debug_info_t *qeth_dbf_sense = NULL;
83static debug_info_t *qeth_dbf_qerr = NULL;
84
85DEFINE_PER_CPU(char[256], qeth_dbf_txt_buf);
86
87static struct lock_class_key qdio_out_skb_queue_key;
88
89
90
91
92static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
93
94
95struct qeth_card_list_struct qeth_card_list;
96
97spinlock_t qeth_notify_lock;
98struct list_head qeth_notify_list;
99
100static void qeth_send_control_data_cb(struct qeth_channel *,
101 struct qeth_cmd_buffer *);
102
103
104
105
106static void
107qeth_init_qdio_info(struct qeth_card *card);
108
109static int
110qeth_init_qdio_queues(struct qeth_card *card);
111
112static int
113qeth_alloc_qdio_buffers(struct qeth_card *card);
114
115static void
116qeth_free_qdio_buffers(struct qeth_card *);
117
118static void
119qeth_clear_qdio_buffers(struct qeth_card *);
120
121static void
122qeth_clear_ip_list(struct qeth_card *, int, int);
123
124static void
125qeth_clear_ipacmd_list(struct qeth_card *);
126
127static int
128qeth_qdio_clear_card(struct qeth_card *, int);
129
130static void
131qeth_clear_working_pool_list(struct qeth_card *);
132
133static void
134qeth_clear_cmd_buffers(struct qeth_channel *);
135
136static int
137qeth_stop(struct net_device *);
138
139static void
140qeth_clear_ipato_list(struct qeth_card *);
141
142static int
143qeth_is_addr_covered_by_ipato(struct qeth_card *, struct qeth_ipaddr *);
144
145static void
146qeth_irq_tasklet(unsigned long);
147
148static int
149qeth_set_online(struct ccwgroup_device *);
150
151static int
152__qeth_set_online(struct ccwgroup_device *gdev, int recovery_mode);
153
154static struct qeth_ipaddr *
155qeth_get_addr_buffer(enum qeth_prot_versions);
156
157static void
158qeth_set_multicast_list(struct net_device *);
159
160static void
161qeth_setadp_promisc_mode(struct qeth_card *);
162
163static int
164qeth_hard_header_parse(const struct sk_buff *skb, unsigned char *haddr);
165
166static void
167qeth_notify_processes(void)
168{
169
170 struct qeth_notify_list_struct *n_entry;
171
172 QETH_DBF_TEXT(trace,3,"procnoti");
173 spin_lock(&qeth_notify_lock);
174 list_for_each_entry(n_entry, &qeth_notify_list, list) {
175 send_sig(n_entry->signum, n_entry->task, 1);
176 }
177 spin_unlock(&qeth_notify_lock);
178
179}
180int
181qeth_notifier_unregister(struct task_struct *p)
182{
183 struct qeth_notify_list_struct *n_entry, *tmp;
184
185 QETH_DBF_TEXT(trace, 2, "notunreg");
186 spin_lock(&qeth_notify_lock);
187 list_for_each_entry_safe(n_entry, tmp, &qeth_notify_list, list) {
188 if (n_entry->task == p) {
189 list_del(&n_entry->list);
190 kfree(n_entry);
191 goto out;
192 }
193 }
194out:
195 spin_unlock(&qeth_notify_lock);
196 return 0;
197}
198int
199qeth_notifier_register(struct task_struct *p, int signum)
200{
201 struct qeth_notify_list_struct *n_entry;
202
203
204 spin_lock(&qeth_notify_lock);
205 list_for_each_entry(n_entry, &qeth_notify_list, list) {
206 if (n_entry->task == p) {
207 n_entry->signum = signum;
208 spin_unlock(&qeth_notify_lock);
209 return 0;
210 }
211 }
212 spin_unlock(&qeth_notify_lock);
213
214 n_entry = (struct qeth_notify_list_struct *)
215 kmalloc(sizeof(struct qeth_notify_list_struct),GFP_KERNEL);
216 if (!n_entry)
217 return -ENOMEM;
218 n_entry->task = p;
219 n_entry->signum = signum;
220 spin_lock(&qeth_notify_lock);
221 list_add(&n_entry->list,&qeth_notify_list);
222 spin_unlock(&qeth_notify_lock);
223 return 0;
224}
225
226
227
228
229
230static void
231qeth_clean_channel(struct qeth_channel *channel)
232{
233 int cnt;
234
235 QETH_DBF_TEXT(setup, 2, "freech");
236 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
237 kfree(channel->iob[cnt].data);
238}
239
240
241
242
243static void
244qeth_free_card(struct qeth_card *card)
245{
246
247 QETH_DBF_TEXT(setup, 2, "freecrd");
248 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
249 qeth_clean_channel(&card->read);
250 qeth_clean_channel(&card->write);
251 if (card->dev)
252 free_netdev(card->dev);
253 qeth_clear_ip_list(card, 0, 0);
254 qeth_clear_ipato_list(card);
255 kfree(card->ip_tbd_list);
256 qeth_free_qdio_buffers(card);
257 kfree(card);
258}
259
260
261
262
263static int
264qeth_setup_channel(struct qeth_channel *channel)
265{
266 int cnt;
267
268 QETH_DBF_TEXT(setup, 2, "setupch");
269 for (cnt=0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
270 channel->iob[cnt].data = (char *)
271 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
272 if (channel->iob[cnt].data == NULL)
273 break;
274 channel->iob[cnt].state = BUF_STATE_FREE;
275 channel->iob[cnt].channel = channel;
276 channel->iob[cnt].callback = qeth_send_control_data_cb;
277 channel->iob[cnt].rc = 0;
278 }
279 if (cnt < QETH_CMD_BUFFER_NO) {
280 while (cnt-- > 0)
281 kfree(channel->iob[cnt].data);
282 return -ENOMEM;
283 }
284 channel->buf_no = 0;
285 channel->io_buf_no = 0;
286 atomic_set(&channel->irq_pending, 0);
287 spin_lock_init(&channel->iob_lock);
288
289 init_waitqueue_head(&channel->wait_q);
290 channel->irq_tasklet.data = (unsigned long) channel;
291 channel->irq_tasklet.func = qeth_irq_tasklet;
292 return 0;
293}
294
295
296
297
298static struct qeth_card *
299qeth_alloc_card(void)
300{
301 struct qeth_card *card;
302
303 QETH_DBF_TEXT(setup, 2, "alloccrd");
304 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
305 if (!card)
306 return NULL;
307 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
308 if (qeth_setup_channel(&card->read)) {
309 kfree(card);
310 return NULL;
311 }
312 if (qeth_setup_channel(&card->write)) {
313 qeth_clean_channel(&card->read);
314 kfree(card);
315 return NULL;
316 }
317 return card;
318}
319
320static long
321__qeth_check_irb_error(struct ccw_device *cdev, unsigned long intparm,
322 struct irb *irb)
323{
324 if (!IS_ERR(irb))
325 return 0;
326
327 switch (PTR_ERR(irb)) {
328 case -EIO:
329 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
330 QETH_DBF_TEXT(trace, 2, "ckirberr");
331 QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
332 break;
333 case -ETIMEDOUT:
334 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
335 QETH_DBF_TEXT(trace, 2, "ckirberr");
336 QETH_DBF_TEXT_(trace, 2, " rc%d", -ETIMEDOUT);
337 if (intparm == QETH_RCD_PARM) {
338 struct qeth_card *card = CARD_FROM_CDEV(cdev);
339
340 if (card && (card->data.ccwdev == cdev)) {
341 card->data.state = CH_STATE_DOWN;
342 wake_up(&card->wait_q);
343 }
344 }
345 break;
346 default:
347 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
348 cdev->dev.bus_id);
349 QETH_DBF_TEXT(trace, 2, "ckirberr");
350 QETH_DBF_TEXT(trace, 2, " rc???");
351 }
352 return PTR_ERR(irb);
353}
354
355static int
356qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
357{
358 int dstat,cstat;
359 char *sense;
360
361 sense = (char *) irb->ecw;
362 cstat = irb->scsw.cstat;
363 dstat = irb->scsw.dstat;
364
365 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
366 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
367 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
368 QETH_DBF_TEXT(trace,2, "CGENCHK");
369 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
370 cdev->dev.bus_id, dstat, cstat);
371 HEXDUMP16(WARN, "irb: ", irb);
372 HEXDUMP16(WARN, "irb: ", ((char *) irb) + 32);
373 return 1;
374 }
375
376 if (dstat & DEV_STAT_UNIT_CHECK) {
377 if (sense[SENSE_RESETTING_EVENT_BYTE] &
378 SENSE_RESETTING_EVENT_FLAG) {
379 QETH_DBF_TEXT(trace,2,"REVIND");
380 return 1;
381 }
382 if (sense[SENSE_COMMAND_REJECT_BYTE] &
383 SENSE_COMMAND_REJECT_FLAG) {
384 QETH_DBF_TEXT(trace,2,"CMDREJi");
385 return 0;
386 }
387 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
388 QETH_DBF_TEXT(trace,2,"AFFE");
389 return 1;
390 }
391 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
392 QETH_DBF_TEXT(trace,2,"ZEROSEN");
393 return 0;
394 }
395 QETH_DBF_TEXT(trace,2,"DGENCHK");
396 return 1;
397 }
398 return 0;
399}
400static int qeth_issue_next_read(struct qeth_card *);
401
402
403
404
405static void
406qeth_irq(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
407{
408 int rc;
409 int cstat,dstat;
410 struct qeth_cmd_buffer *buffer;
411 struct qeth_channel *channel;
412 struct qeth_card *card;
413
414 QETH_DBF_TEXT(trace,5,"irq");
415
416 if (__qeth_check_irb_error(cdev, intparm, irb))
417 return;
418 cstat = irb->scsw.cstat;
419 dstat = irb->scsw.dstat;
420
421 card = CARD_FROM_CDEV(cdev);
422 if (!card)
423 return;
424
425 if (card->read.ccwdev == cdev){
426 channel = &card->read;
427 QETH_DBF_TEXT(trace,5,"read");
428 } else if (card->write.ccwdev == cdev) {
429 channel = &card->write;
430 QETH_DBF_TEXT(trace,5,"write");
431 } else {
432 channel = &card->data;
433 QETH_DBF_TEXT(trace,5,"data");
434 }
435 atomic_set(&channel->irq_pending, 0);
436
437 if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
438 channel->state = CH_STATE_STOPPED;
439
440 if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
441 channel->state = CH_STATE_HALTED;
442
443
444 if ((channel == &card->data) && (intparm != 0) &&
445 (intparm != QETH_RCD_PARM))
446 goto out;
447
448 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
449 QETH_DBF_TEXT(trace, 6, "clrchpar");
450
451 intparm = 0;
452 }
453 if (intparm == QETH_HALT_CHANNEL_PARM) {
454 QETH_DBF_TEXT(trace, 6, "hltchpar");
455
456 intparm = 0;
457 }
458 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
459 (dstat & DEV_STAT_UNIT_CHECK) ||
460 (cstat)) {
461 if (irb->esw.esw0.erw.cons) {
462
463 PRINT_WARN("sense data available on channel %s.\n",
464 CHANNEL_ID(channel));
465 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
466 HEXDUMP16(WARN,"irb: ",irb);
467 HEXDUMP16(WARN,"sense data: ",irb->ecw);
468 }
469 if (intparm == QETH_RCD_PARM) {
470 channel->state = CH_STATE_DOWN;
471 goto out;
472 }
473 rc = qeth_get_problem(cdev,irb);
474 if (rc) {
475 qeth_schedule_recovery(card);
476 goto out;
477 }
478 }
479
480 if (intparm == QETH_RCD_PARM) {
481 channel->state = CH_STATE_RCD_DONE;
482 goto out;
483 }
484 if (intparm) {
485 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
486 buffer->state = BUF_STATE_PROCESSED;
487 }
488 if (channel == &card->data)
489 return;
490
491 if (channel == &card->read &&
492 channel->state == CH_STATE_UP)
493 qeth_issue_next_read(card);
494
495 qeth_irq_tasklet((unsigned long)channel);
496 return;
497out:
498 wake_up(&card->wait_q);
499}
500
501
502
503
504static void
505qeth_irq_tasklet(unsigned long data)
506{
507 struct qeth_card *card;
508 struct qeth_channel *channel;
509 struct qeth_cmd_buffer *iob;
510 __u8 index;
511
512 QETH_DBF_TEXT(trace,5,"irqtlet");
513 channel = (struct qeth_channel *) data;
514 iob = channel->iob;
515 index = channel->buf_no;
516 card = CARD_FROM_CDEV(channel->ccwdev);
517 while (iob[index].state == BUF_STATE_PROCESSED) {
518 if (iob[index].callback !=NULL) {
519 iob[index].callback(channel,iob + index);
520 }
521 index = (index + 1) % QETH_CMD_BUFFER_NO;
522 }
523 channel->buf_no = index;
524 wake_up(&card->wait_q);
525}
526
527static int qeth_stop_card(struct qeth_card *, int);
528
529static int
530__qeth_set_offline(struct ccwgroup_device *cgdev, int recovery_mode)
531{
532 struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data;
533 int rc = 0, rc2 = 0, rc3 = 0;
534 enum qeth_card_states recover_flag;
535
536 QETH_DBF_TEXT(setup, 3, "setoffl");
537 QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
538
539 if (card->dev && netif_carrier_ok(card->dev))
540 netif_carrier_off(card->dev);
541 recover_flag = card->state;
542 if (qeth_stop_card(card, recovery_mode) == -ERESTARTSYS){
543 PRINT_WARN("Stopping card %s interrupted by user!\n",
544 CARD_BUS_ID(card));
545 return -ERESTARTSYS;
546 }
547 rc = ccw_device_set_offline(CARD_DDEV(card));
548 rc2 = ccw_device_set_offline(CARD_WDEV(card));
549 rc3 = ccw_device_set_offline(CARD_RDEV(card));
550 if (!rc)
551 rc = (rc2) ? rc2 : rc3;
552 if (rc)
553 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
554 if (recover_flag == CARD_STATE_UP)
555 card->state = CARD_STATE_RECOVER;
556 qeth_notify_processes();
557 return 0;
558}
559
560static int
561qeth_set_offline(struct ccwgroup_device *cgdev)
562{
563 return __qeth_set_offline(cgdev, 0);
564}
565
566static int
567qeth_threads_running(struct qeth_card *card, unsigned long threads);
568
569
570static void
571qeth_remove_device(struct ccwgroup_device *cgdev)
572{
573 struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data;
574 unsigned long flags;
575
576 QETH_DBF_TEXT(setup, 3, "rmdev");
577 QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
578
579 if (!card)
580 return;
581
582 wait_event(card->wait_q, qeth_threads_running(card, 0xffffffff) == 0);
583
584 if (cgdev->state == CCWGROUP_ONLINE){
585 card->use_hard_stop = 1;
586 qeth_set_offline(cgdev);
587 }
588
589 write_lock_irqsave(&qeth_card_list.rwlock, flags);
590 list_del(&card->list);
591 write_unlock_irqrestore(&qeth_card_list.rwlock, flags);
592 if (card->dev)
593 unregister_netdev(card->dev);
594 qeth_remove_device_attributes(&cgdev->dev);
595 qeth_free_card(card);
596 cgdev->dev.driver_data = NULL;
597 put_device(&cgdev->dev);
598}
599
600static int
601qeth_register_addr_entry(struct qeth_card *, struct qeth_ipaddr *);
602static int
603qeth_deregister_addr_entry(struct qeth_card *, struct qeth_ipaddr *);
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618static int
619__qeth_ref_ip_on_card(struct qeth_card *card, struct qeth_ipaddr *todo,
620 struct qeth_ipaddr **__addr)
621{
622 struct qeth_ipaddr *addr;
623 int found = 0;
624
625 list_for_each_entry(addr, &card->ip_list, entry) {
626 if (card->options.layer2) {
627 if ((addr->type == todo->type) &&
628 (memcmp(&addr->mac, &todo->mac,
629 OSA_ADDR_LEN) == 0)) {
630 found = 1;
631 break;
632 }
633 continue;
634 }
635 if ((addr->proto == QETH_PROT_IPV4) &&
636 (todo->proto == QETH_PROT_IPV4) &&
637 (addr->type == todo->type) &&
638 (addr->u.a4.addr == todo->u.a4.addr) &&
639 (addr->u.a4.mask == todo->u.a4.mask)) {
640 found = 1;
641 break;
642 }
643 if ((addr->proto == QETH_PROT_IPV6) &&
644 (todo->proto == QETH_PROT_IPV6) &&
645 (addr->type == todo->type) &&
646 (addr->u.a6.pfxlen == todo->u.a6.pfxlen) &&
647 (memcmp(&addr->u.a6.addr, &todo->u.a6.addr,
648 sizeof(struct in6_addr)) == 0)) {
649 found = 1;
650 break;
651 }
652 }
653 if (found) {
654 addr->users += todo->users;
655 if (addr->users <= 0){
656 *__addr = addr;
657 return -1;
658 } else {
659
660 if (addr->type != QETH_IP_TYPE_NORMAL)
661 addr->users = 1;
662 return 0;
663 }
664 }
665 if (todo->users > 0) {
666
667 if (todo->type != QETH_IP_TYPE_NORMAL)
668 todo->users = 1;
669 return 1;
670 } else
671 return 0;
672}
673
674static int
675__qeth_address_exists_in_list(struct list_head *list, struct qeth_ipaddr *addr,
676 int same_type)
677{
678 struct qeth_ipaddr *tmp;
679
680 list_for_each_entry(tmp, list, entry) {
681 if ((tmp->proto == QETH_PROT_IPV4) &&
682 (addr->proto == QETH_PROT_IPV4) &&
683 ((same_type && (tmp->type == addr->type)) ||
684 (!same_type && (tmp->type != addr->type)) ) &&
685 (tmp->u.a4.addr == addr->u.a4.addr) ){
686 return 1;
687 }
688 if ((tmp->proto == QETH_PROT_IPV6) &&
689 (addr->proto == QETH_PROT_IPV6) &&
690 ((same_type && (tmp->type == addr->type)) ||
691 (!same_type && (tmp->type != addr->type)) ) &&
692 (memcmp(&tmp->u.a6.addr, &addr->u.a6.addr,
693 sizeof(struct in6_addr)) == 0) ) {
694 return 1;
695 }
696 }
697 return 0;
698}
699
700
701
702
703
704
705static int
706__qeth_insert_ip_todo(struct qeth_card *card, struct qeth_ipaddr *addr, int add)
707{
708 struct qeth_ipaddr *tmp, *t;
709 int found = 0;
710
711 list_for_each_entry_safe(tmp, t, card->ip_tbd_list, entry) {
712 if ((addr->type == QETH_IP_TYPE_DEL_ALL_MC) &&
713 (tmp->type == QETH_IP_TYPE_DEL_ALL_MC))
714 return 0;
715 if (card->options.layer2) {
716 if ((tmp->type == addr->type) &&
717 (tmp->is_multicast == addr->is_multicast) &&
718 (memcmp(&tmp->mac, &addr->mac,
719 OSA_ADDR_LEN) == 0)) {
720 found = 1;
721 break;
722 }
723 continue;
724 }
725 if ((tmp->proto == QETH_PROT_IPV4) &&
726 (addr->proto == QETH_PROT_IPV4) &&
727 (tmp->type == addr->type) &&
728 (tmp->is_multicast == addr->is_multicast) &&
729 (tmp->u.a4.addr == addr->u.a4.addr) &&
730 (tmp->u.a4.mask == addr->u.a4.mask)) {
731 found = 1;
732 break;
733 }
734 if ((tmp->proto == QETH_PROT_IPV6) &&
735 (addr->proto == QETH_PROT_IPV6) &&
736 (tmp->type == addr->type) &&
737 (tmp->is_multicast == addr->is_multicast) &&
738 (tmp->u.a6.pfxlen == addr->u.a6.pfxlen) &&
739 (memcmp(&tmp->u.a6.addr, &addr->u.a6.addr,
740 sizeof(struct in6_addr)) == 0)) {
741 found = 1;
742 break;
743 }
744 }
745 if (found){
746 if (addr->users != 0)
747 tmp->users += addr->users;
748 else
749 tmp->users += add? 1:-1;
750 if (tmp->users == 0) {
751 list_del(&tmp->entry);
752 kfree(tmp);
753 }
754 return 0;
755 } else {
756 if (addr->type == QETH_IP_TYPE_DEL_ALL_MC)
757 list_add(&addr->entry, card->ip_tbd_list);
758 else {
759 if (addr->users == 0)
760 addr->users += add? 1:-1;
761 if (add && (addr->type == QETH_IP_TYPE_NORMAL) &&
762 qeth_is_addr_covered_by_ipato(card, addr)){
763 QETH_DBF_TEXT(trace, 2, "tkovaddr");
764 addr->set_flags |= QETH_IPA_SETIP_TAKEOVER_FLAG;
765 }
766 list_add_tail(&addr->entry, card->ip_tbd_list);
767 }
768 return 1;
769 }
770}
771
772
773
774
775static int
776qeth_delete_ip(struct qeth_card *card, struct qeth_ipaddr *addr)
777{
778 unsigned long flags;
779 int rc = 0;
780
781 QETH_DBF_TEXT(trace, 4, "delip");
782
783 if (card->options.layer2)
784 QETH_DBF_HEX(trace, 4, &addr->mac, 6);
785 else if (addr->proto == QETH_PROT_IPV4)
786 QETH_DBF_HEX(trace, 4, &addr->u.a4.addr, 4);
787 else {
788 QETH_DBF_HEX(trace, 4, &addr->u.a6.addr, 8);
789 QETH_DBF_HEX(trace, 4, ((char *)&addr->u.a6.addr) + 8, 8);
790 }
791 spin_lock_irqsave(&card->ip_lock, flags);
792 rc = __qeth_insert_ip_todo(card, addr, 0);
793 spin_unlock_irqrestore(&card->ip_lock, flags);
794 return rc;
795}
796
797static int
798qeth_add_ip(struct qeth_card *card, struct qeth_ipaddr *addr)
799{
800 unsigned long flags;
801 int rc = 0;
802
803 QETH_DBF_TEXT(trace, 4, "addip");
804 if (card->options.layer2)
805 QETH_DBF_HEX(trace, 4, &addr->mac, 6);
806 else if (addr->proto == QETH_PROT_IPV4)
807 QETH_DBF_HEX(trace, 4, &addr->u.a4.addr, 4);
808 else {
809 QETH_DBF_HEX(trace, 4, &addr->u.a6.addr, 8);
810 QETH_DBF_HEX(trace, 4, ((char *)&addr->u.a6.addr) + 8, 8);
811 }
812 spin_lock_irqsave(&card->ip_lock, flags);
813 rc = __qeth_insert_ip_todo(card, addr, 1);
814 spin_unlock_irqrestore(&card->ip_lock, flags);
815 return rc;
816}
817
818static void
819__qeth_delete_all_mc(struct qeth_card *card, unsigned long *flags)
820{
821 struct qeth_ipaddr *addr, *tmp;
822 int rc;
823again:
824 list_for_each_entry_safe(addr, tmp, &card->ip_list, entry) {
825 if (addr->is_multicast) {
826 list_del(&addr->entry);
827 spin_unlock_irqrestore(&card->ip_lock, *flags);
828 rc = qeth_deregister_addr_entry(card, addr);
829 spin_lock_irqsave(&card->ip_lock, *flags);
830 if (!rc) {
831 kfree(addr);
832 goto again;
833 } else
834 list_add(&addr->entry, &card->ip_list);
835 }
836 }
837}
838
839static void
840qeth_set_ip_addr_list(struct qeth_card *card)
841{
842 struct list_head *tbd_list;
843 struct qeth_ipaddr *todo, *addr;
844 unsigned long flags;
845 int rc;
846
847 QETH_DBF_TEXT(trace, 2, "sdiplist");
848 QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
849
850 spin_lock_irqsave(&card->ip_lock, flags);
851 tbd_list = card->ip_tbd_list;
852 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_ATOMIC);
853 if (!card->ip_tbd_list) {
854 QETH_DBF_TEXT(trace, 0, "silnomem");
855 card->ip_tbd_list = tbd_list;
856 spin_unlock_irqrestore(&card->ip_lock, flags);
857 return;
858 } else
859 INIT_LIST_HEAD(card->ip_tbd_list);
860
861 while (!list_empty(tbd_list)){
862 todo = list_entry(tbd_list->next, struct qeth_ipaddr, entry);
863 list_del(&todo->entry);
864 if (todo->type == QETH_IP_TYPE_DEL_ALL_MC){
865 __qeth_delete_all_mc(card, &flags);
866 kfree(todo);
867 continue;
868 }
869 rc = __qeth_ref_ip_on_card(card, todo, &addr);
870 if (rc == 0) {
871
872 kfree(todo);
873 } else if (rc == 1) {
874
875 spin_unlock_irqrestore(&card->ip_lock, flags);
876 rc = qeth_register_addr_entry(card, todo);
877 spin_lock_irqsave(&card->ip_lock, flags);
878 if (!rc)
879 list_add_tail(&todo->entry, &card->ip_list);
880 else
881 kfree(todo);
882 } else if (rc == -1) {
883
884 list_del_init(&addr->entry);
885 spin_unlock_irqrestore(&card->ip_lock, flags);
886 rc = qeth_deregister_addr_entry(card, addr);
887 spin_lock_irqsave(&card->ip_lock, flags);
888 if (!rc)
889 kfree(addr);
890 else
891 list_add_tail(&addr->entry, &card->ip_list);
892 kfree(todo);
893 }
894 }
895 spin_unlock_irqrestore(&card->ip_lock, flags);
896 kfree(tbd_list);
897}
898
899static void qeth_delete_mc_addresses(struct qeth_card *);
900static void qeth_add_multicast_ipv4(struct qeth_card *);
901static void qeth_layer2_add_multicast(struct qeth_card *);
902#ifdef CONFIG_QETH_IPV6
903static void qeth_add_multicast_ipv6(struct qeth_card *);
904#endif
905
906static int
907qeth_set_thread_start_bit(struct qeth_card *card, unsigned long thread)
908{
909 unsigned long flags;
910
911 spin_lock_irqsave(&card->thread_mask_lock, flags);
912 if ( !(card->thread_allowed_mask & thread) ||
913 (card->thread_start_mask & thread) ) {
914 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
915 return -EPERM;
916 }
917 card->thread_start_mask |= thread;
918 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
919 return 0;
920}
921
922static void
923qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
924{
925 unsigned long flags;
926
927 spin_lock_irqsave(&card->thread_mask_lock, flags);
928 card->thread_start_mask &= ~thread;
929 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
930 wake_up(&card->wait_q);
931}
932
933static void
934qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
935{
936 unsigned long flags;
937
938 spin_lock_irqsave(&card->thread_mask_lock, flags);
939 card->thread_running_mask &= ~thread;
940 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
941 wake_up(&card->wait_q);
942}
943
944static int
945__qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
946{
947 unsigned long flags;
948 int rc = 0;
949
950 spin_lock_irqsave(&card->thread_mask_lock, flags);
951 if (card->thread_start_mask & thread){
952 if ((card->thread_allowed_mask & thread) &&
953 !(card->thread_running_mask & thread)){
954 rc = 1;
955 card->thread_start_mask &= ~thread;
956 card->thread_running_mask |= thread;
957 } else
958 rc = -EPERM;
959 }
960 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
961 return rc;
962}
963
964static int
965qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
966{
967 int rc = 0;
968
969 wait_event(card->wait_q,
970 (rc = __qeth_do_run_thread(card, thread)) >= 0);
971 return rc;
972}
973
974static int
975qeth_recover(void *ptr)
976{
977 struct qeth_card *card;
978 int rc = 0;
979
980 card = (struct qeth_card *) ptr;
981 daemonize("qeth_recover");
982 QETH_DBF_TEXT(trace,2,"recover1");
983 QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
984 if (!qeth_do_run_thread(card, QETH_RECOVER_THREAD))
985 return 0;
986 QETH_DBF_TEXT(trace,2,"recover2");
987 PRINT_WARN("Recovery of device %s started ...\n",
988 CARD_BUS_ID(card));
989 card->use_hard_stop = 1;
990 __qeth_set_offline(card->gdev,1);
991 rc = __qeth_set_online(card->gdev,1);
992
993 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
994 qeth_clear_thread_running_bit(card, QETH_RECOVER_THREAD);
995 if (!rc)
996 PRINT_INFO("Device %s successfully recovered!\n",
997 CARD_BUS_ID(card));
998 else
999 PRINT_INFO("Device %s could not be recovered!\n",
1000 CARD_BUS_ID(card));
1001 return 0;
1002}
1003
1004void
1005qeth_schedule_recovery(struct qeth_card *card)
1006{
1007 QETH_DBF_TEXT(trace,2,"startrec");
1008 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
1009 schedule_work(&card->kernel_thread_starter);
1010}
1011
1012static int
1013qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1014{
1015 unsigned long flags;
1016 int rc = 0;
1017
1018 spin_lock_irqsave(&card->thread_mask_lock, flags);
1019 QETH_DBF_TEXT_(trace, 4, " %02x%02x%02x",
1020 (u8) card->thread_start_mask,
1021 (u8) card->thread_allowed_mask,
1022 (u8) card->thread_running_mask);
1023 rc = (card->thread_start_mask & thread);
1024 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1025 return rc;
1026}
1027
1028static void
1029qeth_start_kernel_thread(struct work_struct *work)
1030{
1031 struct qeth_card *card = container_of(work, struct qeth_card, kernel_thread_starter);
1032 QETH_DBF_TEXT(trace , 2, "strthrd");
1033
1034 if (card->read.state != CH_STATE_UP &&
1035 card->write.state != CH_STATE_UP)
1036 return;
1037 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1038 kernel_thread(qeth_recover, (void *) card, SIGCHLD);
1039}
1040
1041
1042static void
1043qeth_set_intial_options(struct qeth_card *card)
1044{
1045 card->options.route4.type = NO_ROUTER;
1046#ifdef CONFIG_QETH_IPV6
1047 card->options.route6.type = NO_ROUTER;
1048#endif
1049 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1050 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1051 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1052 card->options.fake_broadcast = 0;
1053 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1054 card->options.fake_ll = 0;
1055 if (card->info.type == QETH_CARD_TYPE_OSN)
1056 card->options.layer2 = 1;
1057 else
1058 card->options.layer2 = 0;
1059 card->options.performance_stats = 0;
1060 card->options.rx_sg_cb = QETH_RX_SG_CB;
1061}
1062
1063
1064
1065
1066static int
1067qeth_setup_card(struct qeth_card *card)
1068{
1069
1070 QETH_DBF_TEXT(setup, 2, "setupcrd");
1071 QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
1072
1073 card->read.state = CH_STATE_DOWN;
1074 card->write.state = CH_STATE_DOWN;
1075 card->data.state = CH_STATE_DOWN;
1076 card->state = CARD_STATE_DOWN;
1077 card->lan_online = 0;
1078 card->use_hard_stop = 0;
1079 card->dev = NULL;
1080#ifdef CONFIG_QETH_VLAN
1081 spin_lock_init(&card->vlanlock);
1082 card->vlangrp = NULL;
1083#endif
1084 spin_lock_init(&card->lock);
1085 spin_lock_init(&card->ip_lock);
1086 spin_lock_init(&card->thread_mask_lock);
1087 card->thread_start_mask = 0;
1088 card->thread_allowed_mask = 0;
1089 card->thread_running_mask = 0;
1090 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1091 INIT_LIST_HEAD(&card->ip_list);
1092 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1093 if (!card->ip_tbd_list) {
1094 QETH_DBF_TEXT(setup, 0, "iptbdnom");
1095 return -ENOMEM;
1096 }
1097 INIT_LIST_HEAD(card->ip_tbd_list);
1098 INIT_LIST_HEAD(&card->cmd_waiter_list);
1099 init_waitqueue_head(&card->wait_q);
1100
1101 qeth_set_intial_options(card);
1102
1103 INIT_LIST_HEAD(&card->ipato.entries);
1104 card->ipato.enabled = 0;
1105 card->ipato.invert4 = 0;
1106 card->ipato.invert6 = 0;
1107
1108 qeth_init_qdio_info(card);
1109 return 0;
1110}
1111
1112static int
1113is_1920_device (struct qeth_card *card)
1114{
1115 int single_queue = 0;
1116 struct ccw_device *ccwdev;
1117 struct channelPath_dsc {
1118 u8 flags;
1119 u8 lsn;
1120 u8 desc;
1121 u8 chpid;
1122 u8 swla;
1123 u8 zeroes;
1124 u8 chla;
1125 u8 chpp;
1126 } *chp_dsc;
1127
1128 QETH_DBF_TEXT(setup, 2, "chk_1920");
1129
1130 ccwdev = card->data.ccwdev;
1131 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1132 if (chp_dsc != NULL) {
1133
1134 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1135 kfree(chp_dsc);
1136 }
1137 QETH_DBF_TEXT_(setup, 2, "rc:%x", single_queue);
1138 return single_queue;
1139}
1140
1141static int
1142qeth_determine_card_type(struct qeth_card *card)
1143{
1144 int i = 0;
1145
1146 QETH_DBF_TEXT(setup, 2, "detcdtyp");
1147
1148 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1149 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1150 while (known_devices[i][4]) {
1151 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1152 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1153 card->info.type = known_devices[i][4];
1154 card->qdio.no_out_queues = known_devices[i][8];
1155 card->info.is_multicast_different = known_devices[i][9];
1156 if (is_1920_device(card)) {
1157 PRINT_INFO("Priority Queueing not able "
1158 "due to hardware limitations!\n");
1159 card->qdio.no_out_queues = 1;
1160 card->qdio.default_out_queue = 0;
1161 }
1162 return 0;
1163 }
1164 i++;
1165 }
1166 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1167 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
1168 return -ENOENT;
1169}
1170
1171static int
1172qeth_probe_device(struct ccwgroup_device *gdev)
1173{
1174 struct qeth_card *card;
1175 struct device *dev;
1176 unsigned long flags;
1177 int rc;
1178
1179 QETH_DBF_TEXT(setup, 2, "probedev");
1180
1181 dev = &gdev->dev;
1182 if (!get_device(dev))
1183 return -ENODEV;
1184
1185 QETH_DBF_TEXT_(setup, 2, "%s", gdev->dev.bus_id);
1186
1187 card = qeth_alloc_card();
1188 if (!card) {
1189 put_device(dev);
1190 QETH_DBF_TEXT_(setup, 2, "1err%d", -ENOMEM);
1191 return -ENOMEM;
1192 }
1193 card->read.ccwdev = gdev->cdev[0];
1194 card->write.ccwdev = gdev->cdev[1];
1195 card->data.ccwdev = gdev->cdev[2];
1196 gdev->dev.driver_data = card;
1197 card->gdev = gdev;
1198 gdev->cdev[0]->handler = qeth_irq;
1199 gdev->cdev[1]->handler = qeth_irq;
1200 gdev->cdev[2]->handler = qeth_irq;
1201
1202 if ((rc = qeth_determine_card_type(card))){
1203 PRINT_WARN("%s: not a valid card type\n", __func__);
1204 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
1205 put_device(dev);
1206 qeth_free_card(card);
1207 return rc;
1208 }
1209 if ((rc = qeth_setup_card(card))){
1210 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
1211 put_device(dev);
1212 qeth_free_card(card);
1213 return rc;
1214 }
1215 rc = qeth_create_device_attributes(dev);
1216 if (rc) {
1217 put_device(dev);
1218 qeth_free_card(card);
1219 return rc;
1220 }
1221
1222 write_lock_irqsave(&qeth_card_list.rwlock, flags);
1223 list_add_tail(&card->list, &qeth_card_list.list);
1224 write_unlock_irqrestore(&qeth_card_list.rwlock, flags);
1225 return rc;
1226}
1227
1228
1229static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1230 int *length)
1231{
1232 struct ciw *ciw;
1233 char *rcd_buf;
1234 int ret;
1235 struct qeth_channel *channel = &card->data;
1236 unsigned long flags;
1237
1238
1239
1240
1241 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1242 if (!ciw || ciw->cmd == 0)
1243 return -EOPNOTSUPP;
1244 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1245 if (!rcd_buf)
1246 return -ENOMEM;
1247
1248 channel->ccw.cmd_code = ciw->cmd;
1249 channel->ccw.cda = (__u32) __pa (rcd_buf);
1250 channel->ccw.count = ciw->count;
1251 channel->ccw.flags = CCW_FLAG_SLI;
1252 channel->state = CH_STATE_RCD;
1253 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1254 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1255 QETH_RCD_PARM, LPM_ANYPATH, 0,
1256 QETH_RCD_TIMEOUT);
1257 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1258 if (!ret)
1259 wait_event(card->wait_q,
1260 (channel->state == CH_STATE_RCD_DONE ||
1261 channel->state == CH_STATE_DOWN));
1262 if (channel->state == CH_STATE_DOWN)
1263 ret = -EIO;
1264 else
1265 channel->state = CH_STATE_DOWN;
1266 if (ret) {
1267 kfree(rcd_buf);
1268 *buffer = NULL;
1269 *length = 0;
1270 } else {
1271 *length = ciw->count;
1272 *buffer = rcd_buf;
1273 }
1274 return ret;
1275}
1276
1277static int
1278qeth_get_unitaddr(struct qeth_card *card)
1279{
1280 int length;
1281 char *prcd;
1282 int rc;
1283
1284 QETH_DBF_TEXT(setup, 2, "getunit");
1285 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1286 if (rc) {
1287 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
1288 CARD_DDEV_ID(card), rc);
1289 return rc;
1290 }
1291 card->info.chpid = prcd[30];
1292 card->info.unit_addr2 = prcd[31];
1293 card->info.cula = prcd[63];
1294 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1295 (prcd[0x11] == _ascebc['M']));
1296 kfree(prcd);
1297 return 0;
1298}
1299
1300static void
1301qeth_init_tokens(struct qeth_card *card)
1302{
1303 card->token.issuer_rm_w = 0x00010103UL;
1304 card->token.cm_filter_w = 0x00010108UL;
1305 card->token.cm_connection_w = 0x0001010aUL;
1306 card->token.ulp_filter_w = 0x0001010bUL;
1307 card->token.ulp_connection_w = 0x0001010dUL;
1308}
1309
1310static inline __u16
1311raw_devno_from_bus_id(char *id)
1312{
1313 id += (strlen(id) - 4);
1314 return (__u16) simple_strtoul(id, &id, 16);
1315}
1316
1317
1318
1319static void
1320qeth_setup_ccw(struct qeth_channel *channel,unsigned char *iob, __u32 len)
1321{
1322 struct qeth_card *card;
1323
1324 QETH_DBF_TEXT(trace, 4, "setupccw");
1325 card = CARD_FROM_CDEV(channel->ccwdev);
1326 if (channel == &card->read)
1327 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1328 else
1329 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1330 channel->ccw.count = len;
1331 channel->ccw.cda = (__u32) __pa(iob);
1332}
1333
1334
1335
1336
1337static struct qeth_cmd_buffer *
1338__qeth_get_buffer(struct qeth_channel *channel)
1339{
1340 __u8 index;
1341
1342 QETH_DBF_TEXT(trace, 6, "getbuff");
1343 index = channel->io_buf_no;
1344 do {
1345 if (channel->iob[index].state == BUF_STATE_FREE) {
1346 channel->iob[index].state = BUF_STATE_LOCKED;
1347 channel->io_buf_no = (channel->io_buf_no + 1) %
1348 QETH_CMD_BUFFER_NO;
1349 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
1350 return channel->iob + index;
1351 }
1352 index = (index + 1) % QETH_CMD_BUFFER_NO;
1353 } while(index != channel->io_buf_no);
1354
1355 return NULL;
1356}
1357
1358
1359
1360
1361static void
1362qeth_release_buffer(struct qeth_channel *channel, struct qeth_cmd_buffer *iob)
1363{
1364 unsigned long flags;
1365
1366 QETH_DBF_TEXT(trace, 6, "relbuff");
1367 spin_lock_irqsave(&channel->iob_lock, flags);
1368 memset(iob->data, 0, QETH_BUFSIZE);
1369 iob->state = BUF_STATE_FREE;
1370 iob->callback = qeth_send_control_data_cb;
1371 iob->rc = 0;
1372 spin_unlock_irqrestore(&channel->iob_lock, flags);
1373}
1374
1375static struct qeth_cmd_buffer *
1376qeth_get_buffer(struct qeth_channel *channel)
1377{
1378 struct qeth_cmd_buffer *buffer = NULL;
1379 unsigned long flags;
1380
1381 spin_lock_irqsave(&channel->iob_lock, flags);
1382 buffer = __qeth_get_buffer(channel);
1383 spin_unlock_irqrestore(&channel->iob_lock, flags);
1384 return buffer;
1385}
1386
1387static struct qeth_cmd_buffer *
1388qeth_wait_for_buffer(struct qeth_channel *channel)
1389{
1390 struct qeth_cmd_buffer *buffer;
1391 wait_event(channel->wait_q,
1392 ((buffer = qeth_get_buffer(channel)) != NULL));
1393 return buffer;
1394}
1395
1396static void
1397qeth_clear_cmd_buffers(struct qeth_channel *channel)
1398{
1399 int cnt;
1400
1401 for (cnt=0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1402 qeth_release_buffer(channel,&channel->iob[cnt]);
1403 channel->buf_no = 0;
1404 channel->io_buf_no = 0;
1405}
1406
1407
1408
1409
1410static int
1411qeth_idx_activate_get_answer(struct qeth_channel *channel,
1412 void (*idx_reply_cb)(struct qeth_channel *,
1413 struct qeth_cmd_buffer *))
1414{
1415 struct qeth_cmd_buffer *iob;
1416 unsigned long flags;
1417 int rc;
1418 struct qeth_card *card;
1419
1420 QETH_DBF_TEXT(setup, 2, "idxanswr");
1421 card = CARD_FROM_CDEV(channel->ccwdev);
1422 iob = qeth_get_buffer(channel);
1423 iob->callback = idx_reply_cb;
1424 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1425 channel->ccw.count = QETH_BUFSIZE;
1426 channel->ccw.cda = (__u32) __pa(iob->data);
1427
1428 wait_event(card->wait_q,
1429 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1430 QETH_DBF_TEXT(setup, 6, "noirqpnd");
1431 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1432 rc = ccw_device_start(channel->ccwdev,
1433 &channel->ccw,(addr_t) iob, 0, 0);
1434 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1435
1436 if (rc) {
1437 PRINT_ERR("qeth: Error2 in activating channel rc=%d\n",rc);
1438 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
1439 atomic_set(&channel->irq_pending, 0);
1440 wake_up(&card->wait_q);
1441 return rc;
1442 }
1443 rc = wait_event_interruptible_timeout(card->wait_q,
1444 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1445 if (rc == -ERESTARTSYS)
1446 return rc;
1447 if (channel->state != CH_STATE_UP){
1448 rc = -ETIME;
1449 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
1450 qeth_clear_cmd_buffers(channel);
1451 } else
1452 rc = 0;
1453 return rc;
1454}
1455
1456static int
1457qeth_idx_activate_channel(struct qeth_channel *channel,
1458 void (*idx_reply_cb)(struct qeth_channel *,
1459 struct qeth_cmd_buffer *))
1460{
1461 struct qeth_card *card;
1462 struct qeth_cmd_buffer *iob;
1463 unsigned long flags;
1464 __u16 temp;
1465 int rc;
1466
1467 card = CARD_FROM_CDEV(channel->ccwdev);
1468
1469 QETH_DBF_TEXT(setup, 2, "idxactch");
1470
1471 iob = qeth_get_buffer(channel);
1472 iob->callback = idx_reply_cb;
1473 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1474 channel->ccw.count = IDX_ACTIVATE_SIZE;
1475 channel->ccw.cda = (__u32) __pa(iob->data);
1476 if (channel == &card->write) {
1477 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1478 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1479 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1480 card->seqno.trans_hdr++;
1481 } else {
1482 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1483 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1484 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1485 }
1486 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1487 &card->token.issuer_rm_w,QETH_MPC_TOKEN_LENGTH);
1488 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1489 &card->info.func_level,sizeof(__u16));
1490 temp = raw_devno_from_bus_id(CARD_DDEV_ID(card));
1491 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp, 2);
1492 temp = (card->info.cula << 8) + card->info.unit_addr2;
1493 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1494
1495 wait_event(card->wait_q,
1496 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1497 QETH_DBF_TEXT(setup, 6, "noirqpnd");
1498 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1499 rc = ccw_device_start(channel->ccwdev,
1500 &channel->ccw,(addr_t) iob, 0, 0);
1501 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1502
1503 if (rc) {
1504 PRINT_ERR("qeth: Error1 in activating channel. rc=%d\n",rc);
1505 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
1506 atomic_set(&channel->irq_pending, 0);
1507 wake_up(&card->wait_q);
1508 return rc;
1509 }
1510 rc = wait_event_interruptible_timeout(card->wait_q,
1511 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1512 if (rc == -ERESTARTSYS)
1513 return rc;
1514 if (channel->state != CH_STATE_ACTIVATING) {
1515 PRINT_WARN("qeth: IDX activate timed out!\n");
1516 QETH_DBF_TEXT_(setup, 2, "2err%d", -ETIME);
1517 qeth_clear_cmd_buffers(channel);
1518 return -ETIME;
1519 }
1520 return qeth_idx_activate_get_answer(channel,idx_reply_cb);
1521}
1522
1523static int
1524qeth_peer_func_level(int level)
1525{
1526 if ((level & 0xff) == 8)
1527 return (level & 0xff) + 0x400;
1528 if (((level >> 8) & 3) == 1)
1529 return (level & 0xff) + 0x200;
1530 return level;
1531}
1532
1533static void
1534qeth_idx_write_cb(struct qeth_channel *channel, struct qeth_cmd_buffer *iob)
1535{
1536 struct qeth_card *card;
1537 __u16 temp;
1538
1539 QETH_DBF_TEXT(setup ,2, "idxwrcb");
1540
1541 if (channel->state == CH_STATE_DOWN) {
1542 channel->state = CH_STATE_ACTIVATING;
1543 goto out;
1544 }
1545 card = CARD_FROM_CDEV(channel->ccwdev);
1546
1547 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1548 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1549 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1550 "adapter exclusively used by another host\n",
1551 CARD_WDEV_ID(card));
1552 else
1553 PRINT_ERR("IDX_ACTIVATE on write channel device %s: "
1554 "negative reply\n", CARD_WDEV_ID(card));
1555 goto out;
1556 }
1557 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1558 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1559 PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
1560 "function level mismatch "
1561 "(sent: 0x%x, received: 0x%x)\n",
1562 CARD_WDEV_ID(card), card->info.func_level, temp);
1563 goto out;
1564 }
1565 channel->state = CH_STATE_UP;
1566out:
1567 qeth_release_buffer(channel, iob);
1568}
1569
1570static int
1571qeth_check_idx_response(unsigned char *buffer)
1572{
1573 if (!buffer)
1574 return 0;
1575
1576 QETH_DBF_HEX(control, 2, buffer, QETH_DBF_CONTROL_LEN);
1577 if ((buffer[2] & 0xc0) == 0xc0) {
1578 PRINT_WARN("received an IDX TERMINATE "
1579 "with cause code 0x%02x%s\n",
1580 buffer[4],
1581 ((buffer[4] == 0x22) ?
1582 " -- try another portname" : ""));
1583 QETH_DBF_TEXT(trace, 2, "ckidxres");
1584 QETH_DBF_TEXT(trace, 2, " idxterm");
1585 QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
1586 return -EIO;
1587 }
1588 return 0;
1589}
1590
1591static void
1592qeth_idx_read_cb(struct qeth_channel *channel, struct qeth_cmd_buffer *iob)
1593{
1594 struct qeth_card *card;
1595 __u16 temp;
1596
1597 QETH_DBF_TEXT(setup , 2, "idxrdcb");
1598 if (channel->state == CH_STATE_DOWN) {
1599 channel->state = CH_STATE_ACTIVATING;
1600 goto out;
1601 }
1602
1603 card = CARD_FROM_CDEV(channel->ccwdev);
1604 if (qeth_check_idx_response(iob->data)) {
1605 goto out;
1606 }
1607 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1608 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1609 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1610 "adapter exclusively used by another host\n",
1611 CARD_RDEV_ID(card));
1612 else
1613 PRINT_ERR("IDX_ACTIVATE on read channel device %s: "
1614 "negative reply\n", CARD_RDEV_ID(card));
1615 goto out;
1616 }
1617
1618
1619
1620
1621
1622 if ( (!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1623 (card->info.type == QETH_CARD_TYPE_OSAE) )
1624 card->info.portname_required = 1;
1625
1626 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1627 if (temp != qeth_peer_func_level(card->info.func_level)) {
1628 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
1629 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1630 CARD_RDEV_ID(card), card->info.func_level, temp);
1631 goto out;
1632 }
1633 memcpy(&card->token.issuer_rm_r,
1634 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1635 QETH_MPC_TOKEN_LENGTH);
1636 memcpy(&card->info.mcl_level[0],
1637 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1638 channel->state = CH_STATE_UP;
1639out:
1640 qeth_release_buffer(channel,iob);
1641}
1642
1643static int
1644qeth_issue_next_read(struct qeth_card *card)
1645{
1646 int rc;
1647 struct qeth_cmd_buffer *iob;
1648
1649 QETH_DBF_TEXT(trace,5,"issnxrd");
1650 if (card->read.state != CH_STATE_UP)
1651 return -EIO;
1652 iob = qeth_get_buffer(&card->read);
1653 if (!iob) {
1654 PRINT_WARN("issue_next_read failed: no iob available!\n");
1655 return -ENOMEM;
1656 }
1657 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
1658 QETH_DBF_TEXT(trace, 6, "noirqpnd");
1659 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
1660 (addr_t) iob, 0, 0);
1661 if (rc) {
1662 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
1663 atomic_set(&card->read.irq_pending, 0);
1664 qeth_schedule_recovery(card);
1665 wake_up(&card->wait_q);
1666 }
1667 return rc;
1668}
1669
1670static struct qeth_reply *
1671qeth_alloc_reply(struct qeth_card *card)
1672{
1673 struct qeth_reply *reply;
1674
1675 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
1676 if (reply){
1677 atomic_set(&reply->refcnt, 1);
1678 atomic_set(&reply->received, 0);
1679 reply->card = card;
1680 };
1681 return reply;
1682}
1683
1684static void
1685qeth_get_reply(struct qeth_reply *reply)
1686{
1687 WARN_ON(atomic_read(&reply->refcnt) <= 0);
1688 atomic_inc(&reply->refcnt);
1689}
1690
1691static void
1692qeth_put_reply(struct qeth_reply *reply)
1693{
1694 WARN_ON(atomic_read(&reply->refcnt) <= 0);
1695 if (atomic_dec_and_test(&reply->refcnt))
1696 kfree(reply);
1697}
1698
1699static void
1700qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, struct qeth_card *card)
1701{
1702 int rc;
1703 int com;
1704 char * ipa_name;
1705
1706 com = cmd->hdr.command;
1707 rc = cmd->hdr.return_code;
1708 ipa_name = qeth_get_ipa_cmd_name(com);
1709
1710 PRINT_ERR("%s(x%X) for %s returned x%X \"%s\"\n", ipa_name, com,
1711 QETH_CARD_IFNAME(card), rc, qeth_get_ipa_msg(rc));
1712}
1713
1714static struct qeth_ipa_cmd *
1715qeth_check_ipa_data(struct qeth_card *card, struct qeth_cmd_buffer *iob)
1716{
1717 struct qeth_ipa_cmd *cmd = NULL;
1718
1719 QETH_DBF_TEXT(trace,5,"chkipad");
1720 if (IS_IPA(iob->data)){
1721 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
1722 if (IS_IPA_REPLY(cmd)) {
1723 if (cmd->hdr.return_code)
1724 qeth_issue_ipa_msg(cmd, card);
1725 return cmd;
1726 }
1727 else {
1728 switch (cmd->hdr.command) {
1729 case IPA_CMD_STOPLAN:
1730 PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
1731 "there is a network problem or "
1732 "someone pulled the cable or "
1733 "disabled the port.\n",
1734 QETH_CARD_IFNAME(card),
1735 card->info.chpid);
1736 card->lan_online = 0;
1737 if (card->dev && netif_carrier_ok(card->dev))
1738 netif_carrier_off(card->dev);
1739 return NULL;
1740 case IPA_CMD_STARTLAN:
1741 PRINT_INFO("Link reestablished on %s "
1742 "(CHPID 0x%X). Scheduling "
1743 "IP address reset.\n",
1744 QETH_CARD_IFNAME(card),
1745 card->info.chpid);
1746 netif_carrier_on(card->dev);
1747 qeth_schedule_recovery(card);
1748 return NULL;
1749 case IPA_CMD_MODCCID:
1750 return cmd;
1751 case IPA_CMD_REGISTER_LOCAL_ADDR:
1752 QETH_DBF_TEXT(trace,3, "irla");
1753 break;
1754 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
1755 QETH_DBF_TEXT(trace,3, "urla");
1756 break;
1757 default:
1758 PRINT_WARN("Received data is IPA "
1759 "but not a reply!\n");
1760 break;
1761 }
1762 }
1763 }
1764 return cmd;
1765}
1766
1767
1768
1769
1770static void
1771qeth_clear_ipacmd_list(struct qeth_card *card)
1772{
1773 struct qeth_reply *reply, *r;
1774 unsigned long flags;
1775
1776 QETH_DBF_TEXT(trace, 4, "clipalst");
1777
1778 spin_lock_irqsave(&card->lock, flags);
1779 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
1780 qeth_get_reply(reply);
1781 reply->rc = -EIO;
1782 atomic_inc(&reply->received);
1783 list_del_init(&reply->list);
1784 wake_up(&reply->wait_q);
1785 qeth_put_reply(reply);
1786 }
1787 spin_unlock_irqrestore(&card->lock, flags);
1788}
1789
1790static void
1791qeth_send_control_data_cb(struct qeth_channel *channel,
1792 struct qeth_cmd_buffer *iob)
1793{
1794 struct qeth_card *card;
1795 struct qeth_reply *reply, *r;
1796 struct qeth_ipa_cmd *cmd;
1797 unsigned long flags;
1798 int keep_reply;
1799
1800 QETH_DBF_TEXT(trace,4,"sndctlcb");
1801
1802 card = CARD_FROM_CDEV(channel->ccwdev);
1803 if (qeth_check_idx_response(iob->data)) {
1804 qeth_clear_ipacmd_list(card);
1805 qeth_schedule_recovery(card);
1806 goto out;
1807 }
1808
1809 cmd = qeth_check_ipa_data(card, iob);
1810 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
1811 goto out;
1812
1813 if (card->info.type == QETH_CARD_TYPE_OSN &&
1814 cmd &&
1815 cmd->hdr.command != IPA_CMD_STARTLAN &&
1816 card->osn_info.assist_cb != NULL) {
1817 card->osn_info.assist_cb(card->dev, cmd);
1818 goto out;
1819 }
1820
1821 spin_lock_irqsave(&card->lock, flags);
1822 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
1823 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
1824 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
1825 qeth_get_reply(reply);
1826 list_del_init(&reply->list);
1827 spin_unlock_irqrestore(&card->lock, flags);
1828 keep_reply = 0;
1829 if (reply->callback != NULL) {
1830 if (cmd) {
1831 reply->offset = (__u16)((char*)cmd -
1832 (char *)iob->data);
1833 keep_reply = reply->callback(card,
1834 reply,
1835 (unsigned long)cmd);
1836 } else
1837 keep_reply = reply->callback(card,
1838 reply,
1839 (unsigned long)iob);
1840 }
1841 if (cmd)
1842 reply->rc = (u16) cmd->hdr.return_code;
1843 else if (iob->rc)
1844 reply->rc = iob->rc;
1845 if (keep_reply) {
1846 spin_lock_irqsave(&card->lock, flags);
1847 list_add_tail(&reply->list,
1848 &card->cmd_waiter_list);
1849 spin_unlock_irqrestore(&card->lock, flags);
1850 } else {
1851 atomic_inc(&reply->received);
1852 wake_up(&reply->wait_q);
1853 }
1854 qeth_put_reply(reply);
1855 goto out;
1856 }
1857 }
1858 spin_unlock_irqrestore(&card->lock, flags);
1859out:
1860 memcpy(&card->seqno.pdu_hdr_ack,
1861 QETH_PDU_HEADER_SEQ_NO(iob->data),
1862 QETH_SEQ_NO_LENGTH);
1863 qeth_release_buffer(channel,iob);
1864}
1865
1866static void
1867qeth_prepare_control_data(struct qeth_card *card, int len,
1868 struct qeth_cmd_buffer *iob)
1869{
1870 qeth_setup_ccw(&card->write,iob->data,len);
1871 iob->callback = qeth_release_buffer;
1872
1873 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1874 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1875 card->seqno.trans_hdr++;
1876 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1877 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1878 card->seqno.pdu_hdr++;
1879 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1880 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1881 QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
1882}
1883
1884static int
1885qeth_send_control_data(struct qeth_card *card, int len,
1886 struct qeth_cmd_buffer *iob,
1887 int (*reply_cb)
1888 (struct qeth_card *, struct qeth_reply*, unsigned long),
1889 void *reply_param)
1890
1891{
1892 int rc;
1893 unsigned long flags;
1894 struct qeth_reply *reply = NULL;
1895 unsigned long timeout;
1896
1897 QETH_DBF_TEXT(trace, 2, "sendctl");
1898
1899 reply = qeth_alloc_reply(card);
1900 if (!reply) {
1901 PRINT_WARN("Could no alloc qeth_reply!\n");
1902 return -ENOMEM;
1903 }
1904 reply->callback = reply_cb;
1905 reply->param = reply_param;
1906 if (card->state == CARD_STATE_DOWN)
1907 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1908 else
1909 reply->seqno = card->seqno.ipa++;
1910 init_waitqueue_head(&reply->wait_q);
1911 spin_lock_irqsave(&card->lock, flags);
1912 list_add_tail(&reply->list, &card->cmd_waiter_list);
1913 spin_unlock_irqrestore(&card->lock, flags);
1914 QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
1915
1916 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1917 qeth_prepare_control_data(card, len, iob);
1918
1919 if (IS_IPA(iob->data))
1920 timeout = jiffies + QETH_IPA_TIMEOUT;
1921 else
1922 timeout = jiffies + QETH_TIMEOUT;
1923
1924 QETH_DBF_TEXT(trace, 6, "noirqpnd");
1925 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1926 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1927 (addr_t) iob, 0, 0);
1928 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1929 if (rc){
1930 PRINT_WARN("qeth_send_control_data: "
1931 "ccw_device_start rc = %i\n", rc);
1932 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
1933 spin_lock_irqsave(&card->lock, flags);
1934 list_del_init(&reply->list);
1935 qeth_put_reply(reply);
1936 spin_unlock_irqrestore(&card->lock, flags);
1937 qeth_release_buffer(iob->channel, iob);
1938 atomic_set(&card->write.irq_pending, 0);
1939 wake_up(&card->wait_q);
1940 return rc;
1941 }
1942 while (!atomic_read(&reply->received)) {
1943 if (time_after(jiffies, timeout)) {
1944 spin_lock_irqsave(&reply->card->lock, flags);
1945 list_del_init(&reply->list);
1946 spin_unlock_irqrestore(&reply->card->lock, flags);
1947 reply->rc = -ETIME;
1948 atomic_inc(&reply->received);
1949 wake_up(&reply->wait_q);
1950 }
1951 cpu_relax();
1952 };
1953 rc = reply->rc;
1954 qeth_put_reply(reply);
1955 return rc;
1956}
1957
1958static int
1959qeth_osn_send_control_data(struct qeth_card *card, int len,
1960 struct qeth_cmd_buffer *iob)
1961{
1962 unsigned long flags;
1963 int rc = 0;
1964
1965 QETH_DBF_TEXT(trace, 5, "osndctrd");
1966
1967 wait_event(card->wait_q,
1968 atomic_cmpxchg(&card->write.irq_pending, 0, 1) == 0);
1969 qeth_prepare_control_data(card, len, iob);
1970 QETH_DBF_TEXT(trace, 6, "osnoirqp");
1971 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1972 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1973 (addr_t) iob, 0, 0);
1974 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1975 if (rc){
1976 PRINT_WARN("qeth_osn_send_control_data: "
1977 "ccw_device_start rc = %i\n", rc);
1978 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
1979 qeth_release_buffer(iob->channel, iob);
1980 atomic_set(&card->write.irq_pending, 0);
1981 wake_up(&card->wait_q);
1982 }
1983 return rc;
1984}
1985
1986static inline void
1987qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
1988 char prot_type)
1989{
1990 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
1991 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data),&prot_type,1);
1992 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
1993 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
1994}
1995
1996static int
1997qeth_osn_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
1998 int data_len)
1999{
2000 u16 s1, s2;
2001
2002 QETH_DBF_TEXT(trace,4,"osndipa");
2003
2004 qeth_prepare_ipa_cmd(card, iob, QETH_PROT_OSN2);
2005 s1 = (u16)(IPA_PDU_HEADER_SIZE + data_len);
2006 s2 = (u16)data_len;
2007 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
2008 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
2009 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
2010 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
2011 return qeth_osn_send_control_data(card, s1, iob);
2012}
2013
2014static int
2015qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2016 int (*reply_cb)
2017 (struct qeth_card *,struct qeth_reply*, unsigned long),
2018 void *reply_param)
2019{
2020 int rc;
2021 char prot_type;
2022
2023 QETH_DBF_TEXT(trace,4,"sendipa");
2024
2025 if (card->options.layer2)
2026 if (card->info.type == QETH_CARD_TYPE_OSN)
2027 prot_type = QETH_PROT_OSN2;
2028 else
2029 prot_type = QETH_PROT_LAYER2;
2030 else
2031 prot_type = QETH_PROT_TCPIP;
2032 qeth_prepare_ipa_cmd(card,iob,prot_type);
2033 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, iob,
2034 reply_cb, reply_param);
2035 return rc;
2036}
2037
2038
2039static int
2040qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2041 unsigned long data)
2042{
2043 struct qeth_cmd_buffer *iob;
2044
2045 QETH_DBF_TEXT(setup, 2, "cmenblcb");
2046
2047 iob = (struct qeth_cmd_buffer *) data;
2048 memcpy(&card->token.cm_filter_r,
2049 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2050 QETH_MPC_TOKEN_LENGTH);
2051 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
2052 return 0;
2053}
2054
2055static int
2056qeth_cm_enable(struct qeth_card *card)
2057{
2058 int rc;
2059 struct qeth_cmd_buffer *iob;
2060
2061 QETH_DBF_TEXT(setup,2,"cmenable");
2062
2063 iob = qeth_wait_for_buffer(&card->write);
2064 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2065 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2066 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2067 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2068 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2069
2070 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2071 qeth_cm_enable_cb, NULL);
2072 return rc;
2073}
2074
2075static int
2076qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2077 unsigned long data)
2078{
2079
2080 struct qeth_cmd_buffer *iob;
2081
2082 QETH_DBF_TEXT(setup, 2, "cmsetpcb");
2083
2084 iob = (struct qeth_cmd_buffer *) data;
2085 memcpy(&card->token.cm_connection_r,
2086 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2087 QETH_MPC_TOKEN_LENGTH);
2088 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
2089 return 0;
2090}
2091
2092static int
2093qeth_cm_setup(struct qeth_card *card)
2094{
2095 int rc;
2096 struct qeth_cmd_buffer *iob;
2097
2098 QETH_DBF_TEXT(setup,2,"cmsetup");
2099
2100 iob = qeth_wait_for_buffer(&card->write);
2101 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2102 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2103 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2104 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2105 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2106 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2107 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2108 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2109 qeth_cm_setup_cb, NULL);
2110 return rc;
2111
2112}
2113
2114static int
2115qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2116 unsigned long data)
2117{
2118
2119 __u16 mtu, framesize;
2120 __u16 len;
2121 __u8 link_type;
2122 struct qeth_cmd_buffer *iob;
2123
2124 QETH_DBF_TEXT(setup, 2, "ulpenacb");
2125
2126 iob = (struct qeth_cmd_buffer *) data;
2127 memcpy(&card->token.ulp_filter_r,
2128 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2129 QETH_MPC_TOKEN_LENGTH);
2130 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
2131 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2132 mtu = qeth_get_mtu_outof_framesize(framesize);
2133 if (!mtu) {
2134 iob->rc = -EINVAL;
2135 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
2136 return 0;
2137 }
2138 card->info.max_mtu = mtu;
2139 card->info.initial_mtu = mtu;
2140 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2141 } else {
2142 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
2143 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
2144 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2145 }
2146
2147 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2148 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2149 memcpy(&link_type,
2150 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2151 card->info.link_type = link_type;
2152 } else
2153 card->info.link_type = 0;
2154 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
2155 return 0;
2156}
2157
2158static int
2159qeth_ulp_enable(struct qeth_card *card)
2160{
2161 int rc;
2162 char prot_type;
2163 struct qeth_cmd_buffer *iob;
2164
2165
2166 QETH_DBF_TEXT(setup,2,"ulpenabl");
2167
2168 iob = qeth_wait_for_buffer(&card->write);
2169 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2170
2171 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2172 (__u8) card->info.portno;
2173 if (card->options.layer2)
2174 if (card->info.type == QETH_CARD_TYPE_OSN)
2175 prot_type = QETH_PROT_OSN2;
2176 else
2177 prot_type = QETH_PROT_LAYER2;
2178 else
2179 prot_type = QETH_PROT_TCPIP;
2180
2181 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data),&prot_type,1);
2182 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2183 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2184 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2185 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2186 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2187 card->info.portname, 9);
2188 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2189 qeth_ulp_enable_cb, NULL);
2190 return rc;
2191
2192}
2193
2194static int
2195qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2196 unsigned long data)
2197{
2198 struct qeth_cmd_buffer *iob;
2199
2200 QETH_DBF_TEXT(setup, 2, "ulpstpcb");
2201
2202 iob = (struct qeth_cmd_buffer *) data;
2203 memcpy(&card->token.ulp_connection_r,
2204 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2205 QETH_MPC_TOKEN_LENGTH);
2206 QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
2207 return 0;
2208}
2209
2210static int
2211qeth_ulp_setup(struct qeth_card *card)
2212{
2213 int rc;
2214 __u16 temp;
2215 struct qeth_cmd_buffer *iob;
2216 struct ccw_dev_id dev_id;
2217
2218 QETH_DBF_TEXT(setup,2,"ulpsetup");
2219
2220 iob = qeth_wait_for_buffer(&card->write);
2221 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2222
2223 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2224 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2225 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2226 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2227 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2228 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2229
2230 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2231 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2232 temp = (card->info.cula << 8) + card->info.unit_addr2;
2233 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2234 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2235 qeth_ulp_setup_cb, NULL);
2236 return rc;
2237}
2238
2239static inline int
2240qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2241 unsigned int siga_error, const char *dbftext)
2242{
2243 if (qdio_error || siga_error) {
2244 QETH_DBF_TEXT(trace, 2, dbftext);
2245 QETH_DBF_TEXT(qerr, 2, dbftext);
2246 QETH_DBF_TEXT_(qerr, 2, " F15=%02X",
2247 buf->element[15].flags & 0xff);
2248 QETH_DBF_TEXT_(qerr, 2, " F14=%02X",
2249 buf->element[14].flags & 0xff);
2250 QETH_DBF_TEXT_(qerr, 2, " qerr=%X", qdio_error);
2251 QETH_DBF_TEXT_(qerr, 2, " serr=%X", siga_error);
2252 return 1;
2253 }
2254 return 0;
2255}
2256
2257static struct sk_buff *
2258qeth_get_skb(unsigned int length, struct qeth_hdr *hdr)
2259{
2260 struct sk_buff* skb;
2261 int add_len;
2262
2263 add_len = 0;
2264 if (hdr->hdr.osn.id == QETH_HEADER_TYPE_OSN)
2265 add_len = sizeof(struct qeth_hdr);
2266#ifdef CONFIG_QETH_VLAN
2267 else
2268 add_len = VLAN_HLEN;
2269#endif
2270 skb = dev_alloc_skb(length + add_len);
2271 if (skb && add_len)
2272 skb_reserve(skb, add_len);
2273 return skb;
2274}
2275
2276static inline int
2277qeth_create_skb_frag(struct qdio_buffer_element *element,
2278 struct sk_buff **pskb,
2279 int offset, int *pfrag, int data_len)
2280{
2281 struct page *page = virt_to_page(element->addr);
2282 if (*pfrag == 0) {
2283
2284
2285
2286 *pskb = dev_alloc_skb(64 + QETH_FAKE_LL_LEN_ETH);
2287 if (!(*pskb))
2288 return -ENOMEM;
2289 skb_reserve(*pskb, QETH_FAKE_LL_LEN_ETH);
2290 if (data_len <= 64) {
2291 memcpy(skb_put(*pskb, data_len), element->addr + offset,
2292 data_len);
2293 } else {
2294 get_page(page);
2295 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
2296 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
2297 data_len - 64);
2298 (*pskb)->data_len += data_len - 64;
2299 (*pskb)->len += data_len - 64;
2300 (*pskb)->truesize += data_len - 64;
2301 }
2302 } else {
2303 get_page(page);
2304 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
2305 (*pskb)->data_len += data_len;
2306 (*pskb)->len += data_len;
2307 (*pskb)->truesize += data_len;
2308 }
2309 (*pfrag)++;
2310 return 0;
2311}
2312
2313static inline struct qeth_buffer_pool_entry *
2314qeth_find_free_buffer_pool_entry(struct qeth_card *card)
2315{
2316 struct list_head *plh;
2317 struct qeth_buffer_pool_entry *entry;
2318 int i, free;
2319 struct page *page;
2320
2321 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2322 return NULL;
2323
2324 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2325 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2326 free = 1;
2327 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2328 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2329 free = 0;
2330 break;
2331 }
2332 }
2333 if (free) {
2334 list_del_init(&entry->list);
2335 return entry;
2336 }
2337 }
2338
2339
2340 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2341 struct qeth_buffer_pool_entry, list);
2342 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2343 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2344 page = alloc_page(GFP_ATOMIC|GFP_DMA);
2345 if (!page) {
2346 return NULL;
2347 } else {
2348 free_page((unsigned long)entry->elements[i]);
2349 entry->elements[i] = page_address(page);
2350 if (card->options.performance_stats)
2351 card->perf_stats.sg_alloc_page_rx++;
2352 }
2353 }
2354 }
2355 list_del_init(&entry->list);
2356 return entry;
2357}
2358
2359static struct sk_buff *
2360qeth_get_next_skb(struct qeth_card *card, struct qdio_buffer *buffer,
2361 struct qdio_buffer_element **__element, int *__offset,
2362 struct qeth_hdr **hdr)
2363{
2364 struct qdio_buffer_element *element = *__element;
2365 int offset = *__offset;
2366 struct sk_buff *skb = NULL;
2367 int skb_len;
2368 void *data_ptr;
2369 int data_len;
2370 int use_rx_sg = 0;
2371 int frag = 0;
2372
2373 QETH_DBF_TEXT(trace,6,"nextskb");
2374
2375 if (element->length < offset + sizeof(struct qeth_hdr)){
2376 if (qeth_is_last_sbale(element))
2377 return NULL;
2378 element++;
2379 offset = 0;
2380 if (element->length < sizeof(struct qeth_hdr))
2381 return NULL;
2382 }
2383 *hdr = element->addr + offset;
2384
2385 offset += sizeof(struct qeth_hdr);
2386 if (card->options.layer2)
2387 if (card->info.type == QETH_CARD_TYPE_OSN)
2388 skb_len = (*hdr)->hdr.osn.pdu_length;
2389 else
2390 skb_len = (*hdr)->hdr.l2.pkt_length;
2391 else
2392 skb_len = (*hdr)->hdr.l3.length;
2393
2394 if (!skb_len)
2395 return NULL;
2396 if ((skb_len >= card->options.rx_sg_cb) &&
2397 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
2398 (!atomic_read(&card->force_alloc_skb))) {
2399 use_rx_sg = 1;
2400 } else {
2401 if (card->options.fake_ll) {
2402 if (card->dev->type == ARPHRD_IEEE802_TR) {
2403 if (!(skb = qeth_get_skb(skb_len +
2404 QETH_FAKE_LL_LEN_TR, *hdr)))
2405 goto no_mem;
2406 skb_reserve(skb, QETH_FAKE_LL_LEN_TR);
2407 } else {
2408 if (!(skb = qeth_get_skb(skb_len +
2409 QETH_FAKE_LL_LEN_ETH, *hdr)))
2410 goto no_mem;
2411 skb_reserve(skb, QETH_FAKE_LL_LEN_ETH);
2412 }
2413 } else {
2414 skb = qeth_get_skb(skb_len, *hdr);
2415 if (!skb)
2416 goto no_mem;
2417 }
2418 }
2419
2420 data_ptr = element->addr + offset;
2421 while (skb_len) {
2422 data_len = min(skb_len, (int)(element->length - offset));
2423 if (data_len) {
2424 if (use_rx_sg) {
2425 if (qeth_create_skb_frag(element, &skb, offset,
2426 &frag, data_len))
2427 goto no_mem;
2428 } else {
2429 memcpy(skb_put(skb, data_len), data_ptr,
2430 data_len);
2431 }
2432 }
2433 skb_len -= data_len;
2434 if (skb_len){
2435 if (qeth_is_last_sbale(element)){
2436 QETH_DBF_TEXT(trace,4,"unexeob");
2437 QETH_DBF_TEXT_(trace,4,"%s",CARD_BUS_ID(card));
2438 QETH_DBF_TEXT(qerr,2,"unexeob");
2439 QETH_DBF_TEXT_(qerr,2,"%s",CARD_BUS_ID(card));
2440 QETH_DBF_HEX(misc,4,buffer,sizeof(*buffer));
2441 dev_kfree_skb_any(skb);
2442 card->stats.rx_errors++;
2443 return NULL;
2444 }
2445 element++;
2446 offset = 0;
2447 data_ptr = element->addr;
2448 } else {
2449 offset += data_len;
2450 }
2451 }
2452 *__element = element;
2453 *__offset = offset;
2454 if (use_rx_sg && card->options.performance_stats) {
2455 card->perf_stats.sg_skbs_rx++;
2456 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
2457 }
2458 return skb;
2459no_mem:
2460 if (net_ratelimit()){
2461 PRINT_WARN("No memory for packet received on %s.\n",
2462 QETH_CARD_IFNAME(card));
2463 QETH_DBF_TEXT(trace,2,"noskbmem");
2464 QETH_DBF_TEXT_(trace,2,"%s",CARD_BUS_ID(card));
2465 }
2466 card->stats.rx_dropped++;
2467 return NULL;
2468}
2469
2470static __be16
2471qeth_type_trans(struct sk_buff *skb, struct net_device *dev)
2472{
2473 struct qeth_card *card;
2474 struct ethhdr *eth;
2475
2476 QETH_DBF_TEXT(trace,6,"typtrans");
2477
2478 card = (struct qeth_card *)dev->priv;
2479#ifdef CONFIG_TR
2480 if ((card->info.link_type == QETH_LINK_TYPE_HSTR) ||
2481 (card->info.link_type == QETH_LINK_TYPE_LANE_TR))
2482 return tr_type_trans(skb,dev);
2483#endif
2484 skb_reset_mac_header(skb);
2485 skb_pull(skb, ETH_HLEN );
2486 eth = eth_hdr(skb);
2487
2488 if (*eth->h_dest & 1) {
2489 if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN) == 0)
2490 skb->pkt_type = PACKET_BROADCAST;
2491 else
2492 skb->pkt_type = PACKET_MULTICAST;
2493 } else if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
2494 skb->pkt_type = PACKET_OTHERHOST;
2495
2496 if (ntohs(eth->h_proto) >= 1536)
2497 return eth->h_proto;
2498 if (*(unsigned short *) (skb->data) == 0xFFFF)
2499 return htons(ETH_P_802_3);
2500 return htons(ETH_P_802_2);
2501}
2502
2503static void
2504qeth_rebuild_skb_fake_ll_tr(struct qeth_card *card, struct sk_buff *skb,
2505 struct qeth_hdr *hdr)
2506{
2507 struct trh_hdr *fake_hdr;
2508 struct trllc *fake_llc;
2509 struct iphdr *ip_hdr;
2510
2511 QETH_DBF_TEXT(trace,5,"skbfktr");
2512 skb_set_mac_header(skb, (int)-QETH_FAKE_LL_LEN_TR);
2513
2514 fake_hdr = tr_hdr(skb);
2515
2516
2517 switch (skb->pkt_type){
2518 case PACKET_MULTICAST:
2519 switch (skb->protocol){
2520#ifdef CONFIG_QETH_IPV6
2521 case __constant_htons(ETH_P_IPV6):
2522 ndisc_mc_map((struct in6_addr *)
2523 skb->data + QETH_FAKE_LL_V6_ADDR_POS,
2524 fake_hdr->daddr, card->dev, 0);
2525 break;
2526#endif
2527 case __constant_htons(ETH_P_IP):
2528 ip_hdr = (struct iphdr *)skb->data;
2529 ip_tr_mc_map(ip_hdr->daddr, fake_hdr->daddr);
2530 break;
2531 default:
2532 memcpy(fake_hdr->daddr, card->dev->dev_addr, TR_ALEN);
2533 }
2534 break;
2535 case PACKET_BROADCAST:
2536 memset(fake_hdr->daddr, 0xff, TR_ALEN);
2537 break;
2538 default:
2539 memcpy(fake_hdr->daddr, card->dev->dev_addr, TR_ALEN);
2540 }
2541
2542 if (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_SRC_MAC_ADDR)
2543 memcpy(fake_hdr->saddr, &hdr->hdr.l3.dest_addr[2], TR_ALEN);
2544 else
2545 memset(fake_hdr->saddr, 0, TR_ALEN);
2546 fake_hdr->rcf=0;
2547 fake_llc = (struct trllc*)&(fake_hdr->rcf);
2548 fake_llc->dsap = EXTENDED_SAP;
2549 fake_llc->ssap = EXTENDED_SAP;
2550 fake_llc->llc = UI_CMD;
2551 fake_llc->protid[0] = 0;
2552 fake_llc->protid[1] = 0;
2553 fake_llc->protid[2] = 0;
2554 fake_llc->ethertype = ETH_P_IP;
2555}
2556
2557static void
2558qeth_rebuild_skb_fake_ll_eth(struct qeth_card *card, struct sk_buff *skb,
2559 struct qeth_hdr *hdr)
2560{
2561 struct ethhdr *fake_hdr;
2562 struct iphdr *ip_hdr;
2563
2564 QETH_DBF_TEXT(trace,5,"skbfketh");
2565 skb_set_mac_header(skb, -QETH_FAKE_LL_LEN_ETH);
2566
2567 fake_hdr = eth_hdr(skb);
2568
2569
2570 switch (skb->pkt_type){
2571 case PACKET_MULTICAST:
2572 switch (skb->protocol){
2573#ifdef CONFIG_QETH_IPV6
2574 case __constant_htons(ETH_P_IPV6):
2575 ndisc_mc_map((struct in6_addr *)
2576 skb->data + QETH_FAKE_LL_V6_ADDR_POS,
2577 fake_hdr->h_dest, card->dev, 0);
2578 break;
2579#endif
2580 case __constant_htons(ETH_P_IP):
2581 ip_hdr = (struct iphdr *)skb->data;
2582 ip_eth_mc_map(ip_hdr->daddr, fake_hdr->h_dest);
2583 break;
2584 default:
2585 memcpy(fake_hdr->h_dest, card->dev->dev_addr, ETH_ALEN);
2586 }
2587 break;
2588 case PACKET_BROADCAST:
2589 memset(fake_hdr->h_dest, 0xff, ETH_ALEN);
2590 break;
2591 default:
2592 memcpy(fake_hdr->h_dest, card->dev->dev_addr, ETH_ALEN);
2593 }
2594
2595 if (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_SRC_MAC_ADDR)
2596 memcpy(fake_hdr->h_source, &hdr->hdr.l3.dest_addr[2], ETH_ALEN);
2597 else
2598 memset(fake_hdr->h_source, 0, ETH_ALEN);
2599
2600 fake_hdr->h_proto = skb->protocol;
2601}
2602
2603static inline void
2604qeth_rebuild_skb_fake_ll(struct qeth_card *card, struct sk_buff *skb,
2605 struct qeth_hdr *hdr)
2606{
2607 if (card->dev->type == ARPHRD_IEEE802_TR)
2608 qeth_rebuild_skb_fake_ll_tr(card, skb, hdr);
2609 else
2610 qeth_rebuild_skb_fake_ll_eth(card, skb, hdr);
2611}
2612
2613static inline void
2614qeth_layer2_rebuild_skb(struct qeth_card *card, struct sk_buff *skb,
2615 struct qeth_hdr *hdr)
2616{
2617 skb->pkt_type = PACKET_HOST;
2618 skb->protocol = qeth_type_trans(skb, skb->dev);
2619 if (card->options.checksum_type == NO_CHECKSUMMING)
2620 skb->ip_summed = CHECKSUM_UNNECESSARY;
2621 else
2622 skb->ip_summed = CHECKSUM_NONE;
2623 *((__u32 *)skb->cb) = ++card->seqno.pkt_seqno;
2624}
2625
2626static __u16
2627qeth_rebuild_skb(struct qeth_card *card, struct sk_buff *skb,
2628 struct qeth_hdr *hdr)
2629{
2630 unsigned short vlan_id = 0;
2631#ifdef CONFIG_QETH_IPV6
2632 if (hdr->hdr.l3.flags & QETH_HDR_PASSTHRU) {
2633 skb->pkt_type = PACKET_HOST;
2634 skb->protocol = qeth_type_trans(skb, card->dev);
2635 return 0;
2636 }
2637#endif
2638 skb->protocol = htons((hdr->hdr.l3.flags & QETH_HDR_IPV6)? ETH_P_IPV6 :
2639 ETH_P_IP);
2640 switch (hdr->hdr.l3.flags & QETH_HDR_CAST_MASK){
2641 case QETH_CAST_UNICAST:
2642 skb->pkt_type = PACKET_HOST;
2643 break;
2644 case QETH_CAST_MULTICAST:
2645 skb->pkt_type = PACKET_MULTICAST;
2646 card->stats.multicast++;
2647 break;
2648 case QETH_CAST_BROADCAST:
2649 skb->pkt_type = PACKET_BROADCAST;
2650 card->stats.multicast++;
2651 break;
2652 case QETH_CAST_ANYCAST:
2653 case QETH_CAST_NOCAST:
2654 default:
2655 skb->pkt_type = PACKET_HOST;
2656 }
2657
2658 if (hdr->hdr.l3.ext_flags &
2659 (QETH_HDR_EXT_VLAN_FRAME | QETH_HDR_EXT_INCLUDE_VLAN_TAG)) {
2660 vlan_id = (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_VLAN_FRAME)?
2661 hdr->hdr.l3.vlan_id : *((u16 *)&hdr->hdr.l3.dest_addr[12]);
2662 }
2663
2664 if (card->options.fake_ll)
2665 qeth_rebuild_skb_fake_ll(card, skb, hdr);
2666 else
2667 skb_reset_mac_header(skb);
2668 skb->ip_summed = card->options.checksum_type;
2669 if (card->options.checksum_type == HW_CHECKSUMMING){
2670 if ( (hdr->hdr.l3.ext_flags &
2671 (QETH_HDR_EXT_CSUM_HDR_REQ |
2672 QETH_HDR_EXT_CSUM_TRANSP_REQ)) ==
2673 (QETH_HDR_EXT_CSUM_HDR_REQ |
2674 QETH_HDR_EXT_CSUM_TRANSP_REQ) )
2675 skb->ip_summed = CHECKSUM_UNNECESSARY;
2676 else
2677 skb->ip_summed = SW_CHECKSUMMING;
2678 }
2679 return vlan_id;
2680}
2681
2682static void
2683qeth_process_inbound_buffer(struct qeth_card *card,
2684 struct qeth_qdio_buffer *buf, int index)
2685{
2686 struct qdio_buffer_element *element;
2687 struct sk_buff *skb;
2688 struct qeth_hdr *hdr;
2689 int offset;
2690 int rxrc;
2691 __u16 vlan_tag = 0;
2692
2693
2694 element = (struct qdio_buffer_element *)&buf->buffer->element[0];
2695 offset = 0;
2696 if (card->options.performance_stats)
2697 card->perf_stats.bufs_rec++;
2698 while((skb = qeth_get_next_skb(card, buf->buffer, &element,
2699 &offset, &hdr))) {
2700 skb->dev = card->dev;
2701 if (hdr->hdr.l2.id == QETH_HEADER_TYPE_LAYER2)
2702 qeth_layer2_rebuild_skb(card, skb, hdr);
2703 else if (hdr->hdr.l3.id == QETH_HEADER_TYPE_LAYER3)
2704 vlan_tag = qeth_rebuild_skb(card, skb, hdr);
2705 else if (hdr->hdr.osn.id == QETH_HEADER_TYPE_OSN) {
2706 skb_push(skb, sizeof(struct qeth_hdr));
2707 skb_copy_to_linear_data(skb, hdr,
2708 sizeof(struct qeth_hdr));
2709 } else {
2710 dev_kfree_skb_any(skb);
2711 QETH_DBF_TEXT(trace, 3, "inbunkno");
2712 QETH_DBF_HEX(control, 3, hdr, QETH_DBF_CONTROL_LEN);
2713 continue;
2714 }
2715
2716 if (!(card->dev->flags & IFF_UP)){
2717 dev_kfree_skb_any(skb);
2718 continue;
2719 }
2720 if (card->info.type == QETH_CARD_TYPE_OSN)
2721 rxrc = card->osn_info.data_cb(skb);
2722 else
2723#ifdef CONFIG_QETH_VLAN
2724 if (vlan_tag)
2725 if (card->vlangrp)
2726 vlan_hwaccel_rx(skb, card->vlangrp, vlan_tag);
2727 else {
2728 dev_kfree_skb_any(skb);
2729 continue;
2730 }
2731 else
2732#endif
2733 rxrc = netif_rx(skb);
2734 card->dev->last_rx = jiffies;
2735 card->stats.rx_packets++;
2736 card->stats.rx_bytes += skb->len;
2737 }
2738}
2739
2740static int
2741qeth_init_input_buffer(struct qeth_card *card, struct qeth_qdio_buffer *buf)
2742{
2743 struct qeth_buffer_pool_entry *pool_entry;
2744 int i;
2745
2746 pool_entry = qeth_find_free_buffer_pool_entry(card);
2747 if (!pool_entry)
2748 return 1;
2749
2750
2751
2752
2753
2754
2755 BUG_ON(!pool_entry);
2756
2757 buf->pool_entry = pool_entry;
2758 for(i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i){
2759 buf->buffer->element[i].length = PAGE_SIZE;
2760 buf->buffer->element[i].addr = pool_entry->elements[i];
2761 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2762 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2763 else
2764 buf->buffer->element[i].flags = 0;
2765 }
2766 buf->state = QETH_QDIO_BUF_EMPTY;
2767 return 0;
2768}
2769
2770static void
2771qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
2772 struct qeth_qdio_out_buffer *buf)
2773{
2774 int i;
2775 struct sk_buff *skb;
2776
2777
2778 if (buf->buffer->element[0].flags & 0x40)
2779 atomic_dec(&queue->set_pci_flags_count);
2780
2781 while ((skb = skb_dequeue(&buf->skb_list))){
2782 atomic_dec(&skb->users);
2783 dev_kfree_skb_any(skb);
2784 }
2785 qeth_eddp_buf_release_contexts(buf);
2786 for(i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i){
2787 buf->buffer->element[i].length = 0;
2788 buf->buffer->element[i].addr = NULL;
2789 buf->buffer->element[i].flags = 0;
2790 }
2791 buf->next_element_to_fill = 0;
2792 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
2793}
2794
2795static void
2796qeth_queue_input_buffer(struct qeth_card *card, int index)
2797{
2798 struct qeth_qdio_q *queue = card->qdio.in_q;
2799 int count;
2800 int i;
2801 int rc;
2802 int newcount = 0;
2803
2804 QETH_DBF_TEXT(trace,6,"queinbuf");
2805 count = (index < queue->next_buf_to_init)?
2806 card->qdio.in_buf_pool.buf_count -
2807 (queue->next_buf_to_init - index) :
2808 card->qdio.in_buf_pool.buf_count -
2809 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2810
2811 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)){
2812 for (i = queue->next_buf_to_init;
2813 i < queue->next_buf_to_init + count; ++i) {
2814 if (qeth_init_input_buffer(card,
2815 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2816 break;
2817 } else {
2818 newcount++;
2819 }
2820 }
2821
2822 if (newcount < count) {
2823
2824
2825 if (!atomic_read(&card->force_alloc_skb) &&
2826 net_ratelimit())
2827 PRINT_WARN("Switch to alloc skb\n");
2828 atomic_set(&card->force_alloc_skb, 3);
2829 count = newcount;
2830 } else {
2831 if ((atomic_read(&card->force_alloc_skb) == 1) &&
2832 net_ratelimit())
2833 PRINT_WARN("Switch to sg\n");
2834 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2835 }
2836
2837
2838
2839
2840
2841
2842
2843
2844 if (card->options.performance_stats) {
2845 card->perf_stats.inbound_do_qdio_cnt++;
2846 card->perf_stats.inbound_do_qdio_start_time =
2847 qeth_get_micros();
2848 }
2849 rc = do_QDIO(CARD_DDEV(card),
2850 QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
2851 0, queue->next_buf_to_init, count, NULL);
2852 if (card->options.performance_stats)
2853 card->perf_stats.inbound_do_qdio_time +=
2854 qeth_get_micros() -
2855 card->perf_stats.inbound_do_qdio_start_time;
2856 if (rc){
2857 PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
2858 "return %i (device %s).\n",
2859 rc, CARD_DDEV_ID(card));
2860 QETH_DBF_TEXT(trace,2,"qinberr");
2861 QETH_DBF_TEXT_(trace,2,"%s",CARD_BUS_ID(card));
2862 }
2863 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2864 QDIO_MAX_BUFFERS_PER_Q;
2865 }
2866}
2867
2868static inline void
2869qeth_put_buffer_pool_entry(struct qeth_card *card,
2870 struct qeth_buffer_pool_entry *entry)
2871{
2872 QETH_DBF_TEXT(trace, 6, "ptbfplen");
2873 list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
2874}
2875
2876static void
2877qeth_qdio_input_handler(struct ccw_device * ccwdev, unsigned int status,
2878 unsigned int qdio_err, unsigned int siga_err,
2879 unsigned int queue, int first_element, int count,
2880 unsigned long card_ptr)
2881{
2882 struct net_device *net_dev;
2883 struct qeth_card *card;
2884 struct qeth_qdio_buffer *buffer;
2885 int index;
2886 int i;
2887
2888 QETH_DBF_TEXT(trace, 6, "qdinput");
2889 card = (struct qeth_card *) card_ptr;
2890 net_dev = card->dev;
2891 if (card->options.performance_stats) {
2892 card->perf_stats.inbound_cnt++;
2893 card->perf_stats.inbound_start_time = qeth_get_micros();
2894 }
2895 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
2896 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION){
2897 QETH_DBF_TEXT(trace, 1,"qdinchk");
2898 QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
2899 QETH_DBF_TEXT_(trace,1,"%04X%04X",first_element,count);
2900 QETH_DBF_TEXT_(trace,1,"%04X%04X", queue, status);
2901 qeth_schedule_recovery(card);
2902 return;
2903 }
2904 }
2905 for (i = first_element; i < (first_element + count); ++i) {
2906 index = i % QDIO_MAX_BUFFERS_PER_Q;
2907 buffer = &card->qdio.in_q->bufs[index];
2908 if (!((status & QDIO_STATUS_LOOK_FOR_ERROR) &&
2909 qeth_check_qdio_errors(buffer->buffer,
2910 qdio_err, siga_err,"qinerr")))
2911 qeth_process_inbound_buffer(card, buffer, index);
2912
2913 qeth_put_buffer_pool_entry(card, buffer->pool_entry);
2914 qeth_queue_input_buffer(card, index);
2915 }
2916 if (card->options.performance_stats)
2917 card->perf_stats.inbound_time += qeth_get_micros() -
2918 card->perf_stats.inbound_start_time;
2919}
2920
2921static int
2922qeth_handle_send_error(struct qeth_card *card,
2923 struct qeth_qdio_out_buffer *buffer,
2924 unsigned int qdio_err, unsigned int siga_err)
2925{
2926 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2927 int cc = siga_err & 3;
2928
2929 QETH_DBF_TEXT(trace, 6, "hdsnderr");
2930 qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
2931 switch (cc) {
2932 case 0:
2933 if (qdio_err){
2934 QETH_DBF_TEXT(trace, 1,"lnkfail");
2935 QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
2936 QETH_DBF_TEXT_(trace,1,"%04x %02x",
2937 (u16)qdio_err, (u8)sbalf15);
2938 return QETH_SEND_ERROR_LINK_FAILURE;
2939 }
2940 return QETH_SEND_ERROR_NONE;
2941 case 2:
2942 if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
2943 QETH_DBF_TEXT(trace, 1, "SIGAcc2B");
2944 QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
2945 return QETH_SEND_ERROR_KICK_IT;
2946 }
2947 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2948 return QETH_SEND_ERROR_RETRY;
2949 return QETH_SEND_ERROR_LINK_FAILURE;
2950
2951 case 1:
2952 QETH_DBF_TEXT(trace, 1, "SIGAcc1");
2953 QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
2954 return QETH_SEND_ERROR_LINK_FAILURE;
2955 case 3:
2956 default:
2957 QETH_DBF_TEXT(trace, 1, "SIGAcc3");
2958 QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
2959 return QETH_SEND_ERROR_KICK_IT;
2960 }
2961}
2962
2963void
2964qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
2965 int index, int count)
2966{
2967 struct qeth_qdio_out_buffer *buf;
2968 int rc;
2969 int i;
2970 unsigned int qdio_flags;
2971
2972 QETH_DBF_TEXT(trace, 6, "flushbuf");
2973
2974 for (i = index; i < index + count; ++i) {
2975 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2976 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2977 SBAL_FLAGS_LAST_ENTRY;
2978
2979 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2980 continue;
2981
2982 if (!queue->do_pack){
2983 if ((atomic_read(&queue->used_buffers) >=
2984 (QETH_HIGH_WATERMARK_PACK -
2985 QETH_WATERMARK_PACK_FUZZ)) &&
2986 !atomic_read(&queue->set_pci_flags_count)){
2987
2988
2989 atomic_inc(&queue->set_pci_flags_count);
2990 buf->buffer->element[0].flags |= 0x40;
2991 }
2992 } else {
2993 if (!atomic_read(&queue->set_pci_flags_count)){
2994
2995
2996
2997
2998
2999
3000
3001
3002 atomic_inc(&queue->set_pci_flags_count);
3003 buf->buffer->element[0].flags |= 0x40;
3004 }
3005 }
3006 }
3007
3008 queue->card->dev->trans_start = jiffies;
3009 if (queue->card->options.performance_stats) {
3010 queue->card->perf_stats.outbound_do_qdio_cnt++;
3011 queue->card->perf_stats.outbound_do_qdio_start_time =
3012 qeth_get_micros();
3013 }
3014 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3015 if (under_int)
3016 qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
3017 if (atomic_read(&queue->set_pci_flags_count))
3018 qdio_flags |= QDIO_FLAG_PCI_OUT;
3019 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3020 queue->queue_no, index, count, NULL);
3021 if (queue->card->options.performance_stats)
3022 queue->card->perf_stats.outbound_do_qdio_time +=
3023 qeth_get_micros() -
3024 queue->card->perf_stats.outbound_do_qdio_start_time;
3025 if (rc){
3026 QETH_DBF_TEXT(trace, 2, "flushbuf");
3027 QETH_DBF_TEXT_(trace, 2, " err%d", rc);
3028 QETH_DBF_TEXT_(trace, 2, "%s", CARD_DDEV_ID(queue->card));
3029 queue->card->stats.tx_errors += count;
3030
3031
3032 qeth_schedule_recovery(queue->card);
3033 return;
3034 }
3035 atomic_add(count, &queue->used_buffers);
3036 if (queue->card->options.performance_stats)
3037 queue->card->perf_stats.bufs_sent += count;
3038}
3039
3040
3041
3042
3043
3044static void
3045qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3046{
3047 if (!queue->do_pack) {
3048 if (atomic_read(&queue->used_buffers)
3049 >= QETH_HIGH_WATERMARK_PACK){
3050
3051 QETH_DBF_TEXT(trace, 6, "np->pack");
3052 if (queue->card->options.performance_stats)
3053 queue->card->perf_stats.sc_dp_p++;
3054 queue->do_pack = 1;
3055 }
3056 }
3057}
3058
3059
3060
3061
3062
3063
3064
3065static int
3066qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3067{
3068 struct qeth_qdio_out_buffer *buffer;
3069 int flush_count = 0;
3070
3071 if (queue->do_pack) {
3072 if (atomic_read(&queue->used_buffers)
3073 <= QETH_LOW_WATERMARK_PACK) {
3074
3075 QETH_DBF_TEXT(trace, 6, "pack->np");
3076 if (queue->card->options.performance_stats)
3077 queue->card->perf_stats.sc_p_dp++;
3078 queue->do_pack = 0;
3079
3080 buffer = &queue->bufs[queue->next_buf_to_fill];
3081 if ((atomic_read(&buffer->state) ==
3082 QETH_QDIO_BUF_EMPTY) &&
3083 (buffer->next_element_to_fill > 0)) {
3084 atomic_set(&buffer->state,QETH_QDIO_BUF_PRIMED);
3085 flush_count++;
3086 queue->next_buf_to_fill =
3087 (queue->next_buf_to_fill + 1) %
3088 QDIO_MAX_BUFFERS_PER_Q;
3089 }
3090 }
3091 }
3092 return flush_count;
3093}
3094
3095
3096
3097
3098
3099
3100static int
3101qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3102{
3103 struct qeth_qdio_out_buffer *buffer;
3104
3105 buffer = &queue->bufs[queue->next_buf_to_fill];
3106 if((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3107 (buffer->next_element_to_fill > 0)){
3108
3109 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3110 queue->next_buf_to_fill =
3111 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3112 return 1;
3113 }
3114 return 0;
3115}
3116
3117static void
3118qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3119{
3120 int index;
3121 int flush_cnt = 0;
3122 int q_was_packing = 0;
3123
3124
3125
3126
3127
3128 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3129 !atomic_read(&queue->set_pci_flags_count)){
3130 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3131 QETH_OUT_Q_UNLOCKED) {
3132
3133
3134
3135
3136
3137 netif_stop_queue(queue->card->dev);
3138 index = queue->next_buf_to_fill;
3139 q_was_packing = queue->do_pack;
3140 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3141 if (!flush_cnt &&
3142 !atomic_read(&queue->set_pci_flags_count))
3143 flush_cnt +=
3144 qeth_flush_buffers_on_no_pci(queue);
3145 if (queue->card->options.performance_stats &&
3146 q_was_packing)
3147 queue->card->perf_stats.bufs_sent_pack +=
3148 flush_cnt;
3149 if (flush_cnt)
3150 qeth_flush_buffers(queue, 1, index, flush_cnt);
3151 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3152 }
3153 }
3154}
3155
3156static void
3157qeth_qdio_output_handler(struct ccw_device * ccwdev, unsigned int status,
3158 unsigned int qdio_error, unsigned int siga_error,
3159 unsigned int __queue, int first_element, int count,
3160 unsigned long card_ptr)
3161{
3162 struct qeth_card *card = (struct qeth_card *) card_ptr;
3163 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3164 struct qeth_qdio_out_buffer *buffer;
3165 int i;
3166
3167 QETH_DBF_TEXT(trace, 6, "qdouhdl");
3168 if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
3169 if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION){
3170 QETH_DBF_TEXT(trace, 2, "achkcond");
3171 QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
3172 QETH_DBF_TEXT_(trace, 2, "%08x", status);
3173 netif_stop_queue(card->dev);
3174 qeth_schedule_recovery(card);
3175 return;
3176 }
3177 }
3178 if (card->options.performance_stats) {
3179 card->perf_stats.outbound_handler_cnt++;
3180 card->perf_stats.outbound_handler_start_time =
3181 qeth_get_micros();
3182 }
3183 for(i = first_element; i < (first_element + count); ++i){
3184 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
3185
3186 if (qeth_handle_send_error(card, buffer,
3187 qdio_error, siga_error)
3188 == QETH_SEND_ERROR_KICK_IT){
3189 netif_stop_queue(card->dev);
3190 qeth_schedule_recovery(card);
3191 return;
3192 }
3193 qeth_clear_output_buffer(queue, buffer);
3194 }
3195 atomic_sub(count, &queue->used_buffers);
3196
3197 if (card->info.type != QETH_CARD_TYPE_IQD)
3198 qeth_check_outbound_queue(queue);
3199
3200 netif_wake_queue(queue->card->dev);
3201 if (card->options.performance_stats)
3202 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3203 card->perf_stats.outbound_handler_start_time;
3204}
3205
3206static void
3207qeth_create_qib_param_field(struct qeth_card *card, char *param_field)
3208{
3209
3210 param_field[0] = _ascebc['P'];
3211 param_field[1] = _ascebc['C'];
3212 param_field[2] = _ascebc['I'];
3213 param_field[3] = _ascebc['T'];
3214 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
3215 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
3216 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
3217}
3218
3219static void
3220qeth_create_qib_param_field_blkt(struct qeth_card *card, char *param_field)
3221{
3222 param_field[16] = _ascebc['B'];
3223 param_field[17] = _ascebc['L'];
3224 param_field[18] = _ascebc['K'];
3225 param_field[19] = _ascebc['T'];
3226 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
3227 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
3228 *((unsigned int *) (¶m_field[28])) = card->info.blkt.inter_packet_jumbo;
3229}
3230
3231static void
3232qeth_initialize_working_pool_list(struct qeth_card *card)
3233{
3234 struct qeth_buffer_pool_entry *entry;
3235
3236 QETH_DBF_TEXT(trace,5,"inwrklst");
3237
3238 list_for_each_entry(entry,
3239 &card->qdio.init_pool.entry_list, init_list) {
3240 qeth_put_buffer_pool_entry(card,entry);
3241 }
3242}
3243
3244static void
3245qeth_clear_working_pool_list(struct qeth_card *card)
3246{
3247 struct qeth_buffer_pool_entry *pool_entry, *tmp;
3248
3249 QETH_DBF_TEXT(trace,5,"clwrklst");
3250 list_for_each_entry_safe(pool_entry, tmp,
3251 &card->qdio.in_buf_pool.entry_list, list){
3252 list_del(&pool_entry->list);
3253 }
3254}
3255
3256static void
3257qeth_free_buffer_pool(struct qeth_card *card)
3258{
3259 struct qeth_buffer_pool_entry *pool_entry, *tmp;
3260 int i=0;
3261 QETH_DBF_TEXT(trace,5,"freepool");
3262 list_for_each_entry_safe(pool_entry, tmp,
3263 &card->qdio.init_pool.entry_list, init_list){
3264 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
3265 free_page((unsigned long)pool_entry->elements[i]);
3266 list_del(&pool_entry->init_list);
3267 kfree(pool_entry);
3268 }
3269}
3270
3271static int
3272qeth_alloc_buffer_pool(struct qeth_card *card)
3273{
3274 struct qeth_buffer_pool_entry *pool_entry;
3275 void *ptr;
3276 int i, j;
3277
3278 QETH_DBF_TEXT(trace,5,"alocpool");
3279 for (i = 0; i < card->qdio.init_pool.buf_count; ++i){
3280 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
3281 if (!pool_entry){
3282 qeth_free_buffer_pool(card);
3283 return -ENOMEM;
3284 }
3285 for(j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j){
3286 ptr = (void *) __get_free_page(GFP_KERNEL|GFP_DMA);
3287 if (!ptr) {
3288 while (j > 0)
3289 free_page((unsigned long)
3290 pool_entry->elements[--j]);
3291 kfree(pool_entry);
3292 qeth_free_buffer_pool(card);
3293 return -ENOMEM;
3294 }
3295 pool_entry->elements[j] = ptr;
3296 }
3297 list_add(&pool_entry->init_list,
3298 &card->qdio.init_pool.entry_list);
3299 }
3300 return 0;
3301}
3302
3303int
3304qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
3305{
3306 QETH_DBF_TEXT(trace, 2, "realcbp");
3307
3308 if ((card->state != CARD_STATE_DOWN) &&
3309 (card->state != CARD_STATE_RECOVER))
3310 return -EPERM;
3311
3312
3313 qeth_clear_working_pool_list(card);
3314 qeth_free_buffer_pool(card);
3315 card->qdio.in_buf_pool.buf_count = bufcnt;
3316 card->qdio.init_pool.buf_count = bufcnt;
3317 return qeth_alloc_buffer_pool(card);
3318}
3319
3320static int
3321qeth_alloc_qdio_buffers(struct qeth_card *card)
3322{
3323 int i, j;
3324
3325 QETH_DBF_TEXT(setup, 2, "allcqdbf");
3326
3327 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
3328 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
3329 return 0;
3330
3331 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
3332 GFP_KERNEL|GFP_DMA);
3333 if (!card->qdio.in_q)
3334 goto out_nomem;
3335 QETH_DBF_TEXT(setup, 2, "inq");
3336 QETH_DBF_HEX(setup, 2, &card->qdio.in_q, sizeof(void *));
3337 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
3338
3339 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3340 card->qdio.in_q->bufs[i].buffer =
3341 &card->qdio.in_q->qdio_bufs[i];
3342
3343 if (qeth_alloc_buffer_pool(card))
3344 goto out_freeinq;
3345
3346 card->qdio.out_qs =
3347 kmalloc(card->qdio.no_out_queues *
3348 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
3349 if (!card->qdio.out_qs)
3350 goto out_freepool;
3351 for (i = 0; i < card->qdio.no_out_queues; ++i) {
3352 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
3353 GFP_KERNEL|GFP_DMA);
3354 if (!card->qdio.out_qs[i])
3355 goto out_freeoutq;
3356 QETH_DBF_TEXT_(setup, 2, "outq %i", i);
3357 QETH_DBF_HEX(setup, 2, &card->qdio.out_qs[i], sizeof(void *));
3358 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
3359 card->qdio.out_qs[i]->queue_no = i;
3360
3361 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j){
3362 card->qdio.out_qs[i]->bufs[j].buffer =
3363 &card->qdio.out_qs[i]->qdio_bufs[j];
3364 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
3365 skb_list);
3366 lockdep_set_class(
3367 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
3368 &qdio_out_skb_queue_key);
3369 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
3370 }
3371 }
3372 return 0;
3373
3374out_freeoutq:
3375 while (i > 0)
3376 kfree(card->qdio.out_qs[--i]);
3377 kfree(card->qdio.out_qs);
3378 card->qdio.out_qs = NULL;
3379out_freepool:
3380 qeth_free_buffer_pool(card);
3381out_freeinq:
3382 kfree(card->qdio.in_q);
3383 card->qdio.in_q = NULL;
3384out_nomem:
3385 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
3386 return -ENOMEM;
3387}
3388
3389static void
3390qeth_free_qdio_buffers(struct qeth_card *card)
3391{
3392 int i, j;
3393
3394 QETH_DBF_TEXT(trace, 2, "freeqdbf");
3395 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
3396 QETH_QDIO_UNINITIALIZED)
3397 return;
3398 kfree(card->qdio.in_q);
3399 card->qdio.in_q = NULL;
3400
3401 qeth_free_buffer_pool(card);
3402
3403 if (card->qdio.out_qs) {
3404 for (i = 0; i < card->qdio.no_out_queues; ++i) {
3405 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
3406 qeth_clear_output_buffer(card->qdio.out_qs[i],
3407 &card->qdio.out_qs[i]->bufs[j]);
3408 kfree(card->qdio.out_qs[i]);
3409 }
3410 kfree(card->qdio.out_qs);
3411 card->qdio.out_qs = NULL;
3412 }
3413}
3414
3415static void
3416qeth_clear_qdio_buffers(struct qeth_card *card)
3417{
3418 int i, j;
3419
3420 QETH_DBF_TEXT(trace, 2, "clearqdbf");
3421
3422 for (i = 0; i < card->qdio.no_out_queues; ++i)
3423 if (card->qdio.out_qs && card->qdio.out_qs[i]) {
3424 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
3425 qeth_clear_output_buffer(card->qdio.out_qs[i],
3426 &card->qdio.out_qs[i]->bufs[j]);
3427 }
3428}
3429
3430static void
3431qeth_init_qdio_info(struct qeth_card *card)
3432{
3433 QETH_DBF_TEXT(setup, 4, "intqdinf");
3434 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
3435
3436 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
3437 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
3438 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
3439 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
3440 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
3441}
3442
3443static int
3444qeth_init_qdio_queues(struct qeth_card *card)
3445{
3446 int i, j;
3447 int rc;
3448
3449 QETH_DBF_TEXT(setup, 2, "initqdqs");
3450
3451
3452 memset(card->qdio.in_q->qdio_bufs, 0,
3453 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
3454 qeth_initialize_working_pool_list(card);
3455
3456 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
3457 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
3458 card->qdio.in_q->next_buf_to_init = card->qdio.in_buf_pool.buf_count - 1;
3459 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
3460 card->qdio.in_buf_pool.buf_count - 1, NULL);
3461 if (rc) {
3462 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
3463 return rc;
3464 }
3465 rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
3466 if (rc) {
3467 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
3468 return rc;
3469 }
3470
3471 for (i = 0; i < card->qdio.no_out_queues; ++i){
3472 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
3473 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
3474 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j){
3475 qeth_clear_output_buffer(card->qdio.out_qs[i],
3476 &card->qdio.out_qs[i]->bufs[j]);
3477 }
3478 card->qdio.out_qs[i]->card = card;
3479 card->qdio.out_qs[i]->next_buf_to_fill = 0;
3480 card->qdio.out_qs[i]->do_pack = 0;
3481 atomic_set(&card->qdio.out_qs[i]->used_buffers,0);
3482 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
3483 atomic_set(&card->qdio.out_qs[i]->state,
3484 QETH_OUT_Q_UNLOCKED);
3485 }
3486 return 0;
3487}
3488
3489static int
3490qeth_qdio_establish(struct qeth_card *card)
3491{
3492 struct qdio_initialize init_data;
3493 char *qib_param_field;
3494 struct qdio_buffer **in_sbal_ptrs;
3495 struct qdio_buffer **out_sbal_ptrs;
3496 int i, j, k;
3497 int rc = 0;
3498
3499 QETH_DBF_TEXT(setup, 2, "qdioest");
3500
3501 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3502 GFP_KERNEL);
3503 if (!qib_param_field)
3504 return -ENOMEM;
3505
3506 qeth_create_qib_param_field(card, qib_param_field);
3507 qeth_create_qib_param_field_blkt(card, qib_param_field);
3508
3509 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3510 GFP_KERNEL);
3511 if (!in_sbal_ptrs) {
3512 kfree(qib_param_field);
3513 return -ENOMEM;
3514 }
3515 for(i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3516 in_sbal_ptrs[i] = (struct qdio_buffer *)
3517 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3518
3519 out_sbal_ptrs =
3520 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3521 sizeof(void *), GFP_KERNEL);
3522 if (!out_sbal_ptrs) {
3523 kfree(in_sbal_ptrs);
3524 kfree(qib_param_field);
3525 return -ENOMEM;
3526 }
3527 for(i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3528 for(j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k){
3529 out_sbal_ptrs[k] = (struct qdio_buffer *)
3530 virt_to_phys(card->qdio.out_qs[i]->
3531 bufs[j].buffer);
3532 }
3533
3534 memset(&init_data, 0, sizeof(struct qdio_initialize));
3535 init_data.cdev = CARD_DDEV(card);
3536 init_data.q_format = qeth_get_qdio_q_format(card);
3537 init_data.qib_param_field_format = 0;
3538 init_data.qib_param_field = qib_param_field;
3539 init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
3540 init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
3541 init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
3542 init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
3543 init_data.no_input_qs = 1;
3544 init_data.no_output_qs = card->qdio.no_out_queues;
3545 init_data.input_handler = (qdio_handler_t *)
3546 qeth_qdio_input_handler;
3547 init_data.output_handler = (qdio_handler_t *)
3548 qeth_qdio_output_handler;
3549 init_data.int_parm = (unsigned long) card;
3550 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3551 QDIO_OUTBOUND_0COPY_SBALS |
3552 QDIO_USE_OUTBOUND_PCIS;
3553 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3554 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3555
3556 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3557 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED)
3558 if ((rc = qdio_initialize(&init_data)))
3559 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3560
3561 kfree(out_sbal_ptrs);
3562 kfree(in_sbal_ptrs);
3563 kfree(qib_param_field);
3564 return rc;
3565}
3566
3567static int
3568qeth_qdio_activate(struct qeth_card *card)
3569{
3570 QETH_DBF_TEXT(setup,3,"qdioact");
3571 return qdio_activate(CARD_DDEV(card), 0);
3572}
3573
3574static int
3575qeth_clear_channel(struct qeth_channel *channel)
3576{
3577 unsigned long flags;
3578 struct qeth_card *card;
3579 int rc;
3580
3581 QETH_DBF_TEXT(trace,3,"clearch");
3582 card = CARD_FROM_CDEV(channel->ccwdev);
3583 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
3584 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
3585 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
3586
3587 if (rc)
3588 return rc;
3589 rc = wait_event_interruptible_timeout(card->wait_q,
3590 channel->state==CH_STATE_STOPPED, QETH_TIMEOUT);
3591 if (rc == -ERESTARTSYS)
3592 return rc;
3593 if (channel->state != CH_STATE_STOPPED)
3594 return -ETIME;
3595 channel->state = CH_STATE_DOWN;
3596 return 0;
3597}
3598
3599static int
3600qeth_halt_channel(struct qeth_channel *channel)
3601{
3602 unsigned long flags;
3603 struct qeth_card *card;
3604 int rc;
3605
3606 QETH_DBF_TEXT(trace,3,"haltch");
3607 card = CARD_FROM_CDEV(channel->ccwdev);
3608 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
3609 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
3610 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
3611
3612 if (rc)
3613 return rc;
3614 rc = wait_event_interruptible_timeout(card->wait_q,
3615 channel->state==CH_STATE_HALTED, QETH_TIMEOUT);
3616 if (rc == -ERESTARTSYS)
3617 return rc;
3618 if (channel->state != CH_STATE_HALTED)
3619 return -ETIME;
3620 return 0;
3621}
3622
3623static int
3624qeth_halt_channels(struct qeth_card *card)
3625{
3626 int rc1 = 0, rc2=0, rc3 = 0;
3627
3628 QETH_DBF_TEXT(trace,3,"haltchs");
3629 rc1 = qeth_halt_channel(&card->read);
3630 rc2 = qeth_halt_channel(&card->write);
3631 rc3 = qeth_halt_channel(&card->data);
3632 if (rc1)
3633 return rc1;
3634 if (rc2)
3635 return rc2;
3636 return rc3;
3637}
3638static int
3639qeth_clear_channels(struct qeth_card *card)
3640{
3641 int rc1 = 0, rc2=0, rc3 = 0;
3642
3643 QETH_DBF_TEXT(trace,3,"clearchs");
3644 rc1 = qeth_clear_channel(&card->read);
3645 rc2 = qeth_clear_channel(&card->write);
3646 rc3 = qeth_clear_channel(&card->data);
3647 if (rc1)
3648 return rc1;
3649 if (rc2)
3650 return rc2;
3651 return rc3;
3652}
3653
3654static int
3655qeth_clear_halt_card(struct qeth_card *card, int halt)
3656{
3657 int rc = 0;
3658
3659 QETH_DBF_TEXT(trace,3,"clhacrd");
3660 QETH_DBF_HEX(trace, 3, &card, sizeof(void *));
3661
3662 if (halt)
3663 rc = qeth_halt_channels(card);
3664 if (rc)
3665 return rc;
3666 return qeth_clear_channels(card);
3667}
3668
3669static int
3670qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
3671{
3672 int rc = 0;
3673
3674 QETH_DBF_TEXT(trace,3,"qdioclr");
3675 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
3676 QETH_QDIO_CLEANING)) {
3677 case QETH_QDIO_ESTABLISHED:
3678 if ((rc = qdio_cleanup(CARD_DDEV(card),
3679 (card->info.type == QETH_CARD_TYPE_IQD) ?
3680 QDIO_FLAG_CLEANUP_USING_HALT :
3681 QDIO_FLAG_CLEANUP_USING_CLEAR)))
3682 QETH_DBF_TEXT_(trace, 3, "1err%d", rc);
3683 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3684 break;
3685 case QETH_QDIO_CLEANING:
3686 return rc;
3687 default:
3688 break;
3689 }
3690 if ((rc = qeth_clear_halt_card(card, use_halt)))
3691 QETH_DBF_TEXT_(trace, 3, "2err%d", rc);
3692 card->state = CARD_STATE_DOWN;
3693 return rc;
3694}
3695
3696static int
3697qeth_dm_act(struct qeth_card *card)
3698{
3699 int rc;
3700 struct qeth_cmd_buffer *iob;
3701
3702 QETH_DBF_TEXT(setup,2,"dmact");
3703
3704 iob = qeth_wait_for_buffer(&card->write);
3705 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
3706
3707 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
3708 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
3709 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
3710 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3711 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
3712 return rc;
3713}
3714
3715static int
3716qeth_mpc_initialize(struct qeth_card *card)
3717{
3718 int rc;
3719
3720 QETH_DBF_TEXT(setup,2,"mpcinit");
3721
3722 if ((rc = qeth_issue_next_read(card))){
3723 QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
3724 return rc;
3725 }
3726 if ((rc = qeth_cm_enable(card))){
3727 QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
3728 goto out_qdio;
3729 }
3730 if ((rc = qeth_cm_setup(card))){
3731 QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
3732 goto out_qdio;
3733 }
3734 if ((rc = qeth_ulp_enable(card))){
3735 QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
3736 goto out_qdio;
3737 }
3738 if ((rc = qeth_ulp_setup(card))){
3739 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
3740 goto out_qdio;
3741 }
3742 if ((rc = qeth_alloc_qdio_buffers(card))){
3743 QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
3744 goto out_qdio;
3745 }
3746 if ((rc = qeth_qdio_establish(card))){
3747 QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
3748 qeth_free_qdio_buffers(card);
3749 goto out_qdio;
3750 }
3751 if ((rc = qeth_qdio_activate(card))){
3752 QETH_DBF_TEXT_(setup, 2, "7err%d", rc);
3753 goto out_qdio;
3754 }
3755 if ((rc = qeth_dm_act(card))){
3756 QETH_DBF_TEXT_(setup, 2, "8err%d", rc);
3757 goto out_qdio;
3758 }
3759
3760 return 0;
3761out_qdio:
3762 qeth_qdio_clear_card(card, card->info.type!=QETH_CARD_TYPE_IQD);
3763 return rc;
3764}
3765
3766static struct net_device *
3767qeth_get_netdevice(enum qeth_card_types type, enum qeth_link_types linktype)
3768{
3769 struct net_device *dev = NULL;
3770
3771 switch (type) {
3772 case QETH_CARD_TYPE_OSAE:
3773 switch (linktype) {
3774 case QETH_LINK_TYPE_LANE_TR:
3775 case QETH_LINK_TYPE_HSTR:
3776#ifdef CONFIG_TR
3777 dev = alloc_trdev(0);
3778#endif
3779 break;
3780 default:
3781 dev = alloc_etherdev(0);
3782 }
3783 break;
3784 case QETH_CARD_TYPE_IQD:
3785 dev = alloc_netdev(0, "hsi%d", ether_setup);
3786 break;
3787 case QETH_CARD_TYPE_OSN:
3788 dev = alloc_netdev(0, "osn%d", ether_setup);
3789 break;
3790 default:
3791 dev = alloc_etherdev(0);
3792 }
3793 return dev;
3794}
3795
3796
3797static int
3798qeth_fake_header(struct sk_buff *skb, struct net_device *dev,
3799 unsigned short type, const void *daddr, const void *saddr,
3800 unsigned len)
3801{
3802 if(dev->type == ARPHRD_IEEE802_TR){
3803 struct trh_hdr *hdr;
3804 hdr = (struct trh_hdr *)skb_push(skb, QETH_FAKE_LL_LEN_TR);
3805 memcpy(hdr->saddr, dev->dev_addr, TR_ALEN);
3806 memcpy(hdr->daddr, "FAKELL", TR_ALEN);
3807 return QETH_FAKE_LL_LEN_TR;
3808
3809 } else {
3810 struct ethhdr *hdr;
3811 hdr = (struct ethhdr *)skb_push(skb, QETH_FAKE_LL_LEN_ETH);
3812 memcpy(hdr->h_source, dev->dev_addr, ETH_ALEN);
3813 memcpy(hdr->h_dest, "FAKELL", ETH_ALEN);
3814 if (type != ETH_P_802_3)
3815 hdr->h_proto = htons(type);
3816 else
3817 hdr->h_proto = htons(len);
3818 return QETH_FAKE_LL_LEN_ETH;
3819
3820 }
3821}
3822
3823static const struct header_ops qeth_fake_ops = {
3824 .create = qeth_fake_header,
3825 .parse = qeth_hard_header_parse,
3826};
3827
3828static int
3829qeth_send_packet(struct qeth_card *, struct sk_buff *);
3830
3831static int
3832qeth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
3833{
3834 int rc;
3835 struct qeth_card *card;
3836
3837 QETH_DBF_TEXT(trace, 6, "hrdstxmi");
3838 card = (struct qeth_card *)dev->priv;
3839 if (skb==NULL) {
3840 card->stats.tx_dropped++;
3841 card->stats.tx_errors++;
3842
3843 return NETDEV_TX_OK;
3844 }
3845 if ((card->state != CARD_STATE_UP) || !card->lan_online) {
3846 card->stats.tx_dropped++;
3847 card->stats.tx_errors++;
3848 card->stats.tx_carrier_errors++;
3849 dev_kfree_skb_any(skb);
3850
3851 return NETDEV_TX_OK;
3852 }
3853 if (card->options.performance_stats) {
3854 card->perf_stats.outbound_cnt++;
3855 card->perf_stats.outbound_start_time = qeth_get_micros();
3856 }
3857 netif_stop_queue(dev);
3858 if ((rc = qeth_send_packet(card, skb))) {
3859 if (rc == -EBUSY) {
3860 return NETDEV_TX_BUSY;
3861 } else {
3862 card->stats.tx_errors++;
3863 card->stats.tx_dropped++;
3864 dev_kfree_skb_any(skb);
3865
3866 rc = NETDEV_TX_OK;
3867 }
3868 }
3869 netif_wake_queue(dev);
3870 if (card->options.performance_stats)
3871 card->perf_stats.outbound_time += qeth_get_micros() -
3872 card->perf_stats.outbound_start_time;
3873 return rc;
3874}
3875
3876static int
3877qeth_verify_vlan_dev(struct net_device *dev, struct qeth_card *card)
3878{
3879 int rc = 0;
3880#ifdef CONFIG_QETH_VLAN
3881 struct vlan_group *vg;
3882 int i;
3883
3884 if (!(vg = card->vlangrp))
3885 return rc;
3886
3887 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++){
3888 if (vlan_group_get_device(vg, i) == dev){
3889 rc = QETH_VLAN_CARD;
3890 break;
3891 }
3892 }
3893 if (rc && !(vlan_dev_info(dev)->real_dev->priv == (void *)card))
3894 return 0;
3895
3896#endif
3897 return rc;
3898}
3899
3900static int
3901qeth_verify_dev(struct net_device *dev)
3902{
3903 struct qeth_card *card;
3904 unsigned long flags;
3905 int rc = 0;
3906
3907 read_lock_irqsave(&qeth_card_list.rwlock, flags);
3908 list_for_each_entry(card, &qeth_card_list.list, list){
3909 if (card->dev == dev){
3910 rc = QETH_REAL_CARD;
3911 break;
3912 }
3913 rc = qeth_verify_vlan_dev(dev, card);
3914 if (rc)
3915 break;
3916 }
3917 read_unlock_irqrestore(&qeth_card_list.rwlock, flags);
3918
3919 return rc;
3920}
3921
3922static struct qeth_card *
3923qeth_get_card_from_dev(struct net_device *dev)
3924{
3925 struct qeth_card *card = NULL;
3926 int rc;
3927
3928 rc = qeth_verify_dev(dev);
3929 if (rc == QETH_REAL_CARD)
3930 card = (struct qeth_card *)dev->priv;
3931 else if (rc == QETH_VLAN_CARD)
3932 card = (struct qeth_card *)
3933 vlan_dev_info(dev)->real_dev->priv;
3934
3935 QETH_DBF_TEXT_(trace, 4, "%d", rc);
3936 return card ;
3937}
3938
3939static void
3940qeth_tx_timeout(struct net_device *dev)
3941{
3942 struct qeth_card *card;
3943
3944 card = (struct qeth_card *) dev->priv;
3945 card->stats.tx_errors++;
3946 qeth_schedule_recovery(card);
3947}
3948
3949static int
3950qeth_open(struct net_device *dev)
3951{
3952 struct qeth_card *card;
3953
3954 QETH_DBF_TEXT(trace, 4, "qethopen");
3955
3956 card = (struct qeth_card *) dev->priv;
3957
3958 if (card->state != CARD_STATE_SOFTSETUP)
3959 return -ENODEV;
3960
3961 if ( (card->info.type != QETH_CARD_TYPE_OSN) &&
3962 (card->options.layer2) &&
3963 (!(card->info.mac_bits & QETH_LAYER2_MAC_REGISTERED))) {
3964 QETH_DBF_TEXT(trace,4,"nomacadr");
3965 return -EPERM;
3966 }
3967 card->data.state = CH_STATE_UP;
3968 card->state = CARD_STATE_UP;
3969 card->dev->flags |= IFF_UP;
3970 netif_start_queue(dev);
3971
3972 if (!card->lan_online && netif_carrier_ok(dev))
3973 netif_carrier_off(dev);
3974 return 0;
3975}
3976
3977static int
3978qeth_stop(struct net_device *dev)
3979{
3980 struct qeth_card *card;
3981
3982 QETH_DBF_TEXT(trace, 4, "qethstop");
3983
3984 card = (struct qeth_card *) dev->priv;
3985
3986 netif_tx_disable(dev);
3987 card->dev->flags &= ~IFF_UP;
3988 if (card->state == CARD_STATE_UP)
3989 card->state = CARD_STATE_SOFTSETUP;
3990 return 0;
3991}
3992
3993static int
3994qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
3995{
3996 int cast_type = RTN_UNSPEC;
3997
3998 if (card->info.type == QETH_CARD_TYPE_OSN)
3999 return cast_type;
4000
4001 if (skb->dst && skb->dst->neighbour){
4002 cast_type = skb->dst->neighbour->type;
4003 if ((cast_type == RTN_BROADCAST) ||
4004 (cast_type == RTN_MULTICAST) ||
4005 (cast_type == RTN_ANYCAST))
4006 return cast_type;
4007 else
4008 return RTN_UNSPEC;
4009 }
4010
4011 if (skb->protocol == ETH_P_IPV6)
4012 return (skb_network_header(skb)[24] == 0xff) ?
4013 RTN_MULTICAST : 0;
4014 else if (skb->protocol == ETH_P_IP)
4015 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
4016 RTN_MULTICAST : 0;
4017
4018 if (!memcmp(skb->data, skb->dev->broadcast, 6))
4019 return RTN_BROADCAST;
4020 else {
4021 u16 hdr_mac;
4022
4023 hdr_mac = *((u16 *)skb->data);
4024
4025 switch (card->info.link_type) {
4026 case QETH_LINK_TYPE_HSTR:
4027 case QETH_LINK_TYPE_LANE_TR:
4028 if ((hdr_mac == QETH_TR_MAC_NC) ||
4029 (hdr_mac == QETH_TR_MAC_C))
4030 return RTN_MULTICAST;
4031 break;
4032
4033 default:
4034 if ((hdr_mac == QETH_ETH_MAC_V4) ||
4035 (hdr_mac == QETH_ETH_MAC_V6))
4036 return RTN_MULTICAST;
4037 }
4038 }
4039 return cast_type;
4040}
4041
4042static int
4043qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
4044 int ipv, int cast_type)
4045{
4046 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
4047 return card->qdio.default_out_queue;
4048 switch (card->qdio.no_out_queues) {
4049 case 4:
4050 if (cast_type && card->info.is_multicast_different)
4051 return card->info.is_multicast_different &
4052 (card->qdio.no_out_queues - 1);
4053 if (card->qdio.do_prio_queueing && (ipv == 4)) {
4054 const u8 tos = ip_hdr(skb)->tos;
4055
4056 if (card->qdio.do_prio_queueing==QETH_PRIO_Q_ING_TOS){
4057 if (tos & IP_TOS_NOTIMPORTANT)
4058 return 3;
4059 if (tos & IP_TOS_HIGHRELIABILITY)
4060 return 2;
4061 if (tos & IP_TOS_HIGHTHROUGHPUT)
4062 return 1;
4063 if (tos & IP_TOS_LOWDELAY)
4064 return 0;
4065 }
4066 if (card->qdio.do_prio_queueing==QETH_PRIO_Q_ING_PREC)
4067 return 3 - (tos >> 6);
4068 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
4069
4070 }
4071 return card->qdio.default_out_queue;
4072 case 1:
4073 default:
4074 return card->qdio.default_out_queue;
4075 }
4076}
4077
4078static inline int
4079qeth_get_ip_version(struct sk_buff *skb)
4080{
4081 switch (skb->protocol) {
4082 case ETH_P_IPV6:
4083 return 6;
4084 case ETH_P_IP:
4085 return 4;
4086 default:
4087 return 0;
4088 }
4089}
4090
4091static struct qeth_hdr *
4092__qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb, int ipv)
4093{
4094#ifdef CONFIG_QETH_VLAN
4095 u16 *tag;
4096 if (card->vlangrp && vlan_tx_tag_present(skb) &&
4097 ((ipv == 6) || card->options.layer2) ) {
4098
4099
4100
4101
4102
4103 skb_push(skb, VLAN_HLEN);
4104 skb_copy_to_linear_data(skb, skb->data + 4, 4);
4105 skb_copy_to_linear_data_offset(skb, 4, skb->data + 8, 4);
4106 skb_copy_to_linear_data_offset(skb, 8, skb->data + 12, 4);
4107 tag = (u16 *)(skb->data + 12);
4108
4109
4110
4111
4112 *tag = __constant_htons(ETH_P_8021Q);
4113 *(tag + 1) = htons(vlan_tx_tag_get(skb));
4114 }
4115#endif
4116 return ((struct qeth_hdr *)
4117 qeth_push_skb(card, skb, sizeof(struct qeth_hdr)));
4118}
4119
4120static void
4121__qeth_free_new_skb(struct sk_buff *orig_skb, struct sk_buff *new_skb)
4122{
4123 if (orig_skb != new_skb)
4124 dev_kfree_skb_any(new_skb);
4125}
4126
4127static struct sk_buff *
4128qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb,
4129 struct qeth_hdr **hdr, int ipv)
4130{
4131 struct sk_buff *new_skb, *new_skb2;
4132
4133 QETH_DBF_TEXT(trace, 6, "prepskb");
4134 new_skb = skb;
4135 new_skb = qeth_pskb_unshare(skb, GFP_ATOMIC);
4136 if (!new_skb)
4137 return NULL;
4138 new_skb2 = qeth_realloc_headroom(card, new_skb,
4139 sizeof(struct qeth_hdr));
4140 if (!new_skb2) {
4141 __qeth_free_new_skb(skb, new_skb);
4142 return NULL;
4143 }
4144 if (new_skb != skb)
4145 __qeth_free_new_skb(new_skb2, new_skb);
4146 new_skb = new_skb2;
4147 *hdr = __qeth_prepare_skb(card, new_skb, ipv);
4148 if (*hdr == NULL) {
4149 __qeth_free_new_skb(skb, new_skb);
4150 return NULL;
4151 }
4152 return new_skb;
4153}
4154
4155static inline u8
4156qeth_get_qeth_hdr_flags4(int cast_type)
4157{
4158 if (cast_type == RTN_MULTICAST)
4159 return QETH_CAST_MULTICAST;
4160 if (cast_type == RTN_BROADCAST)
4161 return QETH_CAST_BROADCAST;
4162 return QETH_CAST_UNICAST;
4163}
4164
4165static inline u8
4166qeth_get_qeth_hdr_flags6(int cast_type)
4167{
4168 u8 ct = QETH_HDR_PASSTHRU | QETH_HDR_IPV6;
4169 if (cast_type == RTN_MULTICAST)
4170 return ct | QETH_CAST_MULTICAST;
4171 if (cast_type == RTN_ANYCAST)
4172 return ct | QETH_CAST_ANYCAST;
4173 if (cast_type == RTN_BROADCAST)
4174 return ct | QETH_CAST_BROADCAST;
4175 return ct | QETH_CAST_UNICAST;
4176}
4177
4178static void
4179qeth_layer2_get_packet_type(struct qeth_card *card, struct qeth_hdr *hdr,
4180 struct sk_buff *skb)
4181{
4182 __u16 hdr_mac;
4183
4184 if (!memcmp(skb->data+QETH_HEADER_SIZE,
4185 skb->dev->broadcast,6)) {
4186 *(__u32 *)hdr->hdr.l2.flags |=
4187 QETH_LAYER2_FLAG_BROADCAST << 8;
4188 return;
4189 }
4190 hdr_mac=*((__u16*)skb->data);
4191
4192 switch (card->info.link_type) {
4193 case QETH_LINK_TYPE_HSTR:
4194 case QETH_LINK_TYPE_LANE_TR:
4195 if ((hdr_mac == QETH_TR_MAC_NC) ||
4196 (hdr_mac == QETH_TR_MAC_C) )
4197 *(__u32 *)hdr->hdr.l2.flags |=
4198 QETH_LAYER2_FLAG_MULTICAST << 8;
4199 else
4200 *(__u32 *)hdr->hdr.l2.flags |=
4201 QETH_LAYER2_FLAG_UNICAST << 8;
4202 break;
4203
4204 default:
4205 if ( (hdr_mac==QETH_ETH_MAC_V4) ||
4206 (hdr_mac==QETH_ETH_MAC_V6) )
4207 *(__u32 *)hdr->hdr.l2.flags |=
4208 QETH_LAYER2_FLAG_MULTICAST << 8;
4209 else
4210 *(__u32 *)hdr->hdr.l2.flags |=
4211 QETH_LAYER2_FLAG_UNICAST << 8;
4212 }
4213}
4214
4215static void
4216qeth_layer2_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
4217 struct sk_buff *skb, int cast_type)
4218{
4219 memset(hdr, 0, sizeof(struct qeth_hdr));
4220 hdr->hdr.l2.id = QETH_HEADER_TYPE_LAYER2;
4221
4222
4223 if (cast_type==RTN_MULTICAST)
4224 *(__u32 *)hdr->hdr.l2.flags |= QETH_LAYER2_FLAG_MULTICAST << 8;
4225 else if (cast_type==RTN_BROADCAST)
4226 *(__u32 *)hdr->hdr.l2.flags |= QETH_LAYER2_FLAG_BROADCAST << 8;
4227 else
4228 qeth_layer2_get_packet_type(card, hdr, skb);
4229
4230 hdr->hdr.l2.pkt_length = skb->len-QETH_HEADER_SIZE;
4231#ifdef CONFIG_QETH_VLAN
4232
4233
4234
4235 if ((card->vlangrp != NULL) &&
4236 vlan_tx_tag_present(skb)) {
4237 *(__u32 *)hdr->hdr.l2.flags |= QETH_LAYER2_FLAG_VLAN << 8;
4238 hdr->hdr.l2.vlan_id = vlan_tx_tag_get(skb);
4239 }
4240#endif
4241}
4242
4243void
4244qeth_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
4245 struct sk_buff *skb, int ipv, int cast_type)
4246{
4247 QETH_DBF_TEXT(trace, 6, "fillhdr");
4248
4249 memset(hdr, 0, sizeof(struct qeth_hdr));
4250 if (card->options.layer2) {
4251 qeth_layer2_fill_header(card, hdr, skb, cast_type);
4252 return;
4253 }
4254 hdr->hdr.l3.id = QETH_HEADER_TYPE_LAYER3;
4255 hdr->hdr.l3.ext_flags = 0;
4256#ifdef CONFIG_QETH_VLAN
4257
4258
4259
4260
4261 if (card->vlangrp && vlan_tx_tag_present(skb)) {
4262 hdr->hdr.l3.ext_flags = (ipv == 4) ?
4263 QETH_HDR_EXT_VLAN_FRAME :
4264 QETH_HDR_EXT_INCLUDE_VLAN_TAG;
4265 hdr->hdr.l3.vlan_id = vlan_tx_tag_get(skb);
4266 }
4267#endif
4268 hdr->hdr.l3.length = skb->len - sizeof(struct qeth_hdr);
4269 if (ipv == 4) {
4270 hdr->hdr.l3.flags = qeth_get_qeth_hdr_flags4(cast_type);
4271 memset(hdr->hdr.l3.dest_addr, 0, 12);
4272 if ((skb->dst) && (skb->dst->neighbour)) {
4273 *((u32 *) (&hdr->hdr.l3.dest_addr[12])) =
4274 *((u32 *) skb->dst->neighbour->primary_key);
4275 } else {
4276
4277 *((u32 *)(&hdr->hdr.l3.dest_addr[12])) =
4278 ip_hdr(skb)->daddr;
4279 }
4280 } else if (ipv == 6) {
4281 hdr->hdr.l3.flags = qeth_get_qeth_hdr_flags6(cast_type);
4282 if ((skb->dst) && (skb->dst->neighbour)) {
4283 memcpy(hdr->hdr.l3.dest_addr,
4284 skb->dst->neighbour->primary_key, 16);
4285 } else {
4286
4287 memcpy(hdr->hdr.l3.dest_addr,
4288 &ipv6_hdr(skb)->daddr, 16);
4289 }
4290 } else {
4291 if((skb->dev->type == ARPHRD_IEEE802_TR) &&
4292 !memcmp(skb->data + sizeof(struct qeth_hdr) +
4293 sizeof(__u16), skb->dev->broadcast, 6)) {
4294 hdr->hdr.l3.flags = QETH_CAST_BROADCAST |
4295 QETH_HDR_PASSTHRU;
4296 } else if (!memcmp(skb->data + sizeof(struct qeth_hdr),
4297 skb->dev->broadcast, 6)) {
4298 hdr->hdr.l3.flags = QETH_CAST_BROADCAST |
4299 QETH_HDR_PASSTHRU;
4300 } else {
4301 hdr->hdr.l3.flags = (cast_type == RTN_MULTICAST) ?
4302 QETH_CAST_MULTICAST | QETH_HDR_PASSTHRU :
4303 QETH_CAST_UNICAST | QETH_HDR_PASSTHRU;
4304 }
4305 }
4306}
4307
4308static void
4309__qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
4310 int is_tso, int *next_element_to_fill)
4311{
4312 int length = skb->len;
4313 int length_here;
4314 int element;
4315 char *data;
4316 int first_lap ;
4317
4318 element = *next_element_to_fill;
4319 data = skb->data;
4320 first_lap = (is_tso == 0 ? 1 : 0);
4321
4322 while (length > 0) {
4323
4324 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
4325 if (length < length_here)
4326 length_here = length;
4327
4328 buffer->element[element].addr = data;
4329 buffer->element[element].length = length_here;
4330 length -= length_here;
4331 if (!length) {
4332 if (first_lap)
4333 buffer->element[element].flags = 0;
4334 else
4335 buffer->element[element].flags =
4336 SBAL_FLAGS_LAST_FRAG;
4337 } else {
4338 if (first_lap)
4339 buffer->element[element].flags =
4340 SBAL_FLAGS_FIRST_FRAG;
4341 else
4342 buffer->element[element].flags =
4343 SBAL_FLAGS_MIDDLE_FRAG;
4344 }
4345 data += length_here;
4346 element++;
4347 first_lap = 0;
4348 }
4349 *next_element_to_fill = element;
4350}
4351
4352static int
4353qeth_fill_buffer(struct qeth_qdio_out_q *queue,
4354 struct qeth_qdio_out_buffer *buf,
4355 struct sk_buff *skb)
4356{
4357 struct qdio_buffer *buffer;
4358 struct qeth_hdr_tso *hdr;
4359 int flush_cnt = 0, hdr_len, large_send = 0;
4360
4361 QETH_DBF_TEXT(trace, 6, "qdfillbf");
4362
4363 buffer = buf->buffer;
4364 atomic_inc(&skb->users);
4365 skb_queue_tail(&buf->skb_list, skb);
4366
4367 hdr = (struct qeth_hdr_tso *) skb->data;
4368
4369 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4370 int element = buf->next_element_to_fill;
4371
4372 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
4373
4374 buffer->element[element].addr = skb->data;
4375 buffer->element[element].length = hdr_len;
4376 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
4377 buf->next_element_to_fill++;
4378 skb->data += hdr_len;
4379 skb->len -= hdr_len;
4380 large_send = 1;
4381 }
4382 if (skb_shinfo(skb)->nr_frags == 0)
4383 __qeth_fill_buffer(skb, buffer, large_send,
4384 (int *)&buf->next_element_to_fill);
4385 else
4386 __qeth_fill_buffer_frag(skb, buffer, large_send,
4387 (int *)&buf->next_element_to_fill);
4388
4389 if (!queue->do_pack) {
4390 QETH_DBF_TEXT(trace, 6, "fillbfnp");
4391
4392 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4393 flush_cnt = 1;
4394 } else {
4395 QETH_DBF_TEXT(trace, 6, "fillbfpa");
4396 if (queue->card->options.performance_stats)
4397 queue->card->perf_stats.skbs_sent_pack++;
4398 if (buf->next_element_to_fill >=
4399 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4400
4401
4402
4403
4404 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4405 flush_cnt = 1;
4406 }
4407 }
4408 return flush_cnt;
4409}
4410
4411static int
4412qeth_do_send_packet_fast(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4413 struct sk_buff *skb, struct qeth_hdr *hdr,
4414 int elements_needed,
4415 struct qeth_eddp_context *ctx)
4416{
4417 struct qeth_qdio_out_buffer *buffer;
4418 int buffers_needed = 0;
4419 int flush_cnt = 0;
4420 int index;
4421
4422 QETH_DBF_TEXT(trace, 6, "dosndpfa");
4423
4424
4425 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4426 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4427
4428 index = queue->next_buf_to_fill;
4429 buffer = &queue->bufs[queue->next_buf_to_fill];
4430
4431
4432
4433
4434 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4435 goto out;
4436 if (ctx == NULL)
4437 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4438 QDIO_MAX_BUFFERS_PER_Q;
4439 else {
4440 buffers_needed = qeth_eddp_check_buffers_for_context(queue,ctx);
4441 if (buffers_needed < 0)
4442 goto out;
4443 queue->next_buf_to_fill =
4444 (queue->next_buf_to_fill + buffers_needed) %
4445 QDIO_MAX_BUFFERS_PER_Q;
4446 }
4447 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4448 if (ctx == NULL) {
4449 qeth_fill_buffer(queue, buffer, skb);
4450 qeth_flush_buffers(queue, 0, index, 1);
4451 } else {
4452 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
4453 WARN_ON(buffers_needed != flush_cnt);
4454 qeth_flush_buffers(queue, 0, index, flush_cnt);
4455 }
4456 return 0;
4457out:
4458 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4459 return -EBUSY;
4460}
4461
4462static int
4463qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4464 struct sk_buff *skb, struct qeth_hdr *hdr,
4465 int elements_needed, struct qeth_eddp_context *ctx)
4466{
4467 struct qeth_qdio_out_buffer *buffer;
4468 int start_index;
4469 int flush_count = 0;
4470 int do_pack = 0;
4471 int tmp;
4472 int rc = 0;
4473
4474 QETH_DBF_TEXT(trace, 6, "dosndpkt");
4475
4476
4477 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4478 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4479 start_index = queue->next_buf_to_fill;
4480 buffer = &queue->bufs[queue->next_buf_to_fill];
4481
4482
4483
4484
4485 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4486 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4487 return -EBUSY;
4488 }
4489
4490 qeth_switch_to_packing_if_needed(queue);
4491 if (queue->do_pack){
4492 do_pack = 1;
4493 if (ctx == NULL) {
4494
4495 if((QETH_MAX_BUFFER_ELEMENTS(card) -
4496 buffer->next_element_to_fill) < elements_needed){
4497
4498 atomic_set(&buffer->state,QETH_QDIO_BUF_PRIMED);
4499 flush_count++;
4500 queue->next_buf_to_fill =
4501 (queue->next_buf_to_fill + 1) %
4502 QDIO_MAX_BUFFERS_PER_Q;
4503 buffer = &queue->bufs[queue->next_buf_to_fill];
4504
4505
4506 if (atomic_read(&buffer->state) !=
4507 QETH_QDIO_BUF_EMPTY){
4508 qeth_flush_buffers(queue, 0, start_index, flush_count);
4509 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4510 return -EBUSY;
4511 }
4512 }
4513 } else {
4514
4515
4516 if (qeth_eddp_check_buffers_for_context(queue,ctx) < 0){
4517 if (net_ratelimit())
4518 PRINT_WARN("eddp tx_dropped 1\n");
4519 rc = -EBUSY;
4520 goto out;
4521 }
4522 }
4523 }
4524 if (ctx == NULL)
4525 tmp = qeth_fill_buffer(queue, buffer, skb);
4526 else {
4527 tmp = qeth_eddp_fill_buffer(queue,ctx,queue->next_buf_to_fill);
4528 if (tmp < 0) {
4529 printk("eddp tx_dropped 2\n");
4530 rc = - EBUSY;
4531 goto out;
4532 }
4533 }
4534 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4535 QDIO_MAX_BUFFERS_PER_Q;
4536 flush_count += tmp;
4537out:
4538 if (flush_count)
4539 qeth_flush_buffers(queue, 0, start_index, flush_count);
4540 else if (!atomic_read(&queue->set_pci_flags_count))
4541 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4542
4543
4544
4545
4546
4547
4548 while (atomic_dec_return(&queue->state)){
4549 flush_count = 0;
4550 start_index = queue->next_buf_to_fill;
4551
4552 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4553
4554
4555
4556
4557 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4558 flush_count += qeth_flush_buffers_on_no_pci(queue);
4559 if (flush_count)
4560 qeth_flush_buffers(queue, 0, start_index, flush_count);
4561 }
4562
4563 if (queue->card->options.performance_stats && do_pack)
4564 queue->card->perf_stats.bufs_sent_pack += flush_count;
4565
4566 return rc;
4567}
4568
4569static int
4570qeth_get_elements_no(struct qeth_card *card, void *hdr,
4571 struct sk_buff *skb, int elems)
4572{
4573 int elements_needed = 0;
4574
4575 if (skb_shinfo(skb)->nr_frags > 0)
4576 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
4577 if (elements_needed == 0)
4578 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
4579 + skb->len) >> PAGE_SHIFT);
4580 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)){
4581 PRINT_ERR("Invalid size of IP packet "
4582 "(Number=%d / Length=%d). Discarded.\n",
4583 (elements_needed+elems), skb->len);
4584 return 0;
4585 }
4586 return elements_needed;
4587}
4588
4589static void qeth_tx_csum(struct sk_buff *skb)
4590{
4591 int tlen;
4592
4593 if (skb->protocol == htons(ETH_P_IP)) {
4594 tlen = ntohs(ip_hdr(skb)->tot_len) - (ip_hdr(skb)->ihl << 2);
4595 switch (ip_hdr(skb)->protocol) {
4596 case IPPROTO_TCP:
4597 tcp_hdr(skb)->check = 0;
4598 tcp_hdr(skb)->check = csum_tcpudp_magic(
4599 ip_hdr(skb)->saddr, ip_hdr(skb)->daddr,
4600 tlen, ip_hdr(skb)->protocol,
4601 skb_checksum(skb, skb_transport_offset(skb),
4602 tlen, 0));
4603 break;
4604 case IPPROTO_UDP:
4605 udp_hdr(skb)->check = 0;
4606 udp_hdr(skb)->check = csum_tcpudp_magic(
4607 ip_hdr(skb)->saddr, ip_hdr(skb)->daddr,
4608 tlen, ip_hdr(skb)->protocol,
4609 skb_checksum(skb, skb_transport_offset(skb),
4610 tlen, 0));
4611 break;
4612 }
4613 } else if (skb->protocol == htons(ETH_P_IPV6)) {
4614 switch (ipv6_hdr(skb)->nexthdr) {
4615 case IPPROTO_TCP:
4616 tcp_hdr(skb)->check = 0;
4617 tcp_hdr(skb)->check = csum_ipv6_magic(
4618 &ipv6_hdr(skb)->saddr, &ipv6_hdr(skb)->daddr,
4619 ipv6_hdr(skb)->payload_len,
4620 ipv6_hdr(skb)->nexthdr,
4621 skb_checksum(skb, skb_transport_offset(skb),
4622 ipv6_hdr(skb)->payload_len, 0));
4623 break;
4624 case IPPROTO_UDP:
4625 udp_hdr(skb)->check = 0;
4626 udp_hdr(skb)->check = csum_ipv6_magic(
4627 &ipv6_hdr(skb)->saddr, &ipv6_hdr(skb)->daddr,
4628 ipv6_hdr(skb)->payload_len,
4629 ipv6_hdr(skb)->nexthdr,
4630 skb_checksum(skb, skb_transport_offset(skb),
4631 ipv6_hdr(skb)->payload_len, 0));
4632 break;
4633 }
4634 }
4635}
4636
4637static int
4638qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
4639{
4640 int ipv = 0;
4641 int cast_type;
4642 struct qeth_qdio_out_q *queue;
4643 struct qeth_hdr *hdr = NULL;
4644 int elements_needed = 0;
4645 enum qeth_large_send_types large_send = QETH_LARGE_SEND_NO;
4646 struct qeth_eddp_context *ctx = NULL;
4647 int tx_bytes = skb->len;
4648 unsigned short nr_frags = skb_shinfo(skb)->nr_frags;
4649 unsigned short tso_size = skb_shinfo(skb)->gso_size;
4650 struct sk_buff *new_skb, *new_skb2;
4651 int rc;
4652
4653 QETH_DBF_TEXT(trace, 6, "sendpkt");
4654
4655 new_skb = skb;
4656 if ((card->info.type == QETH_CARD_TYPE_OSN) &&
4657 (skb->protocol == htons(ETH_P_IPV6)))
4658 return -EPERM;
4659 cast_type = qeth_get_cast_type(card, skb);
4660 if ((cast_type == RTN_BROADCAST) &&
4661 (card->info.broadcast_capable == 0))
4662 return -EPERM;
4663 queue = card->qdio.out_qs
4664 [qeth_get_priority_queue(card, skb, ipv, cast_type)];
4665 if (!card->options.layer2) {
4666 ipv = qeth_get_ip_version(skb);
4667 if ((card->dev->header_ops == &qeth_fake_ops) && ipv) {
4668 new_skb = qeth_pskb_unshare(skb, GFP_ATOMIC);
4669 if (!new_skb)
4670 return -ENOMEM;
4671 if(card->dev->type == ARPHRD_IEEE802_TR){
4672 skb_pull(new_skb, QETH_FAKE_LL_LEN_TR);
4673 } else {
4674 skb_pull(new_skb, QETH_FAKE_LL_LEN_ETH);
4675 }
4676 }
4677 }
4678 if (skb_is_gso(skb))
4679 large_send = card->options.large_send;
4680
4681 if (card->info.type == QETH_CARD_TYPE_OSN)
4682 hdr = (struct qeth_hdr *)new_skb->data;
4683
4684 if ((large_send == QETH_LARGE_SEND_TSO) &&
4685 (cast_type == RTN_UNSPEC)) {
4686 rc = qeth_tso_prepare_packet(card, new_skb, ipv, cast_type);
4687 if (rc) {
4688 __qeth_free_new_skb(skb, new_skb);
4689 return rc;
4690 }
4691 elements_needed++;
4692 } else if (card->info.type != QETH_CARD_TYPE_OSN) {
4693 new_skb2 = qeth_prepare_skb(card, new_skb, &hdr, ipv);
4694 if (!new_skb2) {
4695 __qeth_free_new_skb(skb, new_skb);
4696 return -EINVAL;
4697 }
4698 if (new_skb != skb)
4699 __qeth_free_new_skb(new_skb2, new_skb);
4700 new_skb = new_skb2;
4701 qeth_fill_header(card, hdr, new_skb, ipv, cast_type);
4702 }
4703 if (large_send == QETH_LARGE_SEND_EDDP) {
4704 ctx = qeth_eddp_create_context(card, new_skb, hdr,
4705 skb->sk->sk_protocol);
4706 if (ctx == NULL) {
4707 __qeth_free_new_skb(skb, new_skb);
4708 PRINT_WARN("could not create eddp context\n");
4709 return -EINVAL;
4710 }
4711 } else {
4712 int elems = qeth_get_elements_no(card,(void*) hdr, new_skb,
4713 elements_needed);
4714 if (!elems) {
4715 __qeth_free_new_skb(skb, new_skb);
4716 return -EINVAL;
4717 }
4718 elements_needed += elems;
4719 }
4720
4721 if ((large_send == QETH_LARGE_SEND_NO) &&
4722 (skb->ip_summed == CHECKSUM_PARTIAL))
4723 qeth_tx_csum(new_skb);
4724
4725 if (card->info.type != QETH_CARD_TYPE_IQD)
4726 rc = qeth_do_send_packet(card, queue, new_skb, hdr,
4727 elements_needed, ctx);
4728 else {
4729 if ((!card->options.layer2) &&
4730 (ipv == 0)) {
4731 __qeth_free_new_skb(skb, new_skb);
4732 return -EPERM;
4733 }
4734 rc = qeth_do_send_packet_fast(card, queue, new_skb, hdr,
4735 elements_needed, ctx);
4736 }
4737 if (!rc) {
4738 card->stats.tx_packets++;
4739 card->stats.tx_bytes += tx_bytes;
4740 if (new_skb != skb)
4741 dev_kfree_skb_any(skb);
4742 if (card->options.performance_stats) {
4743 if (tso_size &&
4744 !(large_send == QETH_LARGE_SEND_NO)) {
4745 card->perf_stats.large_send_bytes += tx_bytes;
4746 card->perf_stats.large_send_cnt++;
4747 }
4748 if (nr_frags > 0) {
4749 card->perf_stats.sg_skbs_sent++;
4750
4751 card->perf_stats.sg_frags_sent +=
4752 nr_frags + 1;
4753 }
4754 }
4755 } else {
4756 card->stats.tx_dropped++;
4757 __qeth_free_new_skb(skb, new_skb);
4758 }
4759 if (ctx != NULL) {
4760
4761 qeth_eddp_put_context(ctx);
4762
4763 if (!rc)
