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114#include <linux/init.h>
115#include <linux/kernel.h>
116#include <linux/types.h>
117#include <linux/mm.h>
118#include <linux/swap.h>
119#include <linux/ioport.h>
120#include <linux/sched.h>
121#include <linux/interrupt.h>
122#include <linux/pci.h>
123#include <linux/timex.h>
124#include <asm/bootinfo.h>
125#include <asm/page.h>
126#include <asm/io.h>
127#include <asm/irq.h>
128#include <asm/pci.h>
129#include <asm/processor.h>
130#include <asm/reboot.h>
131#include <asm/time.h>
132#include <asm/wbflush.h>
133#include <linux/bootmem.h>
134#include <linux/blkdev.h>
135#ifdef CONFIG_TOSHIBA_FPCIB0
136#include <asm/i8259.h>
137#include <asm/tx4927/smsc_fdc37m81x.h>
138#endif
139#include <asm/tx4927/toshiba_rbtx4927.h>
140
141
142#undef TOSHIBA_RBTX4927_IRQ_DEBUG
143
144#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
145#define TOSHIBA_RBTX4927_IRQ_NONE 0x00000000
146
147#define TOSHIBA_RBTX4927_IRQ_INFO ( 1 << 0 )
148#define TOSHIBA_RBTX4927_IRQ_WARN ( 1 << 1 )
149#define TOSHIBA_RBTX4927_IRQ_EROR ( 1 << 2 )
150
151#define TOSHIBA_RBTX4927_IRQ_IOC_INIT ( 1 << 10 )
152#define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE ( 1 << 13 )
153#define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE ( 1 << 14 )
154
155#define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff
156#endif
157
158
159#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
160static const u32 toshiba_rbtx4927_irq_debug_flag =
161 (TOSHIBA_RBTX4927_IRQ_NONE | TOSHIBA_RBTX4927_IRQ_INFO |
162 TOSHIBA_RBTX4927_IRQ_WARN | TOSHIBA_RBTX4927_IRQ_EROR
163
164
165
166 );
167#endif
168
169
170#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
171#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag,str...) \
172 if ( (toshiba_rbtx4927_irq_debug_flag) & (flag) ) \
173 { \
174 char tmp[100]; \
175 sprintf( tmp, str ); \
176 printk( "%s(%s:%u)::%s", __FUNCTION__, __FILE__, __LINE__, tmp ); \
177 }
178#else
179#define TOSHIBA_RBTX4927_IRQ_DPRINTK(flag, str...)
180#endif
181
182
183
184
185#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG 0
186#define TOSHIBA_RBTX4927_IRQ_IOC_RAW_END 7
187
188#define TOSHIBA_RBTX4927_IRQ_IOC_BEG ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_BEG)
189#define TOSHIBA_RBTX4927_IRQ_IOC_END ((TX4927_IRQ_PIC_END+1)+TOSHIBA_RBTX4927_IRQ_IOC_RAW_END)
190
191#define TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC TX4927_IRQ_NEST_EXT_ON_PIC
192#define TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC (TOSHIBA_RBTX4927_IRQ_IOC_BEG+2)
193
194extern int tx4927_using_backplane;
195
196static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
197static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
198
199#define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC"
200static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
201 .name = TOSHIBA_RBTX4927_IOC_NAME,
202 .ack = toshiba_rbtx4927_irq_ioc_disable,
203 .mask = toshiba_rbtx4927_irq_ioc_disable,
204 .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
205 .unmask = toshiba_rbtx4927_irq_ioc_enable,
206};
207#define TOSHIBA_RBTX4927_IOC_INTR_ENAB (void __iomem *)0xbc002000UL
208#define TOSHIBA_RBTX4927_IOC_INTR_STAT (void __iomem *)0xbc002006UL
209
210
211u32 bit2num(u32 num)
212{
213 u32 i;
214
215 for (i = 0; i < (sizeof(num) * 8); i++) {
216 if (num & (1 << i)) {
217 return (i);
218 }
219 }
220 return (0);
221}
222
223int toshiba_rbtx4927_irq_nested(int sw_irq)
224{
225 u32 level3;
226
227 level3 = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
228 if (level3) {
229 sw_irq = TOSHIBA_RBTX4927_IRQ_IOC_BEG + bit2num(level3);
230 if (sw_irq != TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC) {
231 goto RETURN;
232 }
233 }
234#ifdef CONFIG_TOSHIBA_FPCIB0
235 if (tx4927_using_backplane) {
236 int irq = i8259_irq();
237 if (irq >= 0)
238 sw_irq = irq;
239 }
240#endif
241
242 RETURN:
243 return (sw_irq);
244}
245
246static struct irqaction toshiba_rbtx4927_irq_ioc_action = {
247 .handler = no_action,
248 .flags = IRQF_SHARED,
249 .mask = CPU_MASK_NONE,
250 .name = TOSHIBA_RBTX4927_IOC_NAME
251};
252
253
254
255
256
257
258
259static void __init toshiba_rbtx4927_irq_ioc_init(void)
260{
261 int i;
262
263 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_INIT,
264 "beg=%d end=%d\n",
265 TOSHIBA_RBTX4927_IRQ_IOC_BEG,
266 TOSHIBA_RBTX4927_IRQ_IOC_END);
267
268 for (i = TOSHIBA_RBTX4927_IRQ_IOC_BEG;
269 i <= TOSHIBA_RBTX4927_IRQ_IOC_END; i++)
270 set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_ioc_type,
271 handle_level_irq);
272
273 setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_IOC_ON_PIC,
274 &toshiba_rbtx4927_irq_ioc_action);
275}
276
277static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq)
278{
279 volatile unsigned char v;
280
281 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENABLE,
282 "irq=%d\n", irq);
283
284 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
285 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
286 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
287 "bad irq=%d\n", irq);
288 panic("\n");
289 }
290
291 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
292 v |= (1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
293 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
294}
295
296
297static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
298{
299 volatile unsigned char v;
300
301 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_DISABLE,
302 "irq=%d\n", irq);
303
304 if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
305 || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
306 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
307 "bad irq=%d\n", irq);
308 panic("\n");
309 }
310
311 v = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB);
312 v &= ~(1 << (irq - TOSHIBA_RBTX4927_IRQ_IOC_BEG));
313 writeb(v, TOSHIBA_RBTX4927_IOC_INTR_ENAB);
314 mmiowb();
315}
316
317
318void __init arch_init_irq(void)
319{
320 extern void tx4927_irq_init(void);
321
322 tx4927_irq_init();
323 toshiba_rbtx4927_irq_ioc_init();
324#ifdef CONFIG_TOSHIBA_FPCIB0
325 if (tx4927_using_backplane)
326 init_i8259_irqs();
327#endif
328
329 set_irq_type(RBTX4927_RTL_8019_IRQ, IRQF_TRIGGER_HIGH);
330
331 wbflush();
332}
333
334void toshiba_rbtx4927_irq_dump(char *key)
335{
336#ifdef TOSHIBA_RBTX4927_IRQ_DEBUG
337 {
338 u32 i, j = 0;
339 for (i = 0; i < NR_IRQS; i++) {
340 if (strcmp(irq_desc[i].chip->name, "none")
341 == 0)
342 continue;
343
344 if ((i >= 1)
345 && (irq_desc[i - 1].chip->name ==
346 irq_desc[i].chip->name)) {
347 j++;
348 } else {
349 j = 0;
350 }
351 TOSHIBA_RBTX4927_IRQ_DPRINTK
352 (TOSHIBA_RBTX4927_IRQ_INFO,
353 "%s irq=0x%02x/%3d s=0x%08x h=0x%08x a=0x%08x ah=0x%08x d=%1d n=%s/%02d\n",
354 key, i, i, irq_desc[i].status,
355 (u32) irq_desc[i].chip,
356 (u32) irq_desc[i].action,
357 (u32) (irq_desc[i].action ? irq_desc[i].
358 action->handler : 0),
359 irq_desc[i].depth,
360 irq_desc[i].chip->name, j);
361 }
362 }
363#endif
364}
365
366void toshiba_rbtx4927_irq_dump_pics(char *s)
367{
368 u32 level0_m;
369 u32 level0_s;
370 u32 level1_m;
371 u32 level1_s;
372 u32 level2;
373 u32 level2_p;
374 u32 level2_s;
375 u32 level3_m;
376 u32 level3_s;
377 u32 level4_m;
378 u32 level4_s;
379 u32 level5_m;
380 u32 level5_s;
381
382 if (s == NULL)
383 s = "null";
384
385 level0_m = (read_c0_status() & 0x0000ff00) >> 8;
386 level0_s = (read_c0_cause() & 0x0000ff00) >> 8;
387
388 level1_m = level0_m;
389 level1_s = level0_s & 0x87;
390
391 level2 = __raw_readl((void __iomem *)0xff1ff6a0UL);
392 level2_p = (((level2 & 0x10000)) ? 0 : 1);
393 level2_s = (((level2 & 0x1f) == 0x1f) ? 0 : (level2 & 0x1f));
394
395 level3_m = readb(TOSHIBA_RBTX4927_IOC_INTR_ENAB) & 0x1f;
396 level3_s = readb(TOSHIBA_RBTX4927_IOC_INTR_STAT) & 0x1f;
397
398 level4_m = inb(0x21);
399 outb(0x0A, 0x20);
400 level4_s = inb(0x20);
401
402 level5_m = inb(0xa1);
403 outb(0x0A, 0xa0);
404 level5_s = inb(0xa0);
405
406 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
407 "dump_raw_pic() ");
408 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
409 "cp0:m=0x%02x/s=0x%02x ", level0_m,
410 level0_s);
411 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
412 "cp0:m=0x%02x/s=0x%02x ", level1_m,
413 level1_s);
414 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
415 "pic:e=0x%02x/s=0x%02x ", level2_p,
416 level2_s);
417 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
418 "ioc:m=0x%02x/s=0x%02x ", level3_m,
419 level3_s);
420 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
421 "sbm:m=0x%02x/s=0x%02x ", level4_m,
422 level4_s);
423 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO,
424 "sbs:m=0x%02x/s=0x%02x ", level5_m,
425 level5_s);
426 TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_INFO, "[%s]\n",
427 s);
428}
429
