LXR linux/drivers/char/drm/drm.h

   1/**
   2 * \file drm.h
   3 * Header for the Direct Rendering Manager
   4 *
   5 * \author Rickard E. (Rik) Faith <faith@valinux.com>
   6 *
   7 * \par Acknowledgments:
   8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
   9 */
  10
  11/*
  12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  14 * All rights reserved.
  15 *
  16 * Permission is hereby granted, free of charge, to any person obtaining a
  17 * copy of this software and associated documentation files (the "Software"),
  18 * to deal in the Software without restriction, including without limitation
  19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  20 * and/or sell copies of the Software, and to permit persons to whom the
  21 * Software is furnished to do so, subject to the following conditions:
  22 *
  23 * The above copyright notice and this permission notice (including the next
  24 * paragraph) shall be included in all copies or substantial portions of the
  25 * Software.
  26 *
  27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  33 * OTHER DEALINGS IN THE SOFTWARE.
  34 */
  35
  36#ifndef _DRM_H_
  37#define _DRM_H_
  38
  39#if defined(__linux__)
  40#if defined(__KERNEL__)
  41#endif
  42#include <asm/ioctl.h>          /* For _IO* macros */
  43#define DRM_IOCTL_NR(n)         _IOC_NR(n)
  44#define DRM_IOC_VOID            _IOC_NONE
  45#define DRM_IOC_READ            _IOC_READ
  46#define DRM_IOC_WRITE           _IOC_WRITE
  47#define DRM_IOC_READWRITE       _IOC_READ|_IOC_WRITE
  48#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  49#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
  50#if defined(__FreeBSD__) && defined(IN_MODULE)
  51/* Prevent name collision when including sys/ioccom.h */
  52#undef ioctl
  53#include <sys/ioccom.h>
  54#define ioctl(a,b,c)            xf86ioctl(a,b,c)
  55#else
  56#include <sys/ioccom.h>
  57#endif                          /* __FreeBSD__ && xf86ioctl */
  58#define DRM_IOCTL_NR(n)         ((n) & 0xff)
  59#define DRM_IOC_VOID            IOC_VOID
  60#define DRM_IOC_READ            IOC_OUT
  61#define DRM_IOC_WRITE           IOC_IN
  62#define DRM_IOC_READWRITE       IOC_INOUT
  63#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
  64#endif
  65
  66#define DRM_MAJOR       226
  67#define DRM_MAX_MINOR   15
  68
  69#define DRM_NAME        "drm"     /**< Name in kernel, /dev, and /proc */
  70#define DRM_MIN_ORDER   5         /**< At least 2^5 bytes = 32 bytes */
  71#define DRM_MAX_ORDER   22        /**< Up to 2^22 bytes = 4MB */
  72#define DRM_RAM_PERCENT 10        /**< How much system ram can we lock? */
  73
  74#define _DRM_LOCK_HELD  0x80000000U /**< Hardware lock is held */
  75#define _DRM_LOCK_CONT  0x40000000U /**< Hardware lock is contended */
  76#define _DRM_LOCK_IS_HELD(lock)    ((lock) & _DRM_LOCK_HELD)
  77#define _DRM_LOCK_IS_CONT(lock)    ((lock) & _DRM_LOCK_CONT)
  78#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
  79
  80typedef unsigned int drm_handle_t;
  81typedef unsigned int drm_context_t;
  82typedef unsigned int drm_drawable_t;
  83typedef unsigned int drm_magic_t;
  84
  85/**
  86 * Cliprect.
  87 *
  88 * \warning: If you change this structure, make sure you change
  89 * XF86DRIClipRectRec in the server as well
  90 *
  91 * \note KW: Actually it's illegal to change either for
  92 * backwards-compatibility reasons.
  93 */
  94struct drm_clip_rect {
  95        unsigned short x1;
  96        unsigned short y1;
  97        unsigned short x2;
  98        unsigned short y2;
  99};
 100
 101/**
 102 * Drawable information.
 103 */
 104struct drm_drawable_info {
 105        unsigned int num_rects;
 106        struct drm_clip_rect *rects;
 107};
 108
 109/**
 110 * Texture region,
 111 */
 112struct drm_tex_region {
 113        unsigned char next;
 114        unsigned char prev;
 115        unsigned char in_use;
 116        unsigned char padding;
 117        unsigned int age;
 118};
 119
 120/**
 121 * Hardware lock.
 122 *
 123 * The lock structure is a simple cache-line aligned integer.  To avoid
 124 * processor bus contention on a multiprocessor system, there should not be any
 125 * other data stored in the same cache line.
 126 */
 127struct drm_hw_lock {
 128        __volatile__ unsigned int lock;         /**< lock variable */
 129        char padding[60];                       /**< Pad to cache line */
 130};
 131
 132/**
 133 * DRM_IOCTL_VERSION ioctl argument type.
 134 *
 135 * \sa drmGetVersion().
 136 */
 137struct drm_version {
 138        int version_major;        /**< Major version */
 139        int version_minor;        /**< Minor version */
 140        int version_patchlevel;   /**< Patch level */
 141        size_t name_len;          /**< Length of name buffer */
 142        char __user *name;        /**< Name of driver */
 143        size_t date_len;          /**< Length of date buffer */
 144        char __user *date;        /**< User-space buffer to hold date */
 145        size_t desc_len;          /**< Length of desc buffer */
 146        char __user *desc;        /**< User-space buffer to hold desc */
 147};
 148
 149/**
 150 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
 151 *
 152 * \sa drmGetBusid() and drmSetBusId().
 153 */
 154struct drm_unique {
 155        size_t unique_len;        /**< Length of unique */
 156        char __user *unique;      /**< Unique name for driver instantiation */
 157};
 158
 159struct drm_list {
 160        int count;                /**< Length of user-space structures */
 161        struct drm_version __user *version;
 162};
 163
 164struct drm_block {
 165        int unused;
 166};
 167
 168/**
 169 * DRM_IOCTL_CONTROL ioctl argument type.
 170 *
 171 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
 172 */
 173struct drm_control {
 174        enum {
 175                DRM_ADD_COMMAND,
 176                DRM_RM_COMMAND,
 177                DRM_INST_HANDLER,
 178                DRM_UNINST_HANDLER
 179        } func;
 180        int irq;
 181};
 182
 183/**
 184 * Type of memory to map.
 185 */
 186enum drm_map_type {
 187        _DRM_FRAME_BUFFER = 0,    /**< WC (no caching), no core dump */
 188        _DRM_REGISTERS = 1,       /**< no caching, no core dump */
 189        _DRM_SHM = 2,             /**< shared, cached */
 190        _DRM_AGP = 3,             /**< AGP/GART */
 191        _DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
 192        _DRM_CONSISTENT = 5,      /**< Consistent memory for PCI DMA */
 193};
 194
 195/**
 196 * Memory mapping flags.
 197 */
 198enum drm_map_flags {
 199        _DRM_RESTRICTED = 0x01,      /**< Cannot be mapped to user-virtual */
 200        _DRM_READ_ONLY = 0x02,
 201        _DRM_LOCKED = 0x04,          /**< shared, cached, locked */
 202        _DRM_KERNEL = 0x08,          /**< kernel requires access */
 203        _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
 204        _DRM_CONTAINS_LOCK = 0x20,   /**< SHM page that contains lock */
 205        _DRM_REMOVABLE = 0x40,       /**< Removable mapping */
 206        _DRM_DRIVER = 0x80           /**< Managed by driver */
 207};
 208
 209struct drm_ctx_priv_map {
 210        unsigned int ctx_id;     /**< Context requesting private mapping */
 211        void *handle;            /**< Handle of map */
 212};
 213
 214/**
 215 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
 216 * argument type.
 217 *
 218 * \sa drmAddMap().
 219 */
 220struct drm_map {
 221        unsigned long offset;    /**< Requested physical address (0 for SAREA)*/
 222        unsigned long size;      /**< Requested physical size (bytes) */
 223        enum drm_map_type type;  /**< Type of memory to map */
 224        enum drm_map_flags flags;        /**< Flags */
 225        void *handle;            /**< User-space: "Handle" to pass to mmap() */
 226                                 /**< Kernel-space: kernel-virtual address */
 227        int mtrr;                /**< MTRR slot used */
 228        /*   Private data */
 229};
 230
 231/**
 232 * DRM_IOCTL_GET_CLIENT ioctl argument type.
 233 */
 234struct drm_client {
 235        int idx;                /**< Which client desired? */
 236        int auth;               /**< Is client authenticated? */
 237        unsigned long pid;      /**< Process ID */
 238        unsigned long uid;      /**< User ID */
 239        unsigned long magic;    /**< Magic */
 240        unsigned long iocs;     /**< Ioctl count */
 241};
 242
 243enum drm_stat_type {
 244        _DRM_STAT_LOCK,
 245        _DRM_STAT_OPENS,
 246        _DRM_STAT_CLOSES,
 247        _DRM_STAT_IOCTLS,
 248        _DRM_STAT_LOCKS,
 249        _DRM_STAT_UNLOCKS,
 250        _DRM_STAT_VALUE,        /**< Generic value */
 251        _DRM_STAT_BYTE,         /**< Generic byte counter (1024bytes/K) */
 252        _DRM_STAT_COUNT,        /**< Generic non-byte counter (1000/k) */
 253
 254        _DRM_STAT_IRQ,          /**< IRQ */
 255        _DRM_STAT_PRIMARY,      /**< Primary DMA bytes */
 256        _DRM_STAT_SECONDARY,    /**< Secondary DMA bytes */
 257        _DRM_STAT_DMA,          /**< DMA */
 258        _DRM_STAT_SPECIAL,      /**< Special DMA (e.g., priority or polled) */
 259        _DRM_STAT_MISSED        /**< Missed DMA opportunity */
 260            /* Add to the *END* of the list */
 261};
 262
 263/**
 264 * DRM_IOCTL_GET_STATS ioctl argument type.
 265 */
 266struct drm_stats {
 267        unsigned long count;
 268        struct {
 269                unsigned long value;
 270                enum drm_stat_type type;
 271        } data[15];
 272};
 273
 274/**
 275 * Hardware locking flags.
 276 */
 277enum drm_lock_flags {
 278        _DRM_LOCK_READY = 0x01,      /**< Wait until hardware is ready for DMA */
 279        _DRM_LOCK_QUIESCENT = 0x02,  /**< Wait until hardware quiescent */
 280        _DRM_LOCK_FLUSH = 0x04,      /**< Flush this context's DMA queue first */
 281        _DRM_LOCK_FLUSH_ALL = 0x08,  /**< Flush all DMA queues first */
 282        /* These *HALT* flags aren't supported yet
 283           -- they will be used to support the
 284           full-screen DGA-like mode. */
 285        _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
 286        _DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
 287};
 288
 289/**
 290 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
 291 *
 292 * \sa drmGetLock() and drmUnlock().
 293 */
 294struct drm_lock {
 295        int context;
 296        enum drm_lock_flags flags;
 297};
 298
 299/**
 300 * DMA flags
 301 *
 302 * \warning
 303 * These values \e must match xf86drm.h.
 304 *
 305 * \sa drm_dma.
 306 */
 307enum drm_dma_flags {
 308        /* Flags for DMA buffer dispatch */
 309        _DRM_DMA_BLOCK = 0x01,        /**<
 310                                       * Block until buffer dispatched.
 311                                       *
 312                                       * \note The buffer may not yet have
 313                                       * been processed by the hardware --
 314                                       * getting a hardware lock with the
 315                                       * hardware quiescent will ensure
 316                                       * that the buffer has been
 317                                       * processed.
 318                                       */
 319        _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
 320        _DRM_DMA_PRIORITY = 0x04,     /**< High priority dispatch */
 321
 322        /* Flags for DMA buffer request */
 323        _DRM_DMA_WAIT = 0x10,         /**< Wait for free buffers */
 324        _DRM_DMA_SMALLER_OK = 0x20,   /**< Smaller-than-requested buffers OK */
 325        _DRM_DMA_LARGER_OK = 0x40     /**< Larger-than-requested buffers OK */
 326};
 327
 328/**
 329 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
 330 *
 331 * \sa drmAddBufs().
 332 */
 333struct drm_buf_desc {
 334        int count;               /**< Number of buffers of this size */
 335        int size;                /**< Size in bytes */
 336        int low_mark;            /**< Low water mark */
 337        int high_mark;           /**< High water mark */
 338        enum {
 339                _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
 340                _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
 341                _DRM_SG_BUFFER = 0x04,  /**< Scatter/gather memory buffer */
 342                _DRM_FB_BUFFER = 0x08,  /**< Buffer is in frame buffer */
 343                _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
 344        } flags;
 345        unsigned long agp_start; /**<
 346                                  * Start address of where the AGP buffers are
 347                                  * in the AGP aperture
 348                                  */
 349};
 350
 351/**
 352 * DRM_IOCTL_INFO_BUFS ioctl argument type.
 353 */
 354struct drm_buf_info {
 355        int count;              /**< Entries in list */
 356        struct drm_buf_desc __user *list;
 357};
 358
 359/**
 360 * DRM_IOCTL_FREE_BUFS ioctl argument type.
 361 */
 362struct drm_buf_free {
 363        int count;
 364        int __user *list;
 365};
 366
 367/**
 368 * Buffer information
 369 *
 370 * \sa drm_buf_map.
 371 */
 372struct drm_buf_pub {
 373        int idx;                       /**< Index into the master buffer list */
 374        int total;                     /**< Buffer size */
 375        int used;                      /**< Amount of buffer in use (for DMA) */
 376        void __user *address;          /**< Address of buffer */
 377};
 378
 379/**
 380 * DRM_IOCTL_MAP_BUFS ioctl argument type.
 381 */
 382struct drm_buf_map {
 383        int count;              /**< Length of the buffer list */
 384        void __user *virtual;           /**< Mmap'd area in user-virtual */
 385        struct drm_buf_pub __user *list;        /**< Buffer information */
 386};
 387
 388/**
 389 * DRM_IOCTL_DMA ioctl argument type.
 390 *
 391 * Indices here refer to the offset into the buffer list in drm_buf_get.
 392 *
 393 * \sa drmDMA().
 394 */
 395struct drm_dma {
 396        int context;                      /**< Context handle */
 397        int send_count;                   /**< Number of buffers to send */
 398        int __user *send_indices;         /**< List of handles to buffers */
 399        int __user *send_sizes;           /**< Lengths of data to send */
 400        enum drm_dma_flags flags;         /**< Flags */
 401        int request_count;                /**< Number of buffers requested */
 402        int request_size;                 /**< Desired size for buffers */
 403        int __user *request_indices;      /**< Buffer information */
 404        int __user *request_sizes;
 405        int granted_count;                /**< Number of buffers granted */
 406};
 407
 408enum drm_ctx_flags {
 409        _DRM_CONTEXT_PRESERVED = 0x01,
 410        _DRM_CONTEXT_2DONLY = 0x02
 411};
 412
 413/**
 414 * DRM_IOCTL_ADD_CTX ioctl argument type.
 415 *
 416 * \sa drmCreateContext() and drmDestroyContext().
 417 */
 418struct drm_ctx {
 419        drm_context_t handle;
 420        enum drm_ctx_flags flags;
 421};
 422
 423/**
 424 * DRM_IOCTL_RES_CTX ioctl argument type.
 425 */
 426struct drm_ctx_res {
 427        int count;
 428        struct drm_ctx __user *contexts;
 429};
 430
 431/**
 432 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
 433 */
 434struct drm_draw {
 435        drm_drawable_t handle;
 436};
 437
 438/**
 439 * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
 440 */
 441typedef enum {
 442        DRM_DRAWABLE_CLIPRECTS,
 443} drm_drawable_info_type_t;
 444
 445struct drm_update_draw {
 446        drm_drawable_t handle;
 447        unsigned int type;
 448        unsigned int num;
 449        unsigned long long data;
 450};
 451
 452/**
 453 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
 454 */
 455struct drm_auth {
 456        drm_magic_t magic;
 457};
 458
 459/**
 460 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
 461 *
 462 * \sa drmGetInterruptFromBusID().
 463 */
 464struct drm_irq_busid {
 465        int irq;        /**< IRQ number */
 466        int busnum;     /**< bus number */
 467        int devnum;     /**< device number */
 468        int funcnum;    /**< function number */
 469};
 470
 471enum drm_vblank_seq_type {
 472        _DRM_VBLANK_ABSOLUTE = 0x0,     /**< Wait for specific vblank sequence number */
 473        _DRM_VBLANK_RELATIVE = 0x1,     /**< Wait for given number of vblanks */
 474        _DRM_VBLANK_NEXTONMISS = 0x10000000,    /**< If missed, wait for next vblank */
 475        _DRM_VBLANK_SECONDARY = 0x20000000,     /**< Secondary display controller */
 476        _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
 477};
 478
 479#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
 480#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_SIGNAL | _DRM_VBLANK_SECONDARY | \
 481                                _DRM_VBLANK_NEXTONMISS)
 482
 483struct drm_wait_vblank_request {
 484        enum drm_vblank_seq_type type;
 485        unsigned int sequence;
 486        unsigned long signal;
 487};
 488
 489struct drm_wait_vblank_reply {
 490        enum drm_vblank_seq_type type;
 491        unsigned int sequence;
 492        long tval_sec;
 493        long tval_usec;
 494};
 495
 496/**
 497 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
 498 *
 499 * \sa drmWaitVBlank().
 500 */
 501union drm_wait_vblank {
 502        struct drm_wait_vblank_request request;
 503        struct drm_wait_vblank_reply reply;
 504};
 505
 506/**
 507 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
 508 *
 509 * \sa drmAgpEnable().
 510 */
 511struct drm_agp_mode {
 512        unsigned long mode;     /**< AGP mode */
 513};
 514
 515/**
 516 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
 517 *
 518 * \sa drmAgpAlloc() and drmAgpFree().
 519 */
 520struct drm_agp_buffer {
 521        unsigned long size;     /**< In bytes -- will round to page boundary */
 522        unsigned long handle;   /**< Used for binding / unbinding */
 523        unsigned long type;     /**< Type of memory to allocate */
 524        unsigned long physical; /**< Physical used by i810 */
 525};
 526
 527/**
 528 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
 529 *
 530 * \sa drmAgpBind() and drmAgpUnbind().
 531 */
 532struct drm_agp_binding {
 533        unsigned long handle;   /**< From drm_agp_buffer */
 534        unsigned long offset;   /**< In bytes -- will round to page boundary */
 535};
 536
 537/**
 538 * DRM_IOCTL_AGP_INFO ioctl argument type.
 539 *
 540 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
 541 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
 542 * drmAgpVendorId() and drmAgpDeviceId().
 543 */
 544struct drm_agp_info {
 545        int agp_version_major;
 546        int agp_version_minor;
 547        unsigned long mode;
 548        unsigned long aperture_base;    /* physical address */
 549        unsigned long aperture_size;    /* bytes */
 550        unsigned long memory_allowed;   /* bytes */
 551        unsigned long memory_used;
 552
 553        /* PCI information */
 554        unsigned short id_vendor;
 555        unsigned short id_device;
 556};
 557
 558/**
 559 * DRM_IOCTL_SG_ALLOC ioctl argument type.
 560 */
 561struct drm_scatter_gather {
 562        unsigned long size;     /**< In bytes -- will round to page boundary */
 563        unsigned long handle;   /**< Used for mapping / unmapping */
 564};
 565
 566/**
 567 * DRM_IOCTL_SET_VERSION ioctl argument type.
 568 */
 569struct drm_set_version {
 570        int drm_di_major;
 571        int drm_di_minor;
 572        int drm_dd_major;
 573        int drm_dd_minor;
 574};
 575
 576#define DRM_IOCTL_BASE                  'd'
 577#define DRM_IO(nr)                      _IO(DRM_IOCTL_BASE,nr)
 578#define DRM_IOR(nr,type)                _IOR(DRM_IOCTL_BASE,nr,type)
 579#define DRM_IOW(nr,type)                _IOW(DRM_IOCTL_BASE,nr,type)
 580#define DRM_IOWR(nr,type)               _IOWR(DRM_IOCTL_BASE,nr,type)
 581
 582#define DRM_IOCTL_VERSION               DRM_IOWR(0x00, struct drm_version)
 583#define DRM_IOCTL_GET_UNIQUE            DRM_IOWR(0x01, struct drm_unique)
 584#define DRM_IOCTL_GET_MAGIC             DRM_IOR( 0x02, struct drm_auth)
 585#define DRM_IOCTL_IRQ_BUSID             DRM_IOWR(0x03, struct drm_irq_busid)
 586#define DRM_IOCTL_GET_MAP               DRM_IOWR(0x04, struct drm_map)
 587#define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, struct drm_client)
 588#define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, struct drm_stats)
 589#define DRM_IOCTL_SET_VERSION           DRM_IOWR(0x07, struct drm_set_version)
 590
 591#define DRM_IOCTL_SET_UNIQUE            DRM_IOW( 0x10, struct drm_unique)
 592#define DRM_IOCTL_AUTH_MAGIC            DRM_IOW( 0x11, struct drm_auth)
 593#define DRM_IOCTL_BLOCK                 DRM_IOWR(0x12, struct drm_block)
 594#define DRM_IOCTL_UNBLOCK               DRM_IOWR(0x13, struct drm_block)
 595#define DRM_IOCTL_CONTROL               DRM_IOW( 0x14, struct drm_control)
 596#define DRM_IOCTL_ADD_MAP               DRM_IOWR(0x15, struct drm_map)
 597#define DRM_IOCTL_ADD_BUFS              DRM_IOWR(0x16, struct drm_buf_desc)
 598#define DRM_IOCTL_MARK_BUFS             DRM_IOW( 0x17, struct drm_buf_desc)
 599#define DRM_IOCTL_INFO_BUFS             DRM_IOWR(0x18, struct drm_buf_info)
 600#define DRM_IOCTL_MAP_BUFS              DRM_IOWR(0x19, struct drm_buf_map)
 601#define DRM_IOCTL_FREE_BUFS             DRM_IOW( 0x1a, struct drm_buf_free)
 602
 603#define DRM_IOCTL_RM_MAP                DRM_IOW( 0x1b, struct drm_map)
 604
 605#define DRM_IOCTL_SET_SAREA_CTX         DRM_IOW( 0x1c, struct drm_ctx_priv_map)
 606#define DRM_IOCTL_GET_SAREA_CTX         DRM_IOWR(0x1d, struct drm_ctx_priv_map)
 607
 608#define DRM_IOCTL_ADD_CTX               DRM_IOWR(0x20, struct drm_ctx)
 609#define DRM_IOCTL_RM_CTX                DRM_IOWR(0x21, struct drm_ctx)
 610#define DRM_IOCTL_MOD_CTX               DRM_IOW( 0x22, struct drm_ctx)
 611#define DRM_IOCTL_GET_CTX               DRM_IOWR(0x23, struct drm_ctx)
 612#define DRM_IOCTL_SWITCH_CTX            DRM_IOW( 0x24, struct drm_ctx)
 613#define DRM_IOCTL_NEW_CTX               DRM_IOW( 0x25, struct drm_ctx)
 614#define DRM_IOCTL_RES_CTX               DRM_IOWR(0x26, struct drm_ctx_res)
 615#define DRM_IOCTL_ADD_DRAW              DRM_IOWR(0x27, struct drm_draw)
 616#define DRM_IOCTL_RM_DRAW               DRM_IOWR(0x28, struct drm_draw)
 617#define DRM_IOCTL_DMA                   DRM_IOWR(0x29, struct drm_dma)
 618#define DRM_IOCTL_LOCK                  DRM_IOW( 0x2a, struct drm_lock)
 619#define DRM_IOCTL_UNLOCK                DRM_IOW( 0x2b, struct drm_lock)
 620#define DRM_IOCTL_FINISH                DRM_IOW( 0x2c, struct drm_lock)
 621
 622#define DRM_IOCTL_AGP_ACQUIRE           DRM_IO(  0x30)
 623#define DRM_IOCTL_AGP_RELEASE           DRM_IO(  0x31)
 624#define DRM_IOCTL_AGP_ENABLE            DRM_IOW( 0x32, struct drm_agp_mode)
 625#define DRM_IOCTL_AGP_INFO              DRM_IOR( 0x33, struct drm_agp_info)
 626#define DRM_IOCTL_AGP_ALLOC             DRM_IOWR(0x34, struct drm_agp_buffer)
 627#define DRM_IOCTL_AGP_FREE              DRM_IOW( 0x35, struct drm_agp_buffer)
 628#define DRM_IOCTL_AGP_BIND              DRM_IOW( 0x36, struct drm_agp_binding)
 629#define DRM_IOCTL_AGP_UNBIND            DRM_IOW( 0x37, struct drm_agp_binding)
 630
 631#define DRM_IOCTL_SG_ALLOC              DRM_IOW( 0x38, struct drm_scatter_gather)
 632#define DRM_IOCTL_SG_FREE               DRM_IOW( 0x39, struct drm_scatter_gather)
 633
 634#define DRM_IOCTL_WAIT_VBLANK           DRM_IOWR(0x3a, union drm_wait_vblank)
 635
 636#define DRM_IOCTL_UPDATE_DRAW           DRM_IOW(0x3f, struct drm_update_draw)
 637
 638/**
 639 * Device specific ioctls should only be in their respective headers
 640 * The device specific ioctl range is from 0x40 to 0x99.
 641 * Generic IOCTLS restart at 0xA0.
 642 *
 643 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
 644 * drmCommandReadWrite().
 645 */
 646#define DRM_COMMAND_BASE                0x40
 647#define DRM_COMMAND_END                 0xA0
 648
 649/* typedef area */
 650#ifndef __KERNEL__
 651typedef struct drm_clip_rect drm_clip_rect_t;
 652typedef struct drm_drawable_info drm_drawable_info_t;
 653typedef struct drm_tex_region drm_tex_region_t;
 654typedef struct drm_hw_lock drm_hw_lock_t;
 655typedef struct drm_version drm_version_t;
 656typedef struct drm_unique drm_unique_t;
 657typedef struct drm_list drm_list_t;
 658typedef struct drm_block drm_block_t;
 659typedef struct drm_control drm_control_t;
 660typedef enum drm_map_type drm_map_type_t;
 661typedef enum drm_map_flags drm_map_flags_t;
 662typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
 663typedef struct drm_map drm_map_t;
 664typedef struct drm_client drm_client_t;
 665typedef enum drm_stat_type drm_stat_type_t;
 666typedef struct drm_stats drm_stats_t;
 667typedef enum drm_lock_flags drm_lock_flags_t;
 668typedef struct drm_lock drm_lock_t;
 669typedef enum drm_dma_flags drm_dma_flags_t;
 670typedef struct drm_buf_desc drm_buf_desc_t;
 671typedef struct drm_buf_info drm_buf_info_t;
 672typedef struct drm_buf_free drm_buf_free_t;
 673typedef struct drm_buf_pub drm_buf_pub_t;
 674typedef struct drm_buf_map drm_buf_map_t;
 675typedef struct drm_dma drm_dma_t;
 676typedef union drm_wait_vblank drm_wait_vblank_t;
 677typedef struct drm_agp_mode drm_agp_mode_t;
 678typedef enum drm_ctx_flags drm_ctx_flags_t;
 679typedef struct drm_ctx drm_ctx_t;
 680typedef struct drm_ctx_res drm_ctx_res_t;
 681typedef struct drm_draw drm_draw_t;
 682typedef struct drm_update_draw drm_update_draw_t;
 683typedef struct drm_auth drm_auth_t;
 684typedef struct drm_irq_busid drm_irq_busid_t;
 685typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
 686
 687typedef struct drm_agp_buffer drm_agp_buffer_t;
 688typedef struct drm_agp_binding drm_agp_binding_t;
 689typedef struct drm_agp_info drm_agp_info_t;
 690typedef struct drm_scatter_gather drm_scatter_gather_t;
 691typedef struct drm_set_version drm_set_version_t;
 692#endif
 693
 694#endif
 695