1# 2# For a description of the syntax of this configuration file, 3# see Documentation/kbuild/kconfig-language.txt. 4# 5 6mainmenu "Blackfin Kernel Configuration" 7 8config MMU 9 bool 10 default n 11 12config FPU 13 bool 14 default n 15 16config RWSEM_GENERIC_SPINLOCK 17 bool 18 default y 19 20config RWSEM_XCHGADD_ALGORITHM 21 bool 22 default n 23 24config BLACKFIN 25 bool 26 default y 27 select HAVE_IDE 28 select HAVE_OPROFILE 29 30config ZONE_DMA 31 bool 32 default y 33 34config SEMAPHORE_SLEEPERS 35 bool 36 default y 37 38config GENERIC_FIND_NEXT_BIT 39 bool 40 default y 41 42config GENERIC_HWEIGHT 43 bool 44 default y 45 46config GENERIC_HARDIRQS 47 bool 48 default y 49 50config GENERIC_IRQ_PROBE 51 bool 52 default y 53 54config GENERIC_TIME 55 bool 56 default n 57 58config GENERIC_GPIO 59 bool 60 default y 61 62config FORCE_MAX_ZONEORDER 63 int 64 default "14" 65 66config GENERIC_CALIBRATE_DELAY 67 bool 68 default y 69 70config HARDWARE_PM 71 def_bool y 72 depends on OPROFILE 73 74source "init/Kconfig" 75source "kernel/Kconfig.preempt" 76 77menu "Blackfin Processor Options" 78 79comment "Processor and Board Settings" 80 81choice 82 prompt "CPU" 83 default BF533 84 85config BF522 86 bool "BF522" 87 help 88 BF522 Processor Support. 89 90config BF523 91 bool "BF523" 92 help 93 BF523 Processor Support. 94 95config BF524 96 bool "BF524" 97 help 98 BF524 Processor Support. 99 100config BF525 101 bool "BF525" 102 help 103 BF525 Processor Support. 104 105config BF526 106 bool "BF526" 107 help 108 BF526 Processor Support. 109 110config BF527 111 bool "BF527" 112 help 113 BF527 Processor Support. 114 115config BF531 116 bool "BF531" 117 help 118 BF531 Processor Support. 119 120config BF532 121 bool "BF532" 122 help 123 BF532 Processor Support. 124 125config BF533 126 bool "BF533" 127 help 128 BF533 Processor Support. 129 130config BF534 131 bool "BF534" 132 help 133 BF534 Processor Support. 134 135config BF536 136 bool "BF536" 137 help 138 BF536 Processor Support. 139 140config BF537 141 bool "BF537" 142 help 143 BF537 Processor Support. 144 145config BF542 146 bool "BF542" 147 help 148 BF542 Processor Support. 149 150config BF544 151 bool "BF544" 152 help 153 BF544 Processor Support. 154 155config BF547 156 bool "BF547" 157 help 158 BF547 Processor Support. 159 160config BF548 161 bool "BF548" 162 help 163 BF548 Processor Support. 164 165config BF549 166 bool "BF549" 167 help 168 BF549 Processor Support. 169 170config BF561 171 bool "BF561" 172 help 173 Not Supported Yet - Work in progress - BF561 Processor Support. 174 175endchoice 176 177choice 178 prompt "Silicon Rev" 179 default BF_REV_0_1 if BF527 180 default BF_REV_0_2 if BF537 181 default BF_REV_0_3 if BF533 182 default BF_REV_0_0 if BF549 183 184config BF_REV_0_0 185 bool "0.0" 186 depends on (BF52x || BF54x) 187 188config BF_REV_0_1 189 bool "0.1" 190 depends on (BF52x || BF54x) 191 192config BF_REV_0_2 193 bool "0.2" 194 depends on (BF537 || BF536 || BF534) 195 196config BF_REV_0_3 197 bool "0.3" 198 depends on (BF561 || BF537 || BF536 || BF534 || BF533 || BF532 || BF531) 199 200config BF_REV_0_4 201 bool "0.4" 202 depends on (BF561 || BF533 || BF532 || BF531) 203 204config BF_REV_0_5 205 bool "0.5" 206 depends on (BF561 || BF533 || BF532 || BF531) 207 208config BF_REV_ANY 209 bool "any" 210 211config BF_REV_NONE 212 bool "none" 213 214endchoice 215 216config BF52x 217 bool 218 depends on (BF522 || BF523 || BF524 || BF525 || BF526 || BF527) 219 default y 220 221config BF53x 222 bool 223 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537) 224 default y 225 226config BF54x 227 bool 228 depends on (BF542 || BF544 || BF547 || BF548 || BF549) 229 default y 230 231config BFIN_DUAL_CORE 232 bool 233 depends on (BF561) 234 default y 235 236config BFIN_SINGLE_CORE 237 bool 238 depends on !BFIN_DUAL_CORE 239 default y 240 241config MEM_GENERIC_BOARD 242 bool 243 depends on GENERIC_BOARD 244 default y 245 246config MEM_MT48LC64M4A2FB_7E 247 bool 248 depends on (BFIN533_STAMP) 249 default y 250 251config MEM_MT48LC16M16A2TG_75 252 bool 253 depends on (BFIN533_EZKIT || BFIN561_EZKIT \ 254 || BFIN533_BLUETECHNIX_CM || BFIN537_BLUETECHNIX_CM \ 255 || H8606_HVSISTEMAS) 256 default y 257 258config MEM_MT48LC32M8A2_75 259 bool 260 depends on (BFIN537_STAMP || PNAV10) 261 default y 262 263config MEM_MT48LC8M32B2B5_7 264 bool 265 depends on (BFIN561_BLUETECHNIX_CM) 266 default y 267 268config MEM_MT48LC32M16A2TG_75 269 bool 270 depends on (BFIN527_EZKIT) 271 default y 272 273source "arch/blackfin/mach-bf527/Kconfig" 274source "arch/blackfin/mach-bf533/Kconfig" 275source "arch/blackfin/mach-bf561/Kconfig" 276source "arch/blackfin/mach-bf537/Kconfig" 277source "arch/blackfin/mach-bf548/Kconfig" 278 279menu "Board customizations" 280 281config CMDLINE_BOOL 282 bool "Default bootloader kernel arguments" 283 284config CMDLINE 285 string "Initial kernel command string" 286 depends on CMDLINE_BOOL 287 default "console=ttyBF0,57600" 288 help 289 If you don't have a boot loader capable of passing a command line string 290 to the kernel, you may specify one here. As a minimum, you should specify 291 the memory size and the root device (e.g., mem=8M, root=/dev/nfs). 292 293comment "Clock/PLL Setup" 294 295config CLKIN_HZ 296 int "Crystal Frequency in Hz" 297 default "11059200" if BFIN533_STAMP 298 default "27000000" if BFIN533_EZKIT 299 default "25000000" if (BFIN537_STAMP || BFIN527_EZKIT || H8606_HVSISTEMAS) 300 default "30000000" if BFIN561_EZKIT 301 default "24576000" if PNAV10 302 help 303 The frequency of CLKIN crystal oscillator on the board in Hz. 304 305config BFIN_KERNEL_CLOCK 306 bool "Re-program Clocks while Kernel boots?" 307 default n 308 help 309 This option decides if kernel clocks are re-programed from the 310 bootloader settings. If the clocks are not set, the SDRAM settings 311 are also not changed, and the Bootloader does 100% of the hardware 312 configuration. 313 314config PLL_BYPASS 315 bool "Bypass PLL" 316 depends on BFIN_KERNEL_CLOCK 317 default n 318 319config CLKIN_HALF 320 bool "Half Clock In" 321 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS) 322 default n 323 help 324 If this is set the clock will be divided by 2, before it goes to the PLL. 325 326config VCO_MULT 327 int "VCO Multiplier" 328 depends on BFIN_KERNEL_CLOCK && (! PLL_BYPASS) 329 range 1 64 330 default "22" if BFIN533_EZKIT 331 default "45" if BFIN533_STAMP 332 default "20" if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT) 333 default "22" if BFIN533_BLUETECHNIX_CM 334 default "20" if BFIN537_BLUETECHNIX_CM 335 default "20" if BFIN561_BLUETECHNIX_CM 336 default "20" if BFIN561_EZKIT 337 default "16" if H8606_HVSISTEMAS 338 help 339 This controls the frequency of the on-chip PLL. This can be between 1 and 64. 340 PLL Frequency = (Crystal Frequency) * (this setting) 341 342choice 343 prompt "Core Clock Divider" 344 depends on BFIN_KERNEL_CLOCK 345 default CCLK_DIV_1 346 help 347 This sets the frequency of the core. It can be 1, 2, 4 or 8 348 Core Frequency = (PLL frequency) / (this setting) 349 350config CCLK_DIV_1 351 bool "1" 352 353config CCLK_DIV_2 354 bool "2" 355 356config CCLK_DIV_4 357 bool "4" 358 359config CCLK_DIV_8 360 bool "8" 361endchoice 362 363config SCLK_DIV 364 int "System Clock Divider" 365 depends on BFIN_KERNEL_CLOCK 366 range 1 15 367 default 5 if BFIN533_EZKIT 368 default 5 if BFIN533_STAMP 369 default 4 if (BFIN537_STAMP || BFIN527_EZKIT || BFIN548_EZKIT) 370 default 5 if BFIN533_BLUETECHNIX_CM 371 default 4 if BFIN537_BLUETECHNIX_CM 372 default 4 if BFIN561_BLUETECHNIX_CM 373 default 5 if BFIN561_EZKIT 374 default 3 if H8606_HVSISTEMAS 375 help 376 This sets the frequency of the system clock (including SDRAM or DDR). 377 This can be between 1 and 15 378 System Clock = (PLL frequency) / (this setting) 379 380# 381# Max & Min Speeds for various Chips 382# 383config MAX_VCO_HZ 384 int 385 default 600000000 if BF522 386 default 400000000 if BF523 387 default 400000000 if BF524 388 default 600000000 if BF525 389 default 400000000 if BF526 390 default 600000000 if BF527 391 default 400000000 if BF531 392 default 400000000 if BF532 393 default 750000000 if BF533 394 default 500000000 if BF534 395 default 400000000 if BF536 396 default 600000000 if BF537 397 default 533333333 if BF538 398 default 533333333 if BF539 399 default 600000000 if BF542 400 default 533333333 if BF544 401 default 600000000 if BF547 402 default 600000000 if BF548 403 default 533333333 if BF549 404 default 600000000 if BF561 405 406config MIN_VCO_HZ 407 int 408 default 50000000 409 410config MAX_SCLK_HZ 411 int 412 default 133333333 413 414config MIN_SCLK_HZ 415 int 416 default 27000000 417 418comment "Kernel Timer/Scheduler" 419 420source kernel/Kconfig.hz 421 422comment "Memory Setup" 423 424config MEM_SIZE 425 int "SDRAM Memory Size in MBytes" 426 default 32 if BFIN533_EZKIT 427 default 64 if BFIN527_EZKIT 428 default 64 if BFIN537_STAMP 429 default 64 if BFIN548_EZKIT 430 default 64 if BFIN561_EZKIT 431 default 128 if BFIN533_STAMP 432 default 64 if PNAV10 433 default 32 if H8606_HVSISTEMAS 434 435config MEM_ADD_WIDTH 436 int "SDRAM Memory Address Width" 437 depends on (!BF54x) 438 default 9 if BFIN533_EZKIT 439 default 9 if BFIN561_EZKIT 440 default 9 if H8606_HVSISTEMAS 441 default 10 if BFIN527_EZKIT 442 default 10 if BFIN537_STAMP 443 default 11 if BFIN533_STAMP 444 default 10 if PNAV10 445 446 447choice 448 prompt "DDR SDRAM Chip Type" 449 depends on BFIN548_EZKIT 450 default MEM_MT46V32M16_5B 451 452config MEM_MT46V32M16_6T 453 bool "MT46V32M16_6T" 454 455config MEM_MT46V32M16_5B 456 bool "MT46V32M16_5B" 457endchoice 458 459config ENET_FLASH_PIN 460 int "PF port/pin used for flash and ethernet sharing" 461 depends on (BFIN533_STAMP) 462 default 0 463 help 464 PF port/pin used for flash and ethernet sharing to allow other PF 465 pins to be used on other platforms without having to touch common 466 code. 467 For example: PF0 --> 0,PF1 --> 1,PF2 --> 2, etc. 468 469config BOOT_LOAD 470 hex "Kernel load address for booting" 471 default "0x1000" 472 range 0x1000 0x20000000 473 help 474 This option allows you to set the load address of the kernel. 475 This can be useful if you are on a board which has a small amount 476 of memory or you wish to reserve some memory at the beginning of 477 the address space. 478 479 Note that you need to keep this value above 4k (0x1000) as this 480 memory region is used to capture NULL pointer references as well 481 as some core kernel functions. 482 483choice 484 prompt "Blackfin Exception Scratch Register" 485 default BFIN_SCRATCH_REG_RETN 486 help 487 Select the resource to reserve for the Exception handler: 488 - RETN: Non-Maskable Interrupt (NMI) 489 - RETE: Exception Return (JTAG/ICE) 490 - CYCLES: Performance counter 491 492 If you are unsure, please select "RETN". 493 494config BFIN_SCRATCH_REG_RETN 495 bool "RETN" 496 help 497 Use the RETN register in the Blackfin exception handler 498 as a stack scratch register. This means you cannot 499 safely use NMI on the Blackfin while running Linux, but 500 you can debug the system with a JTAG ICE and use the 501 CYCLES performance registers. 502 503 If you are unsure, please select "RETN". 504 505config BFIN_SCRATCH_REG_RETE 506 bool "RETE" 507 help 508 Use the RETE register in the Blackfin exception handler 509 as a stack scratch register. This means you cannot 510 safely use a JTAG ICE while debugging a Blackfin board, 511 but you can safely use the CYCLES performance registers 512 and the NMI. 513 514 If you are unsure, please select "RETN". 515 516config BFIN_SCRATCH_REG_CYCLES 517 bool "CYCLES" 518 help 519 Use the CYCLES register in the Blackfin exception handler 520 as a stack scratch register. This means you cannot 521 safely use the CYCLES performance registers on a Blackfin 522 board at anytime, but you can debug the system with a JTAG 523 ICE and use the NMI. 524 525 If you are unsure, please select "RETN". 526 527endchoice 528 529endmenu 530 531 532menu "Blackfin Kernel Optimizations" 533 534comment "Memory Optimizations" 535 536config I_ENTRY_L1 537 bool "Locate interrupt entry code in L1 Memory" 538 default y 539 help 540 If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked 541 into L1 instruction memory. (less latency) 542 543config EXCPT_IRQ_SYSC_L1 544 bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory" 545 default y 546 help 547 If enabled, the entire ASM lowlevel exception and interrupt entry code 548 (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. 549 (less latency) 550 551config DO_IRQ_L1 552 bool "Locate frequently called do_irq dispatcher function in L1 Memory" 553 default y 554 help 555 If enabled, the frequently called do_irq dispatcher function is linked 556 into L1 instruction memory. (less latency) 557 558config CORE_TIMER_IRQ_L1 559 bool "Locate frequently called timer_interrupt() function in L1 Memory" 560 default y 561 help 562 If enabled, the frequently called timer_interrupt() function is linked 563 into L1 instruction memory. (less latency) 564 565config IDLE_L1 566 bool "Locate frequently idle function in L1 Memory" 567 default y 568 help 569 If enabled, the frequently called idle function is linked 570 into L1 instruction memory. (less latency) 571 572config SCHEDULE_L1 573 bool "Locate kernel schedule function in L1 Memory" 574 default y 575 help 576 If enabled, the frequently called kernel schedule is linked 577 into L1 instruction memory. (less latency) 578 579config ARITHMETIC_OPS_L1 580 bool "Locate kernel owned arithmetic functions in L1 Memory" 581 default y 582 help 583 If enabled, arithmetic functions are linked 584 into L1 instruction memory. (less latency) 585 586config ACCESS_OK_L1 587 bool "Locate access_ok function in L1 Memory" 588 default y 589 help 590 If enabled, the access_ok function is linked 591 into L1 instruction memory. (less latency) 592 593config MEMSET_L1 594 bool "Locate memset function in L1 Memory" 595 default y 596 help 597 If enabled, the memset function is linked 598 into L1 instruction memory. (less latency) 599 600config MEMCPY_L1 601 bool "Locate memcpy function in L1 Memory" 602 default y 603 help 604 If enabled, the memcpy function is linked 605 into L1 instruction memory. (less latency) 606 607config SYS_BFIN_SPINLOCK_L1 608 bool "Locate sys_bfin_spinlock function in L1 Memory" 609 default y 610 help 611 If enabled, sys_bfin_spinlock function is linked 612 into L1 instruction memory. (less latency) 613 614config IP_CHECKSUM_L1 615 bool "Locate IP Checksum function in L1 Memory" 616 default n 617 help 618 If enabled, the IP Checksum function is linked 619 into L1 instruction memory. (less latency) 620 621config CACHELINE_ALIGNED_L1 622 bool "Locate cacheline_aligned data to L1 Data Memory" 623 default y if !BF54x 624 default n if BF54x 625 depends on !BF531 626 help 627 If enabled, cacheline_anligned data is linked 628 into L1 data memory. (less latency) 629 630config SYSCALL_TAB_L1 631 bool "Locate Syscall Table L1 Data Memory" 632 default n 633 depends on !BF531 634 help 635 If enabled, the Syscall LUT is linked 636 into L1 data memory. (less latency) 637 638config CPLB_SWITCH_TAB_L1 639 bool "Locate CPLB Switch Tables L1 Data Memory" 640 default n 641 depends on !BF531 642 help 643 If enabled, the CPLB Switch Tables are linked 644 into L1 data memory. (less latency) 645 646endmenu 647 648 649choice 650 prompt "Kernel executes from" 651 help 652 Choose the memory type that the kernel will be running in. 653 654config RAMKERNEL 655 bool "RAM" 656 help 657 The kernel will be resident in RAM when running. 658 659config ROMKERNEL 660 bool "ROM" 661 help 662 The kernel will be resident in FLASH/ROM when running. 663 664endchoice 665 666source "mm/Kconfig" 667 668config LARGE_ALLOCS 669 bool "Allow allocating large blocks (> 1MB) of memory" 670 help 671 Allow the slab memory allocator to keep chains for very large 672 memory sizes - upto 32MB. You may need this if your system has 673 a lot of RAM, and you need to able to allocate very large 674 contiguous chunks. If unsure, say N. 675 676config BFIN_GPTIMERS 677 tristate "Enable Blackfin General Purpose Timers API" 678 default n 679 help 680 Enable support for the General Purpose Timers API. If you 681 are unsure, say N. 682 683 To compile this driver as a module, choose M here: the module 684 will be called gptimers.ko. 685 686config BFIN_DMA_5XX 687 bool "Enable DMA Support" 688 depends on (BF52x || BF53x || BF561 || BF54x) 689 default y 690 help 691 DMA driver for BF5xx. 692 693choice 694 prompt "Uncached SDRAM region" 695 default DMA_UNCACHED_1M 696 depends on BFIN_DMA_5XX 697config DMA_UNCACHED_2M 698 bool "Enable 2M DMA region" 699config DMA_UNCACHED_1M 700 bool "Enable 1M DMA region" 701config DMA_UNCACHED_NONE 702 bool "Disable DMA region" 703endchoice 704 705 706comment "Cache Support" 707config BFIN_ICACHE 708 bool "Enable ICACHE" 709config BFIN_DCACHE 710 bool "Enable DCACHE" 711config BFIN_DCACHE_BANKA 712 bool "Enable only 16k BankA DCACHE - BankB is SRAM" 713 depends on BFIN_DCACHE && !BF531 714 default n 715config BFIN_ICACHE_LOCK 716 bool "Enable Instruction Cache Locking" 717 718choice 719 prompt "Policy" 720 depends on BFIN_DCACHE 721 default BFIN_WB 722config BFIN_WB 723 bool "Write back" 724 help 725 Write Back Policy: 726 Cached data will be written back to SDRAM only when needed. 727 This can give a nice increase in performance, but beware of 728 broken drivers that do not properly invalidate/flush their 729 cache. 730 731 Write Through Policy: 732 Cached data will always be written back to SDRAM when the 733 cache is updated. This is a completely safe setting, but 734 performance is worse than Write Back. 735 736 If you are unsure of the options and you want to be safe, 737 then go with Write Through. 738 739config BFIN_WT 740 bool "Write through" 741 help 742 Write Back Policy: 743 Cached data will be written back to SDRAM only when needed. 744 This can give a nice increase in performance, but beware of 745 broken drivers that do not properly invalidate/flush their 746 cache. 747 748 Write Through Policy: 749 Cached data will always be written back to SDRAM when the 750 cache is updated. This is a completely safe setting, but 751 performance is worse than Write Back. 752 753 If you are unsure of the options and you want to be safe, 754 then go with Write Through. 755 756endchoice 757 758config L1_MAX_PIECE 759 int "Set the max L1 SRAM pieces" 760 default 16 761 help 762 Set the max memory pieces for the L1 SRAM allocation algorithm. 763 Min value is 16. Max value is 1024. 764 765 766config MPU 767 bool "Enable the memory protection unit (EXPERIMENTAL)" 768 default n 769 help 770 Use the processor's MPU to protect applications from accessing 771 memory they do not own. This comes at a performance penalty 772 and is recommended only for debugging. 773 774comment "Asynchonous Memory Configuration" 775 776menu "EBIU_AMGCTL Global Control" 777config C_AMCKEN 778 bool "Enable CLKOUT" 779 default y 780 781config C_CDPRIO 782 bool "DMA has priority over core for ext. accesses" 783 default n 784 785config C_B0PEN 786 depends on BF561 787 bool "Bank 0 16 bit packing enable" 788 default y 789 790config C_B1PEN 791 depends on BF561 792 bool "Bank 1 16 bit packing enable" 793 default y 794 795config C_B2PEN 796 depends on BF561 797 bool "Bank 2 16 bit packing enable" 798 default y 799 800config C_B3PEN 801 depends on BF561 802 bool "Bank 3 16 bit packing enable" 803 default n 804 805choice 806 prompt"Enable Asynchonous Memory Banks" 807 default C_AMBEN_ALL 808 809config C_AMBEN 810 bool "Disable All Banks" 811 812config C_AMBEN_B0 813 bool "Enable Bank 0" 814 815config C_AMBEN_B0_B1 816 bool "Enable Bank 0 & 1" 817 818config C_AMBEN_B0_B1_B2 819 bool "Enable Bank 0 & 1 & 2" 820 821config C_AMBEN_ALL 822 bool "Enable All Banks" 823endchoice 824endmenu 825 826menu "EBIU_AMBCTL Control" 827config BANK_0 828 hex "Bank 0" 829 default 0x7BB0 830 831config BANK_1 832 hex "Bank 1" 833 default 0x7BB0 834 835config BANK_2 836 hex "Bank 2" 837 default 0x7BB0 838 839config BANK_3 840 hex "Bank 3" 841 default 0x99B3 842endmenu 843 844config EBIU_MBSCTLVAL 845 hex "EBIU Bank Select Control Register" 846 depends on BF54x 847 default 0 848 849config EBIU_MODEVAL 850 hex "Flash Memory Mode Control Register" 851 depends on BF54x 852 default 1 853 854config EBIU_FCTLVAL 855 hex "Flash Memory Bank Control Register" 856 depends on BF54x 857 default 6 858endmenu 859 860############################################################################# 861menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)" 862 863config PCI 864 bool "PCI support" 865 help 866 Support for PCI bus. 867 868source "drivers/pci/Kconfig" 869 870config HOTPLUG 871 bool "Support for hot-pluggable device" 872 help 873 Say Y here if you want to plug devices into your computer while 874 the system is running, and be able to use them quickly. In many 875 cases, the devices can likewise be unplugged at any time too. 876 877 One well known example of this is PCMCIA- or PC-cards, credit-card 878 size devices such as network cards, modems or hard drives which are 879 plugged into slots found on all modern laptop computers. Another 880 example, used on modern desktops as well as laptops, is USB. 881 882 Enable HOTPLUG and KMOD, and build a modular kernel. Get agent 883 software (at <http://linux-hotplug.sourceforge.net/>) and install it. 884 Then your kernel will automatically call out to a user mode "policy 885 agent" (/sbin/hotplug) to load modules and set up software needed 886 to use devices as you hotplug them. 887 888source "drivers/pcmcia/Kconfig" 889 890source "drivers/pci/hotplug/Kconfig" 891 892endmenu 893 894menu "Executable file formats" 895 896source "fs/Kconfig.binfmt" 897 898endmenu 899 900menu "Power management options" 901source "kernel/power/Kconfig" 902 903config ARCH_SUSPEND_POSSIBLE 904 def_bool y 905 depends on !SMP 906 907choice 908 prompt "Default Power Saving Mode" 909 depends on PM 910 default PM_BFIN_SLEEP_DEEPER 911config PM_BFIN_SLEEP_DEEPER 912 bool "Sleep Deeper" 913 help 914 Sleep "Deeper" Mode (High Power Savings) - This mode reduces dynamic 915 power dissipation by disabling the clock to the processor core (CCLK). 916 Furthermore, Standby sets the internal power supply voltage (VDDINT) 917 to 0.85 V to provide the greatest power savings, while preserving the 918 processor state. 919 The PLL and system clock (SCLK) continue to operate at a very low 920 frequency of about 3.3 MHz. To preserve data integrity in the SDRAM, 921 the SDRAM is put into Self Refresh Mode. Typically an external event 922 such as GPIO interrupt or RTC activity wakes up the processor. 923 Various Peripherals such as UART, SPORT, PPI may not function as 924 normal during Sleep Deeper, due to the reduced SCLK frequency. 925 When in the sleep mode, system DMA access to L1 memory is not supported. 926 927config PM_BFIN_SLEEP 928 bool "Sleep" 929 help 930 Sleep Mode (High Power Savings) - The sleep mode reduces power 931 dissipation by disabling the clock to the processor core (CCLK). 932 The PLL and system clock (SCLK), however, continue to operate in 933 this mode. Typically an external event or RTC activity will wake 934 up the processor. When in the sleep mode, 935 system DMA access to L1 memory is not supported. 936endchoice 937 938config PM_WAKEUP_BY_GPIO 939 bool "Cause Wakeup Event by GPIO" 940 941config PM_WAKEUP_GPIO_NUMBER 942 int "Wakeup GPIO number" 943 range 0 47 944 depends on PM_WAKEUP_BY_GPIO 945 default 2 if BFIN537_STAMP 946 947choice 948 prompt "GPIO Polarity" 949 depends on PM_WAKEUP_BY_GPIO 950 default PM_WAKEUP_GPIO_POLAR_H 951config PM_WAKEUP_GPIO_POLAR_H 952 bool "Active High" 953config PM_WAKEUP_GPIO_POLAR_L 954 bool "Active Low" 955config PM_WAKEUP_GPIO_POLAR_EDGE_F 956 bool "Falling EDGE" 957config PM_WAKEUP_GPIO_POLAR_EDGE_R 958 bool "Rising EDGE" 959config PM_WAKEUP_GPIO_POLAR_EDGE_B 960 bool "Both EDGE" 961endchoice 962 963endmenu 964 965if (BF537 || BF533 || BF54x) 966 967menu "CPU Frequency scaling" 968 969source "drivers/cpufreq/Kconfig" 970 971config CPU_FREQ 972 bool 973 default n 974 help 975 If you want to enable this option, you should select the 976 DPMC driver from Character Devices. 977endmenu 978 979endif 980 981source "net/Kconfig" 982 983source "drivers/Kconfig" 984 985source "fs/Kconfig" 986 987source "arch/blackfin/Kconfig.debug" 988 989source "security/Kconfig" 990 991source "crypto/Kconfig" 992 993source "lib/Kconfig" 994