linux/drivers/ide/pci/via82cxxx.c
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   1/*
   2 *
   3 * Version 3.50
   4 *
   5 * VIA IDE driver for Linux. Supported southbridges:
   6 *
   7 *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
   8 *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
   9 *   vt8235, vt8237, vt8237a
  10 *
  11 * Copyright (c) 2000-2002 Vojtech Pavlik
  12 * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
  13 *
  14 * Based on the work of:
  15 *      Michel Aubry
  16 *      Jeff Garzik
  17 *      Andre Hedrick
  18 *
  19 * Documentation:
  20 *      Obsolete device documentation publically available from via.com.tw
  21 *      Current device documentation available under NDA only
  22 */
  23
  24/*
  25 * This program is free software; you can redistribute it and/or modify it
  26 * under the terms of the GNU General Public License version 2 as published by
  27 * the Free Software Foundation.
  28 */
  29
  30#include <linux/module.h>
  31#include <linux/kernel.h>
  32#include <linux/ioport.h>
  33#include <linux/blkdev.h>
  34#include <linux/pci.h>
  35#include <linux/init.h>
  36#include <linux/ide.h>
  37#include <linux/dmi.h>
  38
  39#include <asm/io.h>
  40
  41#ifdef CONFIG_PPC_CHRP
  42#include <asm/processor.h>
  43#endif
  44
  45#include "ide-timing.h"
  46
  47#define VIA_IDE_ENABLE          0x40
  48#define VIA_IDE_CONFIG          0x41
  49#define VIA_FIFO_CONFIG         0x43
  50#define VIA_MISC_1              0x44
  51#define VIA_MISC_2              0x45
  52#define VIA_MISC_3              0x46
  53#define VIA_DRIVE_TIMING        0x48
  54#define VIA_8BIT_TIMING         0x4e
  55#define VIA_ADDRESS_SETUP       0x4c
  56#define VIA_UDMA_TIMING         0x50
  57
  58#define VIA_BAD_PREQ            0x01 /* Crashes if PREQ# till DDACK# set */
  59#define VIA_BAD_CLK66           0x02 /* 66 MHz clock doesn't work correctly */
  60#define VIA_SET_FIFO            0x04 /* Needs to have FIFO split set */
  61#define VIA_NO_UNMASK           0x08 /* Doesn't work with IRQ unmasking on */
  62#define VIA_BAD_ID              0x10 /* Has wrong vendor ID (0x1107) */
  63#define VIA_BAD_AST             0x20 /* Don't touch Address Setup Timing */
  64
  65/*
  66 * VIA SouthBridge chips.
  67 */
  68
  69static struct via_isa_bridge {
  70        char *name;
  71        u16 id;
  72        u8 rev_min;
  73        u8 rev_max;
  74        u8 udma_mask;
  75        u8 flags;
  76} via_isa_bridges[] = {
  77        { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  78        { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  79        { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  80        { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  81        { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  82        { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  83        { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  84        { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  85        { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  86        { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
  87        { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
  88        { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
  89        { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
  90        { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
  91        { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  92        { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
  93        { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  94        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
  95        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
  96        { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
  97        { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
  98        { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
  99        { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
 100        { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 101        { NULL }
 102};
 103
 104static unsigned int via_clock;
 105static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
 106
 107struct via82cxxx_dev
 108{
 109        struct via_isa_bridge *via_config;
 110        unsigned int via_80w;
 111};
 112
 113/**
 114 *      via_set_speed                   -       write timing registers
 115 *      @dev: PCI device
 116 *      @dn: device
 117 *      @timing: IDE timing data to use
 118 *
 119 *      via_set_speed writes timing values to the chipset registers
 120 */
 121
 122static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
 123{
 124        struct pci_dev *dev = hwif->pci_dev;
 125        struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
 126        u8 t;
 127
 128        if (~vdev->via_config->flags & VIA_BAD_AST) {
 129                pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
 130                t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
 131                pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
 132        }
 133
 134        pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
 135                ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
 136
 137        pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
 138                ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
 139
 140        switch (vdev->via_config->udma_mask) {
 141        case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
 142        case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
 143        case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
 144        case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
 145        default: return;
 146        }
 147
 148        pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
 149}
 150
 151/**
 152 *      via_set_drive           -       configure transfer mode
 153 *      @drive: Drive to set up
 154 *      @speed: desired speed
 155 *
 156 *      via_set_drive() computes timing values configures the chipset to
 157 *      a desired transfer mode.  It also can be called by upper layers.
 158 */
 159
 160static void via_set_drive(ide_drive_t *drive, const u8 speed)
 161{
 162        ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
 163        struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
 164        struct ide_timing t, p;
 165        unsigned int T, UT;
 166
 167        T = 1000000000 / via_clock;
 168
 169        switch (vdev->via_config->udma_mask) {
 170        case ATA_UDMA2: UT = T;   break;
 171        case ATA_UDMA4: UT = T/2; break;
 172        case ATA_UDMA5: UT = T/3; break;
 173        case ATA_UDMA6: UT = T/4; break;
 174        default:        UT = T;
 175        }
 176
 177        ide_timing_compute(drive, speed, &t, T, UT);
 178
 179        if (peer->present) {
 180                ide_timing_compute(peer, peer->current_speed, &p, T, UT);
 181                ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
 182        }
 183
 184        via_set_speed(HWIF(drive), drive->dn, &t);
 185}
 186
 187/**
 188 *      via_set_pio_mode        -       set host controller for PIO mode
 189 *      @drive: drive
 190 *      @pio: PIO mode number
 191 *
 192 *      A callback from the upper layers for PIO-only tuning.
 193 */
 194
 195static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
 196{
 197        via_set_drive(drive, XFER_PIO_0 + pio);
 198}
 199
 200static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
 201{
 202        struct via_isa_bridge *via_config;
 203
 204        for (via_config = via_isa_bridges; via_config->id; via_config++)
 205                if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
 206                        !!(via_config->flags & VIA_BAD_ID),
 207                        via_config->id, NULL))) {
 208
 209                        if ((*isa)->revision >= via_config->rev_min &&
 210                            (*isa)->revision <= via_config->rev_max)
 211                                break;
 212                        pci_dev_put(*isa);
 213                }
 214
 215        return via_config;
 216}
 217
 218/*
 219 * Check and handle 80-wire cable presence
 220 */
 221static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
 222{
 223        int i;
 224
 225        switch (vdev->via_config->udma_mask) {
 226                case ATA_UDMA4:
 227                        for (i = 24; i >= 0; i -= 8)
 228                                if (((u >> (i & 16)) & 8) &&
 229                                    ((u >> i) & 0x20) &&
 230                                     (((u >> i) & 7) < 2)) {
 231                                        /*
 232                                         * 2x PCI clock and
 233                                         * UDMA w/ < 3T/cycle
 234                                         */
 235                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
 236                                }
 237                        break;
 238
 239                case ATA_UDMA5:
 240                        for (i = 24; i >= 0; i -= 8)
 241                                if (((u >> i) & 0x10) ||
 242                                    (((u >> i) & 0x20) &&
 243                                     (((u >> i) & 7) < 4))) {
 244                                        /* BIOS 80-wire bit or
 245                                         * UDMA w/ < 60ns/cycle
 246                                         */
 247                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
 248                                }
 249                        break;
 250
 251                case ATA_UDMA6:
 252                        for (i = 24; i >= 0; i -= 8)
 253                                if (((u >> i) & 0x10) ||
 254                                    (((u >> i) & 0x20) &&
 255                                     (((u >> i) & 7) < 6))) {
 256                                        /* BIOS 80-wire bit or
 257                                         * UDMA w/ < 60ns/cycle
 258                                         */
 259                                        vdev->via_80w |= (1 << (1 - (i >> 4)));
 260                                }
 261                        break;
 262        }
 263}
 264
 265/**
 266 *      init_chipset_via82cxxx  -       initialization handler
 267 *      @dev: PCI device
 268 *      @name: Name of interface
 269 *
 270 *      The initialization callback. Here we determine the IDE chip type
 271 *      and initialize its drive independent registers.
 272 */
 273
 274static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
 275{
 276        struct pci_dev *isa = NULL;
 277        struct via82cxxx_dev *vdev;
 278        struct via_isa_bridge *via_config;
 279        u8 t, v;
 280        u32 u;
 281
 282        vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
 283        if (!vdev) {
 284                printk(KERN_ERR "VP_IDE: out of memory :(\n");
 285                return -ENOMEM;
 286        }
 287        pci_set_drvdata(dev, vdev);
 288
 289        /*
 290         * Find the ISA bridge to see how good the IDE is.
 291         */
 292        vdev->via_config = via_config = via_config_find(&isa);
 293
 294        /* We checked this earlier so if it fails here deeep badness
 295           is involved */
 296
 297        BUG_ON(!via_config->id);
 298
 299        /*
 300         * Detect cable and configure Clk66
 301         */
 302        pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
 303
 304        via_cable_detect(vdev, u);
 305
 306        if (via_config->udma_mask == ATA_UDMA4) {
 307                /* Enable Clk66 */
 308                pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
 309        } else if (via_config->flags & VIA_BAD_CLK66) {
 310                /* Would cause trouble on 596a and 686 */
 311                pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
 312        }
 313
 314        /*
 315         * Check whether interfaces are enabled.
 316         */
 317
 318        pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
 319
 320        /*
 321         * Set up FIFO sizes and thresholds.
 322         */
 323
 324        pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
 325
 326        /* Disable PREQ# till DDACK# */
 327        if (via_config->flags & VIA_BAD_PREQ) {
 328                /* Would crash on 586b rev 41 */
 329                t &= 0x7f;
 330        }
 331
 332        /* Fix FIFO split between channels */
 333        if (via_config->flags & VIA_SET_FIFO) {
 334                t &= (t & 0x9f);
 335                switch (v & 3) {
 336                        case 2: t |= 0x00; break;       /* 16 on primary */
 337                        case 1: t |= 0x60; break;       /* 16 on secondary */
 338                        case 3: t |= 0x20; break;       /* 8 pri 8 sec */
 339                }
 340        }
 341
 342        pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
 343
 344        /*
 345         * Determine system bus clock.
 346         */
 347
 348        via_clock = system_bus_clock() * 1000;
 349
 350        switch (via_clock) {
 351                case 33000: via_clock = 33333; break;
 352                case 37000: via_clock = 37500; break;
 353                case 41000: via_clock = 41666; break;
 354        }
 355
 356        if (via_clock < 20000 || via_clock > 50000) {
 357                printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
 358                        "impossible (%d), using 33 MHz instead.\n", via_clock);
 359                printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
 360                        "to assume 80-wire cable.\n");
 361                via_clock = 33333;
 362        }
 363
 364        /*
 365         * Print the boot message.
 366         */
 367
 368        printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
 369                "controller on pci%s\n",
 370                via_config->name, isa->revision,
 371                via_config->udma_mask ? "U" : "MW",
 372                via_dma[via_config->udma_mask ?
 373                        (fls(via_config->udma_mask) - 1) : 0],
 374                pci_name(dev));
 375
 376        pci_dev_put(isa);
 377        return 0;
 378}
 379
 380/*
 381 *      Cable special cases
 382 */
 383
 384static const struct dmi_system_id cable_dmi_table[] = {
 385        {
 386                .ident = "Acer Ferrari 3400",
 387                .matches = {
 388                        DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
 389                        DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
 390                },
 391        },
 392        { }
 393};
 394
 395static int via_cable_override(struct pci_dev *pdev)
 396{
 397        /* Systems by DMI */
 398        if (dmi_check_system(cable_dmi_table))
 399                return 1;
 400
 401        /* Arima W730-K8/Targa Visionary 811/... */
 402        if (pdev->subsystem_vendor == 0x161F &&
 403            pdev->subsystem_device == 0x2032)
 404                return 1;
 405
 406        return 0;
 407}
 408
 409static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
 410{
 411        struct pci_dev *pdev = hwif->pci_dev;
 412        struct via82cxxx_dev *vdev = pci_get_drvdata(pdev);
 413
 414        if (via_cable_override(pdev))
 415                return ATA_CBL_PATA40_SHORT;
 416
 417        if ((vdev->via_80w >> hwif->channel) & 1)
 418                return ATA_CBL_PATA80;
 419        else
 420                return ATA_CBL_PATA40;
 421}
 422
 423static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
 424{
 425        hwif->set_pio_mode = &via_set_pio_mode;
 426        hwif->set_dma_mode = &via_set_drive;
 427
 428        if (!hwif->dma_base)
 429                return;
 430
 431        if (hwif->cbl != ATA_CBL_PATA40_SHORT)
 432                hwif->cbl = via82cxxx_cable_detect(hwif);
 433}
 434
 435static const struct ide_port_info via82cxxx_chipset __devinitdata = {
 436        .name           = "VP_IDE",
 437        .init_chipset   = init_chipset_via82cxxx,
 438        .init_hwif      = init_hwif_via82cxxx,
 439        .enablebits     = { { 0x40, 0x02, 0x02 }, { 0x40, 0x01, 0x01 } },
 440        .host_flags     = IDE_HFLAG_PIO_NO_BLACKLIST |
 441                          IDE_HFLAG_PIO_NO_DOWNGRADE |
 442                          IDE_HFLAG_POST_SET_MODE |
 443                          IDE_HFLAG_IO_32BIT |
 444                          IDE_HFLAG_BOOTABLE,
 445        .pio_mask       = ATA_PIO5,
 446        .swdma_mask     = ATA_SWDMA2,
 447        .mwdma_mask     = ATA_MWDMA2,
 448};
 449
 450static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 451{
 452        struct pci_dev *isa = NULL;
 453        struct via_isa_bridge *via_config;
 454        u8 idx = id->driver_data;
 455        struct ide_port_info d;
 456
 457        d = via82cxxx_chipset;
 458
 459        /*
 460         * Find the ISA bridge and check we know what it is.
 461         */
 462        via_config = via_config_find(&isa);
 463        pci_dev_put(isa);
 464        if (!via_config->id) {
 465                printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
 466                return -ENODEV;
 467        }
 468
 469        if (idx == 0)
 470                d.host_flags |= IDE_HFLAG_NO_AUTODMA;
 471        else
 472                d.enablebits[1].reg = d.enablebits[0].reg = 0;
 473
 474        if ((via_config->flags & VIA_NO_UNMASK) == 0)
 475                d.host_flags |= IDE_HFLAG_UNMASK_IRQS;
 476
 477#ifdef CONFIG_PPC_CHRP
 478        if (machine_is(chrp) && _chrp_type == _CHRP_Pegasos)
 479                d.host_flags |= IDE_HFLAG_FORCE_LEGACY_IRQS;
 480#endif
 481
 482        d.udma_mask = via_config->udma_mask;
 483
 484        return ide_setup_pci_device(dev, &d);
 485}
 486
 487static const struct pci_device_id via_pci_tbl[] = {
 488        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C576_1),  0 },
 489        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_82C586_1),  0 },
 490        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_6410),      1 },
 491        { PCI_VDEVICE(VIA, PCI_DEVICE_ID_VIA_SATA_EIDE), 1 },
 492        { 0, },
 493};
 494MODULE_DEVICE_TABLE(pci, via_pci_tbl);
 495
 496static struct pci_driver driver = {
 497        .name           = "VIA_IDE",
 498        .id_table       = via_pci_tbl,
 499        .probe          = via_init_one,
 500};
 501
 502static int __init via_ide_init(void)
 503{
 504        return ide_pci_register_driver(&driver);
 505}
 506
 507module_init(via_ide_init);
 508
 509MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
 510MODULE_DESCRIPTION("PCI driver module for VIA IDE");
 511MODULE_LICENSE("GPL");
 512
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