1
2
3
4
5
6
7
8
9
10
11
12
13#ifndef _XTENSA_ATOMIC_H
14#define _XTENSA_ATOMIC_H
15
16#include <linux/stringify.h>
17
18typedef struct { volatile int counter; } atomic_t;
19
20#ifdef __KERNEL__
21#include <asm/processor.h>
22#include <asm/system.h>
23
24#define ATOMIC_INIT(i) { (i) }
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50#define atomic_read(v) ((v)->counter)
51
52
53
54
55
56
57
58
59#define atomic_set(v,i) ((v)->counter = (i))
60
61
62
63
64
65
66
67
68static inline void atomic_add(int i, atomic_t * v)
69{
70 unsigned int vval;
71
72 __asm__ __volatile__(
73 "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
74 "l32i %0, %2, 0 \n\t"
75 "add %0, %0, %1 \n\t"
76 "s32i %0, %2, 0 \n\t"
77 "wsr a15, "__stringify(PS)" \n\t"
78 "rsync \n"
79 : "=&a" (vval)
80 : "a" (i), "a" (v)
81 : "a15", "memory"
82 );
83}
84
85
86
87
88
89
90
91
92static inline void atomic_sub(int i, atomic_t *v)
93{
94 unsigned int vval;
95
96 __asm__ __volatile__(
97 "rsil a15, "__stringify(LOCKLEVEL)"\n\t"
98 "l32i %0, %2, 0 \n\t"
99 "sub %0, %0, %1 \n\t"
100 "s32i %0, %2, 0 \n\t"
101 "wsr a15, "__stringify(PS)" \n\t"
102 "rsync \n"
103 : "=&a" (vval)
104 : "a" (i), "a" (v)
105 : "a15", "memory"
106 );
107}
108
109
110
111
112
113static inline int atomic_add_return(int i, atomic_t * v)
114{
115 unsigned int vval;
116
117 __asm__ __volatile__(
118 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
119 "l32i %0, %2, 0 \n\t"
120 "add %0, %0, %1 \n\t"
121 "s32i %0, %2, 0 \n\t"
122 "wsr a15, "__stringify(PS)" \n\t"
123 "rsync \n"
124 : "=&a" (vval)
125 : "a" (i), "a" (v)
126 : "a15", "memory"
127 );
128
129 return vval;
130}
131
132static inline int atomic_sub_return(int i, atomic_t * v)
133{
134 unsigned int vval;
135
136 __asm__ __volatile__(
137 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
138 "l32i %0, %2, 0 \n\t"
139 "sub %0, %0, %1 \n\t"
140 "s32i %0, %2, 0 \n\t"
141 "wsr a15, "__stringify(PS)" \n\t"
142 "rsync \n"
143 : "=&a" (vval)
144 : "a" (i), "a" (v)
145 : "a15", "memory"
146 );
147
148 return vval;
149}
150
151
152
153
154
155
156
157
158
159
160#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
161
162
163
164
165
166
167
168#define atomic_inc(v) atomic_add(1,(v))
169
170
171
172
173
174
175
176#define atomic_inc_return(v) atomic_add_return(1,(v))
177
178
179
180
181
182
183
184#define atomic_dec(v) atomic_sub(1,(v))
185
186
187
188
189
190
191
192#define atomic_dec_return(v) atomic_sub_return(1,(v))
193
194
195
196
197
198
199
200
201
202#define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0)
203
204
205
206
207
208
209
210
211
212#define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0)
213
214
215
216
217
218
219
220
221
222
223#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
224
225#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
226#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
227
228
229
230
231
232
233
234
235
236
237#define atomic_add_unless(v, a, u) \
238({ \
239 int c, old; \
240 c = atomic_read(v); \
241 while (c != (u) && (old = atomic_cmpxchg((v), c, c + (a))) != c) \
242 c = old; \
243 c != (u); \
244})
245#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
246
247static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
248{
249 unsigned int all_f = -1;
250 unsigned int vval;
251
252 __asm__ __volatile__(
253 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
254 "l32i %0, %2, 0 \n\t"
255 "xor %1, %4, %3 \n\t"
256 "and %0, %0, %4 \n\t"
257 "s32i %0, %2, 0 \n\t"
258 "wsr a15, "__stringify(PS)" \n\t"
259 "rsync \n"
260 : "=&a" (vval), "=a" (mask)
261 : "a" (v), "a" (all_f), "1" (mask)
262 : "a15", "memory"
263 );
264}
265
266static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
267{
268 unsigned int vval;
269
270 __asm__ __volatile__(
271 "rsil a15,"__stringify(LOCKLEVEL)"\n\t"
272 "l32i %0, %2, 0 \n\t"
273 "or %0, %0, %1 \n\t"
274 "s32i %0, %2, 0 \n\t"
275 "wsr a15, "__stringify(PS)" \n\t"
276 "rsync \n"
277 : "=&a" (vval)
278 : "a" (mask), "a" (v)
279 : "a15", "memory"
280 );
281}
282
283
284#define smp_mb__before_atomic_dec() barrier()
285#define smp_mb__after_atomic_dec() barrier()
286#define smp_mb__before_atomic_inc() barrier()
287#define smp_mb__after_atomic_inc() barrier()
288
289#include <asm-generic/atomic.h>
290#endif
291
292#endif
293
294