1#ifndef __ARCH_X86_64_ATOMIC__
2#define __ARCH_X86_64_ATOMIC__
3
4#include <asm/alternative.h>
5
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11
12
13#ifdef CONFIG_SMP
14#define LOCK "lock ; "
15#else
16#define LOCK ""
17#endif
18
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21
22
23
24typedef struct { volatile int counter; } atomic_t;
25
26#define ATOMIC_INIT(i) { (i) }
27
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32
33
34#define atomic_read(v) ((v)->counter)
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41
42
43#define atomic_set(v,i) (((v)->counter) = (i))
44
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51
52static __inline__ void atomic_add(int i, atomic_t *v)
53{
54 __asm__ __volatile__(
55 LOCK_PREFIX "addl %1,%0"
56 :"=m" (v->counter)
57 :"ir" (i), "m" (v->counter));
58}
59
60
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64
65
66
67static __inline__ void atomic_sub(int i, atomic_t *v)
68{
69 __asm__ __volatile__(
70 LOCK_PREFIX "subl %1,%0"
71 :"=m" (v->counter)
72 :"ir" (i), "m" (v->counter));
73}
74
75
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82
83
84static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
85{
86 unsigned char c;
87
88 __asm__ __volatile__(
89 LOCK_PREFIX "subl %2,%0; sete %1"
90 :"=m" (v->counter), "=qm" (c)
91 :"ir" (i), "m" (v->counter) : "memory");
92 return c;
93}
94
95
96
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98
99
100
101static __inline__ void atomic_inc(atomic_t *v)
102{
103 __asm__ __volatile__(
104 LOCK_PREFIX "incl %0"
105 :"=m" (v->counter)
106 :"m" (v->counter));
107}
108
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112
113
114
115static __inline__ void atomic_dec(atomic_t *v)
116{
117 __asm__ __volatile__(
118 LOCK_PREFIX "decl %0"
119 :"=m" (v->counter)
120 :"m" (v->counter));
121}
122
123
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128
129
130
131static __inline__ int atomic_dec_and_test(atomic_t *v)
132{
133 unsigned char c;
134
135 __asm__ __volatile__(
136 LOCK_PREFIX "decl %0; sete %1"
137 :"=m" (v->counter), "=qm" (c)
138 :"m" (v->counter) : "memory");
139 return c != 0;
140}
141
142
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147
148
149
150static __inline__ int atomic_inc_and_test(atomic_t *v)
151{
152 unsigned char c;
153
154 __asm__ __volatile__(
155 LOCK_PREFIX "incl %0; sete %1"
156 :"=m" (v->counter), "=qm" (c)
157 :"m" (v->counter) : "memory");
158 return c != 0;
159}
160
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168
169
170static __inline__ int atomic_add_negative(int i, atomic_t *v)
171{
172 unsigned char c;
173
174 __asm__ __volatile__(
175 LOCK_PREFIX "addl %2,%0; sets %1"
176 :"=m" (v->counter), "=qm" (c)
177 :"ir" (i), "m" (v->counter) : "memory");
178 return c;
179}
180
181
182
183
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185
186
187
188static __inline__ int atomic_add_return(int i, atomic_t *v)
189{
190 int __i = i;
191 __asm__ __volatile__(
192 LOCK_PREFIX "xaddl %0, %1;"
193 :"=r"(i)
194 :"m"(v->counter), "0"(i));
195 return i + __i;
196}
197
198static __inline__ int atomic_sub_return(int i, atomic_t *v)
199{
200 return atomic_add_return(-i,v);
201}
202
203#define atomic_inc_return(v) (atomic_add_return(1,v))
204#define atomic_dec_return(v) (atomic_sub_return(1,v))
205
206
207
208typedef struct { volatile long counter; } atomic64_t;
209
210#define ATOMIC64_INIT(i) { (i) }
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217
218
219#define atomic64_read(v) ((v)->counter)
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226
227
228#define atomic64_set(v,i) (((v)->counter) = (i))
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236
237static __inline__ void atomic64_add(long i, atomic64_t *v)
238{
239 __asm__ __volatile__(
240 LOCK_PREFIX "addq %1,%0"
241 :"=m" (v->counter)
242 :"ir" (i), "m" (v->counter));
243}
244
245
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250
251
252static __inline__ void atomic64_sub(long i, atomic64_t *v)
253{
254 __asm__ __volatile__(
255 LOCK_PREFIX "subq %1,%0"
256 :"=m" (v->counter)
257 :"ir" (i), "m" (v->counter));
258}
259
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267
268
269static __inline__ int atomic64_sub_and_test(long i, atomic64_t *v)
270{
271 unsigned char c;
272
273 __asm__ __volatile__(
274 LOCK_PREFIX "subq %2,%0; sete %1"
275 :"=m" (v->counter), "=qm" (c)
276 :"ir" (i), "m" (v->counter) : "memory");
277 return c;
278}
279
280
281
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283
284
285
286static __inline__ void atomic64_inc(atomic64_t *v)
287{
288 __asm__ __volatile__(
289 LOCK_PREFIX "incq %0"
290 :"=m" (v->counter)
291 :"m" (v->counter));
292}
293
294
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297
298
299
300static __inline__ void atomic64_dec(atomic64_t *v)
301{
302 __asm__ __volatile__(
303 LOCK_PREFIX "decq %0"
304 :"=m" (v->counter)
305 :"m" (v->counter));
306}
307
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311
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314
315
316static __inline__ int atomic64_dec_and_test(atomic64_t *v)
317{
318 unsigned char c;
319
320 __asm__ __volatile__(
321 LOCK_PREFIX "decq %0; sete %1"
322 :"=m" (v->counter), "=qm" (c)
323 :"m" (v->counter) : "memory");
324 return c != 0;
325}
326
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330
331
332
333
334
335static __inline__ int atomic64_inc_and_test(atomic64_t *v)
336{
337 unsigned char c;
338
339 __asm__ __volatile__(
340 LOCK_PREFIX "incq %0; sete %1"
341 :"=m" (v->counter), "=qm" (c)
342 :"m" (v->counter) : "memory");
343 return c != 0;
344}
345
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353
354
355static __inline__ int atomic64_add_negative(long i, atomic64_t *v)
356{
357 unsigned char c;
358
359 __asm__ __volatile__(
360 LOCK_PREFIX "addq %2,%0; sets %1"
361 :"=m" (v->counter), "=qm" (c)
362 :"ir" (i), "m" (v->counter) : "memory");
363 return c;
364}
365
366
367
368
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370
371
372
373static __inline__ long atomic64_add_return(long i, atomic64_t *v)
374{
375 long __i = i;
376 __asm__ __volatile__(
377 LOCK_PREFIX "xaddq %0, %1;"
378 :"=r"(i)
379 :"m"(v->counter), "0"(i));
380 return i + __i;
381}
382
383static __inline__ long atomic64_sub_return(long i, atomic64_t *v)
384{
385 return atomic64_add_return(-i,v);
386}
387
388#define atomic64_inc_return(v) (atomic64_add_return(1,v))
389#define atomic64_dec_return(v) (atomic64_sub_return(1,v))
390
391#define atomic_cmpxchg(v, old, new) ((int)cmpxchg(&((v)->counter), old, new))
392#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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401
402
403#define atomic_add_unless(v, a, u) \
404({ \
405 int c, old; \
406 c = atomic_read(v); \
407 for (;;) { \
408 if (unlikely(c == (u))) \
409 break; \
410 old = atomic_cmpxchg((v), c, c + (a)); \
411 if (likely(old == c)) \
412 break; \
413 c = old; \
414 } \
415 c != (u); \
416})
417#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
418
419
420#define atomic_clear_mask(mask, addr) \
421__asm__ __volatile__(LOCK_PREFIX "andl %0,%1" \
422: : "r" (~(mask)),"m" (*addr) : "memory")
423
424#define atomic_set_mask(mask, addr) \
425__asm__ __volatile__(LOCK_PREFIX "orl %0,%1" \
426: : "r" ((unsigned)mask),"m" (*(addr)) : "memory")
427
428
429#define smp_mb__before_atomic_dec() barrier()
430#define smp_mb__after_atomic_dec() barrier()
431#define smp_mb__before_atomic_inc() barrier()
432#define smp_mb__after_atomic_inc() barrier()
433
434#include <asm-generic/atomic.h>
435#endif
436