linux/include/asm-s390/pgtable.h
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   1/*
   2 *  include/asm-s390/pgtable.h
   3 *
   4 *  S390 version
   5 *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6 *    Author(s): Hartmut Penner (hp@de.ibm.com)
   7 *               Ulrich Weigand (weigand@de.ibm.com)
   8 *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   9 *
  10 *  Derived from "include/asm-i386/pgtable.h"
  11 */
  12
  13#ifndef _ASM_S390_PGTABLE_H
  14#define _ASM_S390_PGTABLE_H
  15
  16#include <asm-generic/4level-fixup.h>
  17
  18/*
  19 * The Linux memory management assumes a three-level page table setup. For
  20 * s390 31 bit we "fold" the mid level into the top-level page table, so
  21 * that we physically have the same two-level page table as the s390 mmu
  22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
  23 * the hardware provides (region first and region second tables are not
  24 * used).
  25 *
  26 * The "pgd_xxx()" functions are trivial for a folded two-level
  27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
  28 * into the pgd entry)
  29 *
  30 * This file contains the functions and defines necessary to modify and use
  31 * the S390 page table tree.
  32 */
  33#ifndef __ASSEMBLY__
  34#include <asm/bug.h>
  35#include <asm/processor.h>
  36#include <linux/threads.h>
  37
  38struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
  39
  40extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
  41extern void paging_init(void);
  42
  43/*
  44 * The S390 doesn't have any external MMU info: the kernel page
  45 * tables contain all the necessary information.
  46 */
  47#define update_mmu_cache(vma, address, pte)     do { } while (0)
  48
  49/*
  50 * ZERO_PAGE is a global shared page that is always zero: used
  51 * for zero-mapped memory areas etc..
  52 */
  53extern char empty_zero_page[PAGE_SIZE];
  54#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
  55#endif /* !__ASSEMBLY__ */
  56
  57/*
  58 * PMD_SHIFT determines the size of the area a second-level page
  59 * table can map
  60 * PGDIR_SHIFT determines what a third-level page table entry can map
  61 */
  62#ifndef __s390x__
  63# define PMD_SHIFT      22
  64# define PGDIR_SHIFT    22
  65#else /* __s390x__ */
  66# define PMD_SHIFT      21
  67# define PGDIR_SHIFT    31
  68#endif /* __s390x__ */
  69
  70#define PMD_SIZE        (1UL << PMD_SHIFT)
  71#define PMD_MASK        (~(PMD_SIZE-1))
  72#define PGDIR_SIZE      (1UL << PGDIR_SHIFT)
  73#define PGDIR_MASK      (~(PGDIR_SIZE-1))
  74
  75/*
  76 * entries per page directory level: the S390 is two-level, so
  77 * we don't really have any PMD directory physically.
  78 * for S390 segment-table entries are combined to one PGD
  79 * that leads to 1024 pte per pgd
  80 */
  81#ifndef __s390x__
  82# define PTRS_PER_PTE    1024
  83# define PTRS_PER_PMD    1
  84# define PTRS_PER_PGD    512
  85#else /* __s390x__ */
  86# define PTRS_PER_PTE    512
  87# define PTRS_PER_PMD    1024
  88# define PTRS_PER_PGD    2048
  89#endif /* __s390x__ */
  90
  91/*
  92 * pgd entries used up by user/kernel:
  93 */
  94#ifndef __s390x__
  95# define USER_PTRS_PER_PGD  512
  96# define USER_PGD_PTRS      512
  97# define KERNEL_PGD_PTRS    512
  98# define FIRST_USER_PGD_NR  0
  99#else /* __s390x__ */
 100# define USER_PTRS_PER_PGD  2048
 101# define USER_PGD_PTRS      2048
 102# define KERNEL_PGD_PTRS    2048
 103# define FIRST_USER_PGD_NR  0
 104#endif /* __s390x__ */
 105
 106#define pte_ERROR(e) \
 107        printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
 108#define pmd_ERROR(e) \
 109        printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
 110#define pgd_ERROR(e) \
 111        printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
 112
 113#ifndef __ASSEMBLY__
 114/*
 115 * Just any arbitrary offset to the start of the vmalloc VM area: the
 116 * current 8MB value just means that there will be a 8MB "hole" after the
 117 * physical memory until the kernel virtual memory starts.  That means that
 118 * any out-of-bounds memory accesses will hopefully be caught.
 119 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 120 * area for the same reason. ;)
 121 */
 122#define VMALLOC_OFFSET  (8*1024*1024)
 123#define VMALLOC_START   (((unsigned long) high_memory + VMALLOC_OFFSET) \
 124                         & ~(VMALLOC_OFFSET-1))
 125#ifndef __s390x__
 126# define VMALLOC_END     (0x7fffffffL)
 127#else /* __s390x__ */
 128# define VMALLOC_END     (0x40000000000L)
 129#endif /* __s390x__ */
 130
 131
 132/*
 133 * A 31 bit pagetable entry of S390 has following format:
 134 *  |   PFRA          |    |  OS  |
 135 * 0                   0IP0
 136 * 00000000001111111111222222222233
 137 * 01234567890123456789012345678901
 138 *
 139 * I Page-Invalid Bit:    Page is not available for address-translation
 140 * P Page-Protection Bit: Store access not possible for page
 141 *
 142 * A 31 bit segmenttable entry of S390 has following format:
 143 *  |   P-table origin      |  |PTL
 144 * 0                         IC
 145 * 00000000001111111111222222222233
 146 * 01234567890123456789012345678901
 147 *
 148 * I Segment-Invalid Bit:    Segment is not available for address-translation
 149 * C Common-Segment Bit:     Segment is not private (PoP 3-30)
 150 * PTL Page-Table-Length:    Page-table length (PTL+1*16 entries -> up to 256)
 151 *
 152 * The 31 bit segmenttable origin of S390 has following format:
 153 *
 154 *  |S-table origin   |     | STL |
 155 * X                   **GPS
 156 * 00000000001111111111222222222233
 157 * 01234567890123456789012345678901
 158 *
 159 * X Space-Switch event:
 160 * G Segment-Invalid Bit:     *
 161 * P Private-Space Bit:       Segment is not private (PoP 3-30)
 162 * S Storage-Alteration:
 163 * STL Segment-Table-Length:  Segment-table length (STL+1*16 entries -> up to 2048)
 164 *
 165 * A 64 bit pagetable entry of S390 has following format:
 166 * |                     PFRA                         |0IP0|  OS  |
 167 * 0000000000111111111122222222223333333333444444444455555555556666
 168 * 0123456789012345678901234567890123456789012345678901234567890123
 169 *
 170 * I Page-Invalid Bit:    Page is not available for address-translation
 171 * P Page-Protection Bit: Store access not possible for page
 172 *
 173 * A 64 bit segmenttable entry of S390 has following format:
 174 * |        P-table origin                              |      TT
 175 * 0000000000111111111122222222223333333333444444444455555555556666
 176 * 0123456789012345678901234567890123456789012345678901234567890123
 177 *
 178 * I Segment-Invalid Bit:    Segment is not available for address-translation
 179 * C Common-Segment Bit:     Segment is not private (PoP 3-30)
 180 * P Page-Protection Bit: Store access not possible for page
 181 * TT Type 00
 182 *
 183 * A 64 bit region table entry of S390 has following format:
 184 * |        S-table origin                             |   TF  TTTL
 185 * 0000000000111111111122222222223333333333444444444455555555556666
 186 * 0123456789012345678901234567890123456789012345678901234567890123
 187 *
 188 * I Segment-Invalid Bit:    Segment is not available for address-translation
 189 * TT Type 01
 190 * TF
 191 * TL Table lenght
 192 *
 193 * The 64 bit regiontable origin of S390 has following format:
 194 * |      region table origon                          |       DTTL
 195 * 0000000000111111111122222222223333333333444444444455555555556666
 196 * 0123456789012345678901234567890123456789012345678901234567890123
 197 *
 198 * X Space-Switch event:
 199 * G Segment-Invalid Bit:  
 200 * P Private-Space Bit:    
 201 * S Storage-Alteration:
 202 * R Real space
 203 * TL Table-Length:
 204 *
 205 * A storage key has the following format:
 206 * | ACC |F|R|C|0|
 207 *  0   3 4 5 6 7
 208 * ACC: access key
 209 * F  : fetch protection bit
 210 * R  : referenced bit
 211 * C  : changed bit
 212 */
 213
 214/* Hardware bits in the page table entry */
 215#define _PAGE_RO        0x200          /* HW read-only                     */
 216#define _PAGE_INVALID   0x400          /* HW invalid                       */
 217
 218/* Mask and four different kinds of invalid pages. */
 219#define _PAGE_INVALID_MASK      0x601
 220#define _PAGE_INVALID_EMPTY     0x400
 221#define _PAGE_INVALID_NONE      0x401
 222#define _PAGE_INVALID_SWAP      0x600
 223#define _PAGE_INVALID_FILE      0x601
 224
 225#ifndef __s390x__
 226
 227/* Bits in the segment table entry */
 228#define _PAGE_TABLE_LEN 0xf            /* only full page-tables            */
 229#define _PAGE_TABLE_COM 0x10           /* common page-table                */
 230#define _PAGE_TABLE_INV 0x20           /* invalid page-table               */
 231#define _SEG_PRESENT    0x001          /* Software (overlap with PTL)      */
 232
 233/* Bits int the storage key */
 234#define _PAGE_CHANGED    0x02          /* HW changed bit                   */
 235#define _PAGE_REFERENCED 0x04          /* HW referenced bit                */
 236
 237#define _USER_SEG_TABLE_LEN    0x7f    /* user-segment-table up to 2 GB    */
 238#define _KERNEL_SEG_TABLE_LEN  0x7f    /* kernel-segment-table up to 2 GB  */
 239
 240/*
 241 * User and Kernel pagetables are identical
 242 */
 243#define _PAGE_TABLE     _PAGE_TABLE_LEN
 244#define _KERNPG_TABLE   _PAGE_TABLE_LEN
 245
 246/*
 247 * The Kernel segment-tables includes the User segment-table
 248 */
 249
 250#define _SEGMENT_TABLE  (_USER_SEG_TABLE_LEN|0x80000000|0x100)
 251#define _KERNSEG_TABLE  _KERNEL_SEG_TABLE_LEN
 252
 253#define USER_STD_MASK   0x00000080UL
 254
 255#else /* __s390x__ */
 256
 257/* Bits in the segment table entry */
 258#define _PMD_ENTRY_INV   0x20          /* invalid segment table entry      */
 259#define _PMD_ENTRY       0x00        
 260
 261/* Bits in the region third table entry */
 262#define _PGD_ENTRY_INV   0x20          /* invalid region table entry       */
 263#define _PGD_ENTRY       0x07
 264
 265/*
 266 * User and kernel page directory
 267 */
 268#define _REGION_THIRD       0x4
 269#define _REGION_THIRD_LEN   0x3 
 270#define _REGION_TABLE       (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
 271#define _KERN_REGION_TABLE  (_REGION_THIRD|_REGION_THIRD_LEN)
 272
 273#define USER_STD_MASK           0x0000000000000080UL
 274
 275/* Bits in the storage key */
 276#define _PAGE_CHANGED    0x02          /* HW changed bit                   */
 277#define _PAGE_REFERENCED 0x04          /* HW referenced bit                */
 278
 279#endif /* __s390x__ */
 280
 281/*
 282 * No mapping available
 283 */
 284#define PAGE_NONE_SHARED  __pgprot(_PAGE_INVALID_NONE)
 285#define PAGE_NONE_PRIVATE __pgprot(_PAGE_INVALID_NONE)
 286#define PAGE_RO_SHARED    __pgprot(_PAGE_RO)
 287#define PAGE_RO_PRIVATE   __pgprot(_PAGE_RO)
 288#define PAGE_COPY         __pgprot(_PAGE_RO)
 289#define PAGE_SHARED       __pgprot(0)
 290#define PAGE_KERNEL       __pgprot(0)
 291
 292/*
 293 * The S390 can't do page protection for execute, and considers that the
 294 * same are read. Also, write permissions imply read permissions. This is
 295 * the closest we can get..
 296 */
 297         /*xwr*/
 298#define __P000  PAGE_NONE_PRIVATE
 299#define __P001  PAGE_RO_PRIVATE
 300#define __P010  PAGE_COPY
 301#define __P011  PAGE_COPY
 302#define __P100  PAGE_RO_PRIVATE
 303#define __P101  PAGE_RO_PRIVATE
 304#define __P110  PAGE_COPY
 305#define __P111  PAGE_COPY
 306
 307#define __S000  PAGE_NONE_SHARED
 308#define __S001  PAGE_RO_SHARED
 309#define __S010  PAGE_SHARED
 310#define __S011  PAGE_SHARED
 311#define __S100  PAGE_RO_SHARED
 312#define __S101  PAGE_RO_SHARED
 313#define __S110  PAGE_SHARED
 314#define __S111  PAGE_SHARED
 315
 316/*
 317 * Certain architectures need to do special things when PTEs
 318 * within a page table are directly modified.  Thus, the following
 319 * hook is made available.
 320 */
 321extern inline void set_pte(pte_t *pteptr, pte_t pteval)
 322{
 323        *pteptr = pteval;
 324}
 325
 326/*
 327 * pgd/pmd/pte query functions
 328 */
 329#ifndef __s390x__
 330
 331extern inline int pgd_present(pgd_t pgd) { return 1; }
 332extern inline int pgd_none(pgd_t pgd)    { return 0; }
 333extern inline int pgd_bad(pgd_t pgd)     { return 0; }
 334
 335extern inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
 336extern inline int pmd_none(pmd_t pmd)    { return pmd_val(pmd) & _PAGE_TABLE_INV; }
 337extern inline int pmd_bad(pmd_t pmd)
 338{
 339        return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
 340}
 341
 342#else /* __s390x__ */
 343
 344extern inline int pgd_present(pgd_t pgd)
 345{
 346        return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
 347}
 348
 349extern inline int pgd_none(pgd_t pgd)
 350{
 351        return pgd_val(pgd) & _PGD_ENTRY_INV;
 352}
 353
 354extern inline int pgd_bad(pgd_t pgd)
 355{
 356        return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
 357}
 358
 359extern inline int pmd_present(pmd_t pmd)
 360{
 361        return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
 362}
 363
 364extern inline int pmd_none(pmd_t pmd)
 365{
 366        return pmd_val(pmd) & _PMD_ENTRY_INV;
 367}
 368
 369extern inline int pmd_bad(pmd_t pmd)
 370{
 371        return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
 372}
 373
 374#endif /* __s390x__ */
 375
 376extern inline int pte_none(pte_t pte)
 377{
 378        return (pte_val(pte) & _PAGE_INVALID_MASK) == _PAGE_INVALID_EMPTY;
 379}
 380
 381extern inline int pte_present(pte_t pte)
 382{
 383        return !(pte_val(pte) & _PAGE_INVALID) ||
 384                (pte_val(pte) & _PAGE_INVALID_MASK) == _PAGE_INVALID_NONE;
 385}
 386
 387extern inline int pte_file(pte_t pte)
 388{
 389        return (pte_val(pte) & _PAGE_INVALID_MASK) == _PAGE_INVALID_FILE;
 390}
 391
 392#define pte_same(a,b)   (pte_val(a) == pte_val(b))
 393
 394/*
 395 * query functions pte_write/pte_dirty/pte_young only work if
 396 * pte_present() is true. Undefined behaviour if not..
 397 */
 398extern inline int pte_write(pte_t pte)
 399{
 400        return (pte_val(pte) & _PAGE_RO) == 0;
 401}
 402
 403extern inline int pte_dirty(pte_t pte)
 404{
 405        /* A pte is neither clean nor dirty on s/390. The dirty bit
 406         * is in the storage key. See page_test_and_clear_dirty for
 407         * details.
 408         */
 409        return 0;
 410}
 411
 412extern inline int pte_young(pte_t pte)
 413{
 414        /* A pte is neither young nor old on s/390. The young bit
 415         * is in the storage key. See page_test_and_clear_young for
 416         * details.
 417         */
 418        return 0;
 419}
 420
 421extern inline int pte_read(pte_t pte)
 422{
 423        /* All pages are readable since we don't use the fetch
 424         * protection bit in the storage key.
 425         */
 426        return 1;
 427}
 428
 429/*
 430 * pgd/pmd/pte modification functions
 431 */
 432
 433#ifndef __s390x__
 434
 435extern inline void pgd_clear(pgd_t * pgdp)      { }
 436
 437extern inline void pmd_clear(pmd_t * pmdp)
 438{
 439        pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
 440        pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
 441        pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
 442        pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
 443}
 444
 445#else /* __s390x__ */
 446
 447extern inline void pgd_clear(pgd_t * pgdp)
 448{
 449        pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
 450}
 451
 452extern inline void pmd_clear(pmd_t * pmdp)
 453{
 454        pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
 455        pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
 456}
 457
 458#endif /* __s390x__ */
 459
 460extern inline void pte_clear(pte_t *ptep)
 461{
 462        pte_val(*ptep) = _PAGE_INVALID_EMPTY;
 463}
 464
 465/*
 466 * The following pte modification functions only work if
 467 * pte_present() is true. Undefined behaviour if not..
 468 */
 469extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
 470{
 471        pte_val(pte) &= PAGE_MASK;
 472        pte_val(pte) |= pgprot_val(newprot);
 473        return pte;
 474}
 475
 476extern inline pte_t pte_wrprotect(pte_t pte)
 477{
 478        /* Do not clobber _PAGE_INVALID_NONE pages!  */
 479        if (!(pte_val(pte) & _PAGE_INVALID))
 480                pte_val(pte) |= _PAGE_RO;
 481        return pte;
 482}
 483
 484extern inline pte_t pte_mkwrite(pte_t pte) 
 485{
 486        pte_val(pte) &= ~_PAGE_RO;
 487        return pte;
 488}
 489
 490extern inline pte_t pte_mkclean(pte_t pte)
 491{
 492        /* The only user of pte_mkclean is the fork() code.
 493           We must *not* clear the *physical* page dirty bit
 494           just because fork() wants to clear the dirty bit in
 495           *one* of the page's mappings.  So we just do nothing. */
 496        return pte;
 497}
 498
 499extern inline pte_t pte_mkdirty(pte_t pte)
 500{
 501        /* We do not explicitly set the dirty bit because the
 502         * sske instruction is slow. It is faster to let the
 503         * next instruction set the dirty bit.
 504         */
 505        return pte;
 506}
 507
 508extern inline pte_t pte_mkold(pte_t pte)
 509{
 510        /* S/390 doesn't keep its dirty/referenced bit in the pte.
 511         * There is no point in clearing the real referenced bit.
 512         */
 513        return pte;
 514}
 515
 516extern inline pte_t pte_mkyoung(pte_t pte)
 517{
 518        /* S/390 doesn't keep its dirty/referenced bit in the pte.
 519         * There is no point in setting the real referenced bit.
 520         */
 521        return pte;
 522}
 523
 524static inline int ptep_test_and_clear_young(pte_t *ptep)
 525{
 526        return 0;
 527}
 528
 529static inline int
 530ptep_clear_flush_young(struct vm_area_struct *vma,
 531                        unsigned long address, pte_t *ptep)
 532{
 533        /* No need to flush TLB; bits are in storage key */
 534        return ptep_test_and_clear_young(ptep);
 535}
 536
 537static inline int ptep_test_and_clear_dirty(pte_t *ptep)
 538{
 539        return 0;
 540}
 541
 542static inline int
 543ptep_clear_flush_dirty(struct vm_area_struct *vma,
 544                        unsigned long address, pte_t *ptep)
 545{
 546        /* No need to flush TLB; bits are in storage key */
 547        return ptep_test_and_clear_dirty(ptep);
 548}
 549
 550static inline pte_t ptep_get_and_clear(pte_t *ptep)
 551{
 552        pte_t pte = *ptep;
 553        pte_clear(ptep);
 554        return pte;
 555}
 556
 557static inline pte_t
 558ptep_clear_flush(struct vm_area_struct *vma,
 559                 unsigned long address, pte_t *ptep)
 560{
 561        pte_t pte = *ptep;
 562#ifndef __s390x__
 563        if (!(pte_val(pte) & _PAGE_INVALID)) {
 564                /* S390 has 1mb segments, we are emulating 4MB segments */
 565                pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
 566                __asm__ __volatile__ ("ipte %2,%3"
 567                                      : "=m" (*ptep) : "m" (*ptep),
 568                                        "a" (pto), "a" (address) );
 569        }
 570#else /* __s390x__ */
 571        if (!(pte_val(pte) & _PAGE_INVALID)) 
 572                __asm__ __volatile__ ("ipte %2,%3"
 573                                      : "=m" (*ptep) : "m" (*ptep),
 574                                        "a" (ptep), "a" (address) );
 575#endif /* __s390x__ */
 576        pte_clear(ptep);
 577        return pte;
 578}
 579
 580static inline void ptep_set_wrprotect(pte_t *ptep)
 581{
 582        pte_t old_pte = *ptep;
 583        set_pte(ptep, pte_wrprotect(old_pte));
 584}
 585
 586static inline void ptep_mkdirty(pte_t *ptep)
 587{
 588        pte_mkdirty(*ptep);
 589}
 590
 591static inline void
 592ptep_establish(struct vm_area_struct *vma, 
 593               unsigned long address, pte_t *ptep,
 594               pte_t entry)
 595{
 596        ptep_clear_flush(vma, address, ptep);
 597        set_pte(ptep, entry);
 598}
 599
 600#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
 601        ptep_establish(__vma, __address, __ptep, __entry)
 602
 603/*
 604 * Test and clear dirty bit in storage key.
 605 * We can't clear the changed bit atomically. This is a potential
 606 * race against modification of the referenced bit. This function
 607 * should therefore only be called if it is not mapped in any
 608 * address space.
 609 */
 610#define page_test_and_clear_dirty(_page)                                  \
 611({                                                                        \
 612        struct page *__page = (_page);                                    \
 613        unsigned long __physpage = __pa((__page-mem_map) << PAGE_SHIFT);  \
 614        int __skey = page_get_storage_key(__physpage);                    \
 615        if (__skey & _PAGE_CHANGED)                                       \
 616                page_set_storage_key(__physpage, __skey & ~_PAGE_CHANGED);\
 617        (__skey & _PAGE_CHANGED);                                         \
 618})
 619
 620/*
 621 * Test and clear referenced bit in storage key.
 622 */
 623#define page_test_and_clear_young(page)                                   \
 624({                                                                        \
 625        struct page *__page = (page);                                     \
 626        unsigned long __physpage = __pa((__page-mem_map) << PAGE_SHIFT);  \
 627        int __ccode;                                                      \
 628        asm volatile ("rrbe 0,%1\n\t"                                     \
 629                      "ipm  %0\n\t"                                       \
 630                      "srl  %0,28\n\t"                                    \
 631                      : "=d" (__ccode) : "a" (__physpage) : "cc" );       \
 632        (__ccode & 2);                                                    \
 633})
 634
 635/*
 636 * Conversion functions: convert a page and protection to a page entry,
 637 * and a page entry and page directory to the page they refer to.
 638 */
 639static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
 640{
 641        pte_t __pte;
 642        pte_val(__pte) = physpage + pgprot_val(pgprot);
 643        return __pte;
 644}
 645
 646#define mk_pte(pg, pgprot)                                                \
 647({                                                                        \
 648        struct page *__page = (pg);                                       \
 649        pgprot_t __pgprot = (pgprot);                                     \
 650        unsigned long __physpage = __pa((__page-mem_map) << PAGE_SHIFT);  \
 651        pte_t __pte = mk_pte_phys(__physpage, __pgprot);                  \
 652        __pte;                                                            \
 653})
 654
 655#define pfn_pte(pfn, pgprot)                                              \
 656({                                                                        \
 657        pgprot_t __pgprot = (pgprot);                                     \
 658        unsigned long __physpage = __pa((pfn) << PAGE_SHIFT);             \
 659        pte_t __pte = mk_pte_phys(__physpage, __pgprot);                  \
 660        __pte;                                                            \
 661})
 662
 663#define SetPageUptodate(_page) \
 664        do {                                                                  \
 665                struct page *__page = (_page);                                \
 666                if (!test_and_set_bit(PG_uptodate, &__page->flags))           \
 667                        page_test_and_clear_dirty(_page);                     \
 668        } while (0)
 669
 670#ifdef __s390x__
 671
 672#define pfn_pmd(pfn, pgprot)                                              \
 673({                                                                        \
 674        pgprot_t __pgprot = (pgprot);                                     \
 675        unsigned long __physpage = __pa((pfn) << PAGE_SHIFT);             \
 676        pmd_t __pmd = __pmd(__physpage + pgprot_val(__pgprot));           \
 677        __pmd;                                                            \
 678})
 679
 680#endif /* __s390x__ */
 681
 682#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
 683#define pte_page(x) pfn_to_page(pte_pfn(x))
 684
 685#define pmd_page_kernel(pmd) (pmd_val(pmd) & PAGE_MASK)
 686
 687#define pmd_page(pmd) (mem_map+(pmd_val(pmd) >> PAGE_SHIFT))
 688
 689#define pgd_page_kernel(pgd) (pgd_val(pgd) & PAGE_MASK)
 690
 691/* to find an entry in a page-table-directory */
 692#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
 693#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
 694
 695/* to find an entry in a kernel page-table-directory */
 696#define pgd_offset_k(address) pgd_offset(&init_mm, address)
 697
 698#ifndef __s390x__
 699
 700/* Find an entry in the second-level page table.. */
 701extern inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
 702{
 703        return (pmd_t *) dir;
 704}
 705
 706#else /* __s390x__ */
 707
 708/* Find an entry in the second-level page table.. */
 709#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
 710#define pmd_offset(dir,addr) \
 711        ((pmd_t *) pgd_page_kernel(*(dir)) + pmd_index(addr))
 712
 713#endif /* __s390x__ */
 714
 715/* Find an entry in the third-level page table.. */
 716#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
 717#define pte_offset_kernel(pmd, address) \
 718        ((pte_t *) pmd_page_kernel(*(pmd)) + pte_index(address))
 719#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
 720#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
 721#define pte_unmap(pte) do { } while (0)
 722#define pte_unmap_nested(pte) do { } while (0)
 723
 724/*
 725 * 31 bit swap entry format:
 726 * A page-table entry has some bits we have to treat in a special way.
 727 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
 728 * exception will occur instead of a page translation exception. The
 729 * specifiation exception has the bad habit not to store necessary
 730 * information in the lowcore.
 731 * Bit 21 and bit 22 are the page invalid bit and the page protection
 732 * bit. We set both to indicate a swapped page.
 733 * Bit 30 and 31 are used to distinguish the different page types. For
 734 * a swapped page these bits need to be zero.
 735 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
 736 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
 737 * plus 24 for the offset.
 738 * 0|     offset        |0110|o|type |00|
 739 * 0 0000000001111111111 2222 2 22222 33
 740 * 0 1234567890123456789 0123 4 56789 01
 741 *
 742 * 64 bit swap entry format:
 743 * A page-table entry has some bits we have to treat in a special way.
 744 * Bits 52 and bit 55 have to be zero, otherwise an specification
 745 * exception will occur instead of a page translation exception. The
 746 * specifiation exception has the bad habit not to store necessary
 747 * information in the lowcore.
 748 * Bit 53 and bit 54 are the page invalid bit and the page protection
 749 * bit. We set both to indicate a swapped page.
 750 * Bit 62 and 63 are used to distinguish the different page types. For
 751 * a swapped page these bits need to be zero.
 752 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
 753 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
 754 * plus 56 for the offset.
 755 * |                      offset                        |0110|o|type |00|
 756 *  0000000000111111111122222222223333333333444444444455 5555 5 55566 66
 757 *  0123456789012345678901234567890123456789012345678901 2345 6 78901 23
 758 */
 759extern inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
 760{
 761        pte_t pte;
 762        pte_val(pte) = _PAGE_INVALID_SWAP | ((type & 0x1f) << 2) |
 763                ((offset & 1) << 7) | ((offset & 0xffffe) << 11);
 764        return pte;
 765}
 766
 767#define __swp_type(entry)       (((entry).val >> 2) & 0x1f)
 768#define __swp_offset(entry)     (((entry).val >> 11) | (((entry).val >> 7) & 1))
 769#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
 770
 771#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
 772#define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
 773
 774#ifndef __s390x__
 775# define PTE_FILE_MAX_BITS      26
 776#else /* __s390x__ */
 777# define PTE_FILE_MAX_BITS      59
 778#endif /* __s390x__ */
 779
 780#define pte_to_pgoff(__pte) \
 781        ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
 782
 783#define pgoff_to_pte(__off) \
 784        ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
 785                   | _PAGE_INVALID_FILE })
 786
 787#endif /* !__ASSEMBLY__ */
 788
 789#define kern_addr_valid(addr)   (1)
 790
 791/*
 792 * No page table caches to initialise
 793 */
 794#define pgtable_cache_init()    do { } while (0)
 795
 796#define __HAVE_ARCH_PTEP_ESTABLISH
 797#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 798#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 799#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 800#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
 801#define __HAVE_ARCH_PTEP_CLEAR_DIRTY_FLUSH
 802#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 803#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
 804#define __HAVE_ARCH_PTEP_SET_WRPROTECT
 805#define __HAVE_ARCH_PTEP_MKDIRTY
 806#define __HAVE_ARCH_PTE_SAME
 807#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_DIRTY
 808#define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
 809#include <asm-generic/pgtable.h>
 810
 811#endif /* _S390_PAGE_H */
 812
 813
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