LXR linux/include/asm-arm26/hardware.h

   1/*
   2 *  linux/include/asm-arm/arch-arc/hardware.h
   3 *
   4 *  Copyright (C) 1996-1999 Russell King.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2 as
   8 * published by the Free Software Foundation.
   9 *
  10 *  This file contains the hardware definitions of the
  11 *  Acorn Archimedes/A5000 machines.
  12 *
  13 *  Modifications:
  14 *   04-04-1998 PJB/RMK Merged arc and a5k versions
  15 */
  16#ifndef __ASM_HARDWARE_H
  17#define __ASM_HARDWARE_H
  18
  19#include <linux/config.h>
  20
  21
  22/*
  23 * What hardware must be present - these can be tested by the kernel
  24 * source.
  25 */
  26#define HAS_IOC
  27#define HAS_MEMC
  28#define HAS_VIDC
  29
  30#define VDMA_ALIGNMENT  PAGE_SIZE
  31#define VDMA_XFERSIZE   16
  32#define VDMA_INIT       0
  33#define VDMA_START      1
  34#define VDMA_END        2
  35
  36#ifndef __ASSEMBLY__
  37extern void memc_write(unsigned int reg, unsigned long val);
  38
  39#define video_set_dma(start,end,offset)                         \
  40do {                                                            \
  41        memc_write (VDMA_START, (start >> 2));                  \
  42        memc_write (VDMA_END, (end - VDMA_XFERSIZE) >> 2);      \
  43        memc_write (VDMA_INIT, (offset >> 2));                  \
  44} while (0)
  45#endif
  46
  47
  48/* Hardware addresses of major areas.
  49 *  *_START is the physical address
  50 *  *_SIZE  is the size of the region
  51 *  *_BASE  is the virtual address
  52 */
  53#define IO_START                0x03000000
  54#define IO_SIZE                 0x01000000
  55#define IO_BASE                 0x03000000
  56
  57/*
  58 * Screen mapping information
  59 */
  60#define SCREEN_START            0x02000000
  61#define SCREEN_END              0x02078000
  62#define SCREEN_SIZE             0x00078000
  63#define SCREEN_BASE             0x02000000
  64
  65
  66#define EXPMASK_BASE            0x03360000
  67#define IOEB_BASE               0x03350000
  68#define VIDC_BASE               0x03400000
  69#define LATCHA_BASE             0x03250040
  70#define LATCHB_BASE             0x03250018
  71#define IOC_BASE                0x03200000
  72#define FLOPPYDMA_BASE          0x0302a000
  73#define PCIO_BASE               0x03010000
  74
  75// FIXME - are the below correct?
  76#define PODSLOT_IOC0_BASE       0x03240000
  77#define PODSLOT_IOC_SIZE        (1 << 14)
  78#define PODSLOT_MEMC_BASE       0x03000000
  79#define PODSLOT_MEMC_SIZE       (1 << 14)
  80
  81#define vidc_writel(val)        __raw_writel(val, VIDC_BASE)
  82
  83#ifndef __ASSEMBLY__
  84
  85/*
  86 * for use with inb/outb
  87 */
  88#define IOEB_VID_CTL            (IOEB_BASE + 0x48)
  89#define IOEB_PRESENT            (IOEB_BASE + 0x50)
  90#define IOEB_PSCLR              (IOEB_BASE + 0x58)
  91#define IOEB_MONTYPE            (IOEB_BASE + 0x70)
  92
  93//FIXME - These adresses are weird - ISTR some weirdo address shifting stuff was going on here...
  94#define IO_EC_IOC_BASE          0x80090000
  95#define IO_EC_MEMC_BASE         0x80000000
  96
  97#ifdef CONFIG_ARCH_ARC
  98/* A680 hardware */
  99#define WD1973_BASE             0x03290000
 100#define WD1973_LATCH            0x03350000
 101#define Z8530_BASE              0x032b0008
 102#define SCSI_BASE               0x03100000
 103#endif
 104
 105#endif
 106
 107#define EXPMASK_STATUS          (EXPMASK_BASE + 0x00)
 108#define EXPMASK_ENABLE          (EXPMASK_BASE + 0x04)
 109
 110#endif
 111