linux/drivers/net/wireless/rtl818x/rtl8187/dev.c
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   1/*
   2 * Linux device driver for RTL8187
   3 *
   4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5 * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
   6 *
   7 * Based on the r8187 driver, which is:
   8 * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al.
   9 *
  10 * The driver was extended to the RTL8187B in 2008 by:
  11 *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12 *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13 *      Larry Finger <Larry.Finger@lwfinger.net>
  14 *
  15 * Magic delays and register offsets below are taken from the original
  16 * r8187 driver sources.  Thanks to Realtek for their support!
  17 *
  18 * This program is free software; you can redistribute it and/or modify
  19 * it under the terms of the GNU General Public License version 2 as
  20 * published by the Free Software Foundation.
  21 */
  22
  23#include <linux/usb.h>
  24#include <linux/slab.h>
  25#include <linux/delay.h>
  26#include <linux/etherdevice.h>
  27#include <linux/eeprom_93cx6.h>
  28#include <linux/module.h>
  29#include <net/mac80211.h>
  30
  31#include "rtl8187.h"
  32#include "rtl8225.h"
  33#ifdef CONFIG_RTL8187_LEDS
  34#include "leds.h"
  35#endif
  36#include "rfkill.h"
  37
  38MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  39MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
  40MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  41MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  42MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  43MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  44MODULE_LICENSE("GPL");
  45
  46static struct usb_device_id rtl8187_table[] = {
  47        /* Asus */
  48        {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  49        /* Belkin */
  50        {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  51        /* Realtek */
  52        {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  53        {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  54        {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  55        {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  56        /* Surecom */
  57        {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  58        /* Logitech */
  59        {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  60        /* Netgear */
  61        {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  62        {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  63        {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  64        /* HP */
  65        {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  66        /* Sitecom */
  67        {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  68        {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  69        {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  70        /* Sphairon Access Systems GmbH */
  71        {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  72        /* Dick Smith Electronics */
  73        {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  74        /* Abocom */
  75        {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  76        /* Qcom */
  77        {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  78        /* AirLive */
  79        {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  80        /* Linksys */
  81        {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  82        {}
  83};
  84
  85MODULE_DEVICE_TABLE(usb, rtl8187_table);
  86
  87static const struct ieee80211_rate rtl818x_rates[] = {
  88        { .bitrate = 10, .hw_value = 0, },
  89        { .bitrate = 20, .hw_value = 1, },
  90        { .bitrate = 55, .hw_value = 2, },
  91        { .bitrate = 110, .hw_value = 3, },
  92        { .bitrate = 60, .hw_value = 4, },
  93        { .bitrate = 90, .hw_value = 5, },
  94        { .bitrate = 120, .hw_value = 6, },
  95        { .bitrate = 180, .hw_value = 7, },
  96        { .bitrate = 240, .hw_value = 8, },
  97        { .bitrate = 360, .hw_value = 9, },
  98        { .bitrate = 480, .hw_value = 10, },
  99        { .bitrate = 540, .hw_value = 11, },
 100};
 101
 102static const struct ieee80211_channel rtl818x_channels[] = {
 103        { .center_freq = 2412 },
 104        { .center_freq = 2417 },
 105        { .center_freq = 2422 },
 106        { .center_freq = 2427 },
 107        { .center_freq = 2432 },
 108        { .center_freq = 2437 },
 109        { .center_freq = 2442 },
 110        { .center_freq = 2447 },
 111        { .center_freq = 2452 },
 112        { .center_freq = 2457 },
 113        { .center_freq = 2462 },
 114        { .center_freq = 2467 },
 115        { .center_freq = 2472 },
 116        { .center_freq = 2484 },
 117};
 118
 119static void rtl8187_iowrite_async_cb(struct urb *urb)
 120{
 121        kfree(urb->context);
 122}
 123
 124static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 125                                  void *data, u16 len)
 126{
 127        struct usb_ctrlrequest *dr;
 128        struct urb *urb;
 129        struct rtl8187_async_write_data {
 130                u8 data[4];
 131                struct usb_ctrlrequest dr;
 132        } *buf;
 133        int rc;
 134
 135        buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 136        if (!buf)
 137                return;
 138
 139        urb = usb_alloc_urb(0, GFP_ATOMIC);
 140        if (!urb) {
 141                kfree(buf);
 142                return;
 143        }
 144
 145        dr = &buf->dr;
 146
 147        dr->bRequestType = RTL8187_REQT_WRITE;
 148        dr->bRequest = RTL8187_REQ_SET_REG;
 149        dr->wValue = addr;
 150        dr->wIndex = 0;
 151        dr->wLength = cpu_to_le16(len);
 152
 153        memcpy(buf, data, len);
 154
 155        usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 156                             (unsigned char *)dr, buf, len,
 157                             rtl8187_iowrite_async_cb, buf);
 158        usb_anchor_urb(urb, &priv->anchored);
 159        rc = usb_submit_urb(urb, GFP_ATOMIC);
 160        if (rc < 0) {
 161                kfree(buf);
 162                usb_unanchor_urb(urb);
 163        }
 164        usb_free_urb(urb);
 165}
 166
 167static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 168                                           __le32 *addr, u32 val)
 169{
 170        __le32 buf = cpu_to_le32(val);
 171
 172        rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 173                              &buf, sizeof(buf));
 174}
 175
 176void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 177{
 178        struct rtl8187_priv *priv = dev->priv;
 179
 180        data <<= 8;
 181        data |= addr | 0x80;
 182
 183        rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 184        rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 185        rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 186        rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 187}
 188
 189static void rtl8187_tx_cb(struct urb *urb)
 190{
 191        struct sk_buff *skb = (struct sk_buff *)urb->context;
 192        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 193        struct ieee80211_hw *hw = info->rate_driver_data[0];
 194        struct rtl8187_priv *priv = hw->priv;
 195
 196        skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 197                                          sizeof(struct rtl8187_tx_hdr));
 198        ieee80211_tx_info_clear_status(info);
 199
 200        if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 201                if (priv->is_rtl8187b) {
 202                        skb_queue_tail(&priv->b_tx_status.queue, skb);
 203
 204                        /* queue is "full", discard last items */
 205                        while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 206                                struct sk_buff *old_skb;
 207
 208                                dev_dbg(&priv->udev->dev,
 209                                        "transmit status queue full\n");
 210
 211                                old_skb = skb_dequeue(&priv->b_tx_status.queue);
 212                                ieee80211_tx_status_irqsafe(hw, old_skb);
 213                        }
 214                        return;
 215                } else {
 216                        info->flags |= IEEE80211_TX_STAT_ACK;
 217                }
 218        }
 219        if (priv->is_rtl8187b)
 220                ieee80211_tx_status_irqsafe(hw, skb);
 221        else {
 222                /* Retry information for the RTI8187 is only available by
 223                 * reading a register in the device. We are in interrupt mode
 224                 * here, thus queue the skb and finish on a work queue. */
 225                skb_queue_tail(&priv->b_tx_status.queue, skb);
 226                ieee80211_queue_delayed_work(hw, &priv->work, 0);
 227        }
 228}
 229
 230static void rtl8187_tx(struct ieee80211_hw *dev,
 231                       struct ieee80211_tx_control *control,
 232                       struct sk_buff *skb)
 233{
 234        struct rtl8187_priv *priv = dev->priv;
 235        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 236        struct ieee80211_hdr *tx_hdr =  (struct ieee80211_hdr *)(skb->data);
 237        unsigned int ep;
 238        void *buf;
 239        struct urb *urb;
 240        __le16 rts_dur = 0;
 241        u32 flags;
 242        int rc;
 243
 244        urb = usb_alloc_urb(0, GFP_ATOMIC);
 245        if (!urb) {
 246                kfree_skb(skb);
 247                return;
 248        }
 249
 250        flags = skb->len;
 251        flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 252
 253        flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 254        if (ieee80211_has_morefrags(tx_hdr->frame_control))
 255                flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 256
 257        /* HW will perform RTS-CTS when only RTS flags is set.
 258         * HW will perform CTS-to-self when both RTS and CTS flags are set.
 259         * RTS rate and RTS duration will be used also for CTS-to-self.
 260         */
 261        if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 262                flags |= RTL818X_TX_DESC_FLAG_RTS;
 263                flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 264                rts_dur = ieee80211_rts_duration(dev, priv->vif,
 265                                                 skb->len, info);
 266        } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 267                flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS;
 268                flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 269                rts_dur = ieee80211_ctstoself_duration(dev, priv->vif,
 270                                                 skb->len, info);
 271        }
 272
 273        if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 274                if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 275                        priv->seqno += 0x10;
 276                tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 277                tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 278        }
 279
 280        if (!priv->is_rtl8187b) {
 281                struct rtl8187_tx_hdr *hdr =
 282                        (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 283                hdr->flags = cpu_to_le32(flags);
 284                hdr->len = 0;
 285                hdr->rts_duration = rts_dur;
 286                hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 287                buf = hdr;
 288
 289                ep = 2;
 290        } else {
 291                /* fc needs to be calculated before skb_push() */
 292                unsigned int epmap[4] = { 6, 7, 5, 4 };
 293                u16 fc = le16_to_cpu(tx_hdr->frame_control);
 294
 295                struct rtl8187b_tx_hdr *hdr =
 296                        (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 297                struct ieee80211_rate *txrate =
 298                        ieee80211_get_tx_rate(dev, info);
 299                memset(hdr, 0, sizeof(*hdr));
 300                hdr->flags = cpu_to_le32(flags);
 301                hdr->rts_duration = rts_dur;
 302                hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 303                hdr->tx_duration =
 304                        ieee80211_generic_frame_duration(dev, priv->vif,
 305                                                         info->band,
 306                                                         skb->len, txrate);
 307                buf = hdr;
 308
 309                if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 310                        ep = 12;
 311                else
 312                        ep = epmap[skb_get_queue_mapping(skb)];
 313        }
 314
 315        info->rate_driver_data[0] = dev;
 316        info->rate_driver_data[1] = urb;
 317
 318        usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 319                          buf, skb->len, rtl8187_tx_cb, skb);
 320        urb->transfer_flags |= URB_ZERO_PACKET;
 321        usb_anchor_urb(urb, &priv->anchored);
 322        rc = usb_submit_urb(urb, GFP_ATOMIC);
 323        if (rc < 0) {
 324                usb_unanchor_urb(urb);
 325                kfree_skb(skb);
 326        }
 327        usb_free_urb(urb);
 328}
 329
 330static void rtl8187_rx_cb(struct urb *urb)
 331{
 332        struct sk_buff *skb = (struct sk_buff *)urb->context;
 333        struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 334        struct ieee80211_hw *dev = info->dev;
 335        struct rtl8187_priv *priv = dev->priv;
 336        struct ieee80211_rx_status rx_status = { 0 };
 337        int rate, signal;
 338        u32 flags;
 339        unsigned long f;
 340
 341        spin_lock_irqsave(&priv->rx_queue.lock, f);
 342        __skb_unlink(skb, &priv->rx_queue);
 343        spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 344        skb_put(skb, urb->actual_length);
 345
 346        if (unlikely(urb->status)) {
 347                dev_kfree_skb_irq(skb);
 348                return;
 349        }
 350
 351        if (!priv->is_rtl8187b) {
 352                struct rtl8187_rx_hdr *hdr =
 353                        (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 354                flags = le32_to_cpu(hdr->flags);
 355                /* As with the RTL8187B below, the AGC is used to calculate
 356                 * signal strength. In this case, the scaling
 357                 * constants are derived from the output of p54usb.
 358                 */
 359                signal = -4 - ((27 * hdr->agc) >> 6);
 360                rx_status.antenna = (hdr->signal >> 7) & 1;
 361                rx_status.mactime = le64_to_cpu(hdr->mac_time);
 362        } else {
 363                struct rtl8187b_rx_hdr *hdr =
 364                        (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 365                /* The Realtek datasheet for the RTL8187B shows that the RX
 366                 * header contains the following quantities: signal quality,
 367                 * RSSI, AGC, the received power in dB, and the measured SNR.
 368                 * In testing, none of these quantities show qualitative
 369                 * agreement with AP signal strength, except for the AGC,
 370                 * which is inversely proportional to the strength of the
 371                 * signal. In the following, the signal strength
 372                 * is derived from the AGC. The arbitrary scaling constants
 373                 * are chosen to make the results close to the values obtained
 374                 * for a BCM4312 using b43 as the driver. The noise is ignored
 375                 * for now.
 376                 */
 377                flags = le32_to_cpu(hdr->flags);
 378                signal = 14 - hdr->agc / 2;
 379                rx_status.antenna = (hdr->rssi >> 7) & 1;
 380                rx_status.mactime = le64_to_cpu(hdr->mac_time);
 381        }
 382
 383        rx_status.signal = signal;
 384        priv->signal = signal;
 385        rate = (flags >> 20) & 0xF;
 386        skb_trim(skb, flags & 0x0FFF);
 387        rx_status.rate_idx = rate;
 388        rx_status.freq = dev->conf.chandef.chan->center_freq;
 389        rx_status.band = dev->conf.chandef.chan->band;
 390        rx_status.flag |= RX_FLAG_MACTIME_START;
 391        if (flags & RTL818X_RX_DESC_FLAG_SPLCP)
 392                rx_status.flag |= RX_FLAG_SHORTPRE;
 393        if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 394                rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 395        memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 396        ieee80211_rx_irqsafe(dev, skb);
 397
 398        skb = dev_alloc_skb(RTL8187_MAX_RX);
 399        if (unlikely(!skb)) {
 400                /* TODO check rx queue length and refill *somewhere* */
 401                return;
 402        }
 403
 404        info = (struct rtl8187_rx_info *)skb->cb;
 405        info->urb = urb;
 406        info->dev = dev;
 407        urb->transfer_buffer = skb_tail_pointer(skb);
 408        urb->context = skb;
 409        skb_queue_tail(&priv->rx_queue, skb);
 410
 411        usb_anchor_urb(urb, &priv->anchored);
 412        if (usb_submit_urb(urb, GFP_ATOMIC)) {
 413                usb_unanchor_urb(urb);
 414                skb_unlink(skb, &priv->rx_queue);
 415                dev_kfree_skb_irq(skb);
 416        }
 417}
 418
 419static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 420{
 421        struct rtl8187_priv *priv = dev->priv;
 422        struct urb *entry = NULL;
 423        struct sk_buff *skb;
 424        struct rtl8187_rx_info *info;
 425        int ret = 0;
 426
 427        while (skb_queue_len(&priv->rx_queue) < 32) {
 428                skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 429                if (!skb) {
 430                        ret = -ENOMEM;
 431                        goto err;
 432                }
 433                entry = usb_alloc_urb(0, GFP_KERNEL);
 434                if (!entry) {
 435                        ret = -ENOMEM;
 436                        goto err;
 437                }
 438                usb_fill_bulk_urb(entry, priv->udev,
 439                                  usb_rcvbulkpipe(priv->udev,
 440                                  priv->is_rtl8187b ? 3 : 1),
 441                                  skb_tail_pointer(skb),
 442                                  RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 443                info = (struct rtl8187_rx_info *)skb->cb;
 444                info->urb = entry;
 445                info->dev = dev;
 446                skb_queue_tail(&priv->rx_queue, skb);
 447                usb_anchor_urb(entry, &priv->anchored);
 448                ret = usb_submit_urb(entry, GFP_KERNEL);
 449                usb_put_urb(entry);
 450                if (ret) {
 451                        skb_unlink(skb, &priv->rx_queue);
 452                        usb_unanchor_urb(entry);
 453                        goto err;
 454                }
 455        }
 456        return ret;
 457
 458err:
 459        kfree_skb(skb);
 460        usb_kill_anchored_urbs(&priv->anchored);
 461        return ret;
 462}
 463
 464static void rtl8187b_status_cb(struct urb *urb)
 465{
 466        struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 467        struct rtl8187_priv *priv = hw->priv;
 468        u64 val;
 469        unsigned int cmd_type;
 470
 471        if (unlikely(urb->status))
 472                return;
 473
 474        /*
 475         * Read from status buffer:
 476         *
 477         * bits [30:31] = cmd type:
 478         * - 0 indicates tx beacon interrupt
 479         * - 1 indicates tx close descriptor
 480         *
 481         * In the case of tx beacon interrupt:
 482         * [0:9] = Last Beacon CW
 483         * [10:29] = reserved
 484         * [30:31] = 00b
 485         * [32:63] = Last Beacon TSF
 486         *
 487         * If it's tx close descriptor:
 488         * [0:7] = Packet Retry Count
 489         * [8:14] = RTS Retry Count
 490         * [15] = TOK
 491         * [16:27] = Sequence No
 492         * [28] = LS
 493         * [29] = FS
 494         * [30:31] = 01b
 495         * [32:47] = unused (reserved?)
 496         * [48:63] = MAC Used Time
 497         */
 498        val = le64_to_cpu(priv->b_tx_status.buf);
 499
 500        cmd_type = (val >> 30) & 0x3;
 501        if (cmd_type == 1) {
 502                unsigned int pkt_rc, seq_no;
 503                bool tok;
 504                struct sk_buff *skb;
 505                struct ieee80211_hdr *ieee80211hdr;
 506                unsigned long flags;
 507
 508                pkt_rc = val & 0xFF;
 509                tok = val & (1 << 15);
 510                seq_no = (val >> 16) & 0xFFF;
 511
 512                spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 513                skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 514                        ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 515
 516                        /*
 517                         * While testing, it was discovered that the seq_no
 518                         * doesn't actually contains the sequence number.
 519                         * Instead of returning just the 12 bits of sequence
 520                         * number, hardware is returning entire sequence control
 521                         * (fragment number plus sequence number) in a 12 bit
 522                         * only field overflowing after some time. As a
 523                         * workaround, just consider the lower bits, and expect
 524                         * it's unlikely we wrongly ack some sent data
 525                         */
 526                        if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 527                            & 0xFFF) == seq_no)
 528                                break;
 529                }
 530                if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 531                        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 532
 533                        __skb_unlink(skb, &priv->b_tx_status.queue);
 534                        if (tok)
 535                                info->flags |= IEEE80211_TX_STAT_ACK;
 536                        info->status.rates[0].count = pkt_rc + 1;
 537
 538                        ieee80211_tx_status_irqsafe(hw, skb);
 539                }
 540                spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 541        }
 542
 543        usb_anchor_urb(urb, &priv->anchored);
 544        if (usb_submit_urb(urb, GFP_ATOMIC))
 545                usb_unanchor_urb(urb);
 546}
 547
 548static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 549{
 550        struct rtl8187_priv *priv = dev->priv;
 551        struct urb *entry;
 552        int ret = 0;
 553
 554        entry = usb_alloc_urb(0, GFP_KERNEL);
 555        if (!entry)
 556                return -ENOMEM;
 557
 558        usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 559                          &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 560                          rtl8187b_status_cb, dev);
 561
 562        usb_anchor_urb(entry, &priv->anchored);
 563        ret = usb_submit_urb(entry, GFP_KERNEL);
 564        if (ret)
 565                usb_unanchor_urb(entry);
 566        usb_free_urb(entry);
 567
 568        return ret;
 569}
 570
 571static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
 572{
 573        u32 anaparam, anaparam2;
 574        u8 anaparam3, reg;
 575
 576        if (!priv->is_rtl8187b) {
 577                if (rfon) {
 578                        anaparam = RTL8187_RTL8225_ANAPARAM_ON;
 579                        anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
 580                } else {
 581                        anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
 582                        anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
 583                }
 584        } else {
 585                if (rfon) {
 586                        anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
 587                        anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
 588                        anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
 589                } else {
 590                        anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
 591                        anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
 592                        anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
 593                }
 594        }
 595
 596        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 597                         RTL818X_EEPROM_CMD_CONFIG);
 598        reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 599        reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 600        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 601        rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 602        rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
 603        if (priv->is_rtl8187b)
 604                rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3);
 605        reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 606        rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 607        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 608                         RTL818X_EEPROM_CMD_NORMAL);
 609}
 610
 611static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 612{
 613        struct rtl8187_priv *priv = dev->priv;
 614        u8 reg;
 615        int i;
 616
 617        reg = rtl818x_ioread8(priv, &priv->map->CMD);
 618        reg &= (1 << 1);
 619        reg |= RTL818X_CMD_RESET;
 620        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 621
 622        i = 10;
 623        do {
 624                msleep(2);
 625                if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 626                      RTL818X_CMD_RESET))
 627                        break;
 628        } while (--i);
 629
 630        if (!i) {
 631                wiphy_err(dev->wiphy, "Reset timeout!\n");
 632                return -ETIMEDOUT;
 633        }
 634
 635        /* reload registers from eeprom */
 636        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 637
 638        i = 10;
 639        do {
 640                msleep(4);
 641                if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 642                      RTL818X_EEPROM_CMD_CONFIG))
 643                        break;
 644        } while (--i);
 645
 646        if (!i) {
 647                wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
 648                return -ETIMEDOUT;
 649        }
 650
 651        return 0;
 652}
 653
 654static int rtl8187_init_hw(struct ieee80211_hw *dev)
 655{
 656        struct rtl8187_priv *priv = dev->priv;
 657        u8 reg;
 658        int res;
 659
 660        /* reset */
 661        rtl8187_set_anaparam(priv, true);
 662
 663        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 664
 665        msleep(200);
 666        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 667        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 668        rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 669        msleep(200);
 670
 671        res = rtl8187_cmd_reset(dev);
 672        if (res)
 673                return res;
 674
 675        rtl8187_set_anaparam(priv, true);
 676
 677        /* setup card */
 678        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 679        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 680
 681        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 682        rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
 683        rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 684
 685        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 686
 687        rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 688        reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 689        reg &= 0x3F;
 690        reg |= 0x80;
 691        rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 692
 693        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 694
 695        rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 696        rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 697        rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 698
 699        // TODO: set RESP_RATE and BRSR properly
 700        rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 701        rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 702
 703        /* host_usb_init */
 704        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 705        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 706        reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 707        rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 708        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 709        rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
 710        rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 711        rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 712        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 713        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 714        msleep(100);
 715
 716        rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 717        rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 718        rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 719        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 720                         RTL818X_EEPROM_CMD_CONFIG);
 721        rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 722        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 723                         RTL818X_EEPROM_CMD_NORMAL);
 724        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 725        msleep(100);
 726
 727        priv->rf->init(dev);
 728
 729        rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 730        reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 731        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 732        rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 733        rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 734        rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 735        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 736
 737        return 0;
 738}
 739
 740static const u8 rtl8187b_reg_table[][3] = {
 741        {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 742        {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 743        {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 744        {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 745
 746        {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 747        {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 748        {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
 749        {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
 750        {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 751
 752        {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 753        {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 754        {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 755        {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 756        {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 757        {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 758        {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
 759
 760        {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
 761        {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
 762        {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
 763        {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
 764        {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 765
 766        {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 767        {0x8F, 0x00, 0}
 768};
 769
 770static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 771{
 772        struct rtl8187_priv *priv = dev->priv;
 773        int res, i;
 774        u8 reg;
 775
 776        rtl8187_set_anaparam(priv, true);
 777
 778        /* Reset PLL sequence on 8187B. Realtek note: reduces power
 779         * consumption about 30 mA */
 780        rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 781        reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 782        rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 783        rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 784
 785        res = rtl8187_cmd_reset(dev);
 786        if (res)
 787                return res;
 788
 789        rtl8187_set_anaparam(priv, true);
 790
 791        /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
 792         * RESP_RATE on 8187L in Realtek sources: each bit should be each
 793         * one of the 12 rates, all are enabled */
 794        rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
 795
 796        reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 797        reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
 798        rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 799
 800        /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
 801        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 802        rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
 803
 804        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 805
 806        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 807                         RTL818X_EEPROM_CMD_CONFIG);
 808        reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 809        rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 810        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 811                         RTL818X_EEPROM_CMD_NORMAL);
 812
 813        rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 814        for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 815                rtl818x_iowrite8_idx(priv,
 816                                     (u8 *)(uintptr_t)
 817                                     (rtl8187b_reg_table[i][0] | 0xFF00),
 818                                     rtl8187b_reg_table[i][1],
 819                                     rtl8187b_reg_table[i][2]);
 820        }
 821
 822        rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 823        rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 824
 825        rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 826        rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 827        rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 828
 829        rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 830
 831        /* RFSW_CTRL register */
 832        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 833
 834        rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 835        rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 836        rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 837        msleep(100);
 838
 839        priv->rf->init(dev);
 840
 841        reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 842        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 843        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 844
 845        rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 846        rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 847        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 848        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 849        rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 850        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 851        rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 852
 853        reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 854        rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 855        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 856        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 857        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 858        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 859        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 860        rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 861        rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 862        rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 863        rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 864        rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 865        rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 866
 867        rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 868
 869        rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 870
 871        priv->slot_time = 0x9;
 872        priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 873        priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 874        priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 875        priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 876        rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 877
 878        /* ENEDCA flag must always be set, transmit issues? */
 879        rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
 880
 881        return 0;
 882}
 883
 884static void rtl8187_work(struct work_struct *work)
 885{
 886        /* The RTL8187 returns the retry count through register 0xFFFA. In
 887         * addition, it appears to be a cumulative retry count, not the
 888         * value for the current TX packet. When multiple TX entries are
 889         * waiting in the queue, the retry count will be the total for all.
 890         * The "error" may matter for purposes of rate setting, but there is
 891         * no other choice with this hardware.
 892         */
 893        struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 894                                    work.work);
 895        struct ieee80211_tx_info *info;
 896        struct ieee80211_hw *dev = priv->dev;
 897        static u16 retry;
 898        u16 tmp;
 899        u16 avg_retry;
 900        int length;
 901
 902        mutex_lock(&priv->conf_mutex);
 903        tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 904        length = skb_queue_len(&priv->b_tx_status.queue);
 905        if (unlikely(!length))
 906                length = 1;
 907        if (unlikely(tmp < retry))
 908                tmp = retry;
 909        avg_retry = (tmp - retry) / length;
 910        while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 911                struct sk_buff *old_skb;
 912
 913                old_skb = skb_dequeue(&priv->b_tx_status.queue);
 914                info = IEEE80211_SKB_CB(old_skb);
 915                info->status.rates[0].count = avg_retry + 1;
 916                if (info->status.rates[0].count > RETRY_COUNT)
 917                        info->flags &= ~IEEE80211_TX_STAT_ACK;
 918                ieee80211_tx_status_irqsafe(dev, old_skb);
 919        }
 920        retry = tmp;
 921        mutex_unlock(&priv->conf_mutex);
 922}
 923
 924static int rtl8187_start(struct ieee80211_hw *dev)
 925{
 926        struct rtl8187_priv *priv = dev->priv;
 927        u32 reg;
 928        int ret;
 929
 930        mutex_lock(&priv->conf_mutex);
 931
 932        ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 933                                     rtl8187b_init_hw(dev);
 934        if (ret)
 935                goto rtl8187_start_exit;
 936
 937        init_usb_anchor(&priv->anchored);
 938        priv->dev = dev;
 939
 940        if (priv->is_rtl8187b) {
 941                reg = RTL818X_RX_CONF_MGMT |
 942                      RTL818X_RX_CONF_DATA |
 943                      RTL818X_RX_CONF_BROADCAST |
 944                      RTL818X_RX_CONF_NICMAC |
 945                      RTL818X_RX_CONF_BSSID |
 946                      (7 << 13 /* RX FIFO threshold NONE */) |
 947                      (7 << 10 /* MAX RX DMA */) |
 948                      RTL818X_RX_CONF_RX_AUTORESETPHY |
 949                      RTL818X_RX_CONF_ONLYERLPKT |
 950                      RTL818X_RX_CONF_MULTICAST;
 951                priv->rx_conf = reg;
 952                rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 953
 954                reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 955                reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
 956                reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
 957                reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 958                rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 959
 960                rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 961                                  RTL818X_TX_CONF_HW_SEQNUM |
 962                                  RTL818X_TX_CONF_DISREQQSIZE |
 963                                  (RETRY_COUNT << 8  /* short retry limit */) |
 964                                  (RETRY_COUNT << 0  /* long retry limit */) |
 965                                  (7 << 21 /* MAX TX DMA */));
 966                ret = rtl8187_init_urbs(dev);
 967                if (ret)
 968                        goto rtl8187_start_exit;
 969                ret = rtl8187b_init_status_urb(dev);
 970                if (ret)
 971                        usb_kill_anchored_urbs(&priv->anchored);
 972                goto rtl8187_start_exit;
 973        }
 974
 975        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 976
 977        rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 978        rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 979
 980        ret = rtl8187_init_urbs(dev);
 981        if (ret)
 982                goto rtl8187_start_exit;
 983
 984        reg = RTL818X_RX_CONF_ONLYERLPKT |
 985              RTL818X_RX_CONF_RX_AUTORESETPHY |
 986              RTL818X_RX_CONF_BSSID |
 987              RTL818X_RX_CONF_MGMT |
 988              RTL818X_RX_CONF_DATA |
 989              (7 << 13 /* RX FIFO threshold NONE */) |
 990              (7 << 10 /* MAX RX DMA */) |
 991              RTL818X_RX_CONF_BROADCAST |
 992              RTL818X_RX_CONF_NICMAC;
 993
 994        priv->rx_conf = reg;
 995        rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 996
 997        reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 998        reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
 999        reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
1000        rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
1001
1002        reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
1003        reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
1004        reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
1005        reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
1006        rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
1007
1008        reg  = RTL818X_TX_CONF_CW_MIN |
1009               (7 << 21 /* MAX TX DMA */) |
1010               RTL818X_TX_CONF_NO_ICV;
1011        rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1012
1013        reg = rtl818x_ioread8(priv, &priv->map->CMD);
1014        reg |= RTL818X_CMD_TX_ENABLE;
1015        reg |= RTL818X_CMD_RX_ENABLE;
1016        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1017        INIT_DELAYED_WORK(&priv->work, rtl8187_work);
1018
1019rtl8187_start_exit:
1020        mutex_unlock(&priv->conf_mutex);
1021        return ret;
1022}
1023
1024static void rtl8187_stop(struct ieee80211_hw *dev)
1025{
1026        struct rtl8187_priv *priv = dev->priv;
1027        struct sk_buff *skb;
1028        u32 reg;
1029
1030        mutex_lock(&priv->conf_mutex);
1031        rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1032
1033        reg = rtl818x_ioread8(priv, &priv->map->CMD);
1034        reg &= ~RTL818X_CMD_TX_ENABLE;
1035        reg &= ~RTL818X_CMD_RX_ENABLE;
1036        rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1037
1038        priv->rf->stop(dev);
1039        rtl8187_set_anaparam(priv, false);
1040
1041        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1042        reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1043        rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1044        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1045
1046        while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1047                dev_kfree_skb_any(skb);
1048
1049        usb_kill_anchored_urbs(&priv->anchored);
1050        mutex_unlock(&priv->conf_mutex);
1051
1052        if (!priv->is_rtl8187b)
1053                cancel_delayed_work_sync(&priv->work);
1054}
1055
1056static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
1057{
1058        struct rtl8187_priv *priv = dev->priv;
1059
1060        return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1061               (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1062}
1063
1064
1065static void rtl8187_beacon_work(struct work_struct *work)
1066{
1067        struct rtl8187_vif *vif_priv =
1068                container_of(work, struct rtl8187_vif, beacon_work.work);
1069        struct ieee80211_vif *vif =
1070                container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
1071        struct ieee80211_hw *dev = vif_priv->dev;
1072        struct ieee80211_mgmt *mgmt;
1073        struct sk_buff *skb;
1074
1075        /* don't overflow the tx ring */
1076        if (ieee80211_queue_stopped(dev, 0))
1077                goto resched;
1078
1079        /* grab a fresh beacon */
1080        skb = ieee80211_beacon_get(dev, vif);
1081        if (!skb)
1082                goto resched;
1083
1084        /*
1085         * update beacon timestamp w/ TSF value
1086         * TODO: make hardware update beacon timestamp
1087         */
1088        mgmt = (struct ieee80211_mgmt *)skb->data;
1089        mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif));
1090
1091        /* TODO: use actual beacon queue */
1092        skb_set_queue_mapping(skb, 0);
1093
1094        rtl8187_tx(dev, NULL, skb);
1095
1096resched:
1097        /*
1098         * schedule next beacon
1099         * TODO: use hardware support for beacon timing
1100         */
1101        schedule_delayed_work(&vif_priv->beacon_work,
1102                        usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
1103}
1104
1105
1106static int rtl8187_add_interface(struct ieee80211_hw *dev,
1107                                 struct ieee80211_vif *vif)
1108{
1109        struct rtl8187_priv *priv = dev->priv;
1110        struct rtl8187_vif *vif_priv;
1111        int i;
1112        int ret = -EOPNOTSUPP;
1113
1114        mutex_lock(&priv->conf_mutex);
1115        if (priv->vif)
1116                goto exit;
1117
1118        switch (vif->type) {
1119        case NL80211_IFTYPE_STATION:
1120        case NL80211_IFTYPE_ADHOC:
1121                break;
1122        default:
1123                goto exit;
1124        }
1125
1126        ret = 0;
1127        priv->vif = vif;
1128
1129        /* Initialize driver private area */
1130        vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1131        vif_priv->dev = dev;
1132        INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work);
1133        vif_priv->enable_beacon = false;
1134
1135
1136        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1137        for (i = 0; i < ETH_ALEN; i++)
1138                rtl818x_iowrite8(priv, &priv->map->MAC[i],
1139                                 ((u8 *)vif->addr)[i]);
1140        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1141
1142exit:
1143        mutex_unlock(&priv->conf_mutex);
1144        return ret;
1145}
1146
1147static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1148                                     struct ieee80211_vif *vif)
1149{
1150        struct rtl8187_priv *priv = dev->priv;
1151        mutex_lock(&priv->conf_mutex);
1152        priv->vif = NULL;
1153        mutex_unlock(&priv->conf_mutex);
1154}
1155
1156static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1157{
1158        struct rtl8187_priv *priv = dev->priv;
1159        struct ieee80211_conf *conf = &dev->conf;
1160        u32 reg;
1161
1162        mutex_lock(&priv->conf_mutex);
1163        reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1164        /* Enable TX loopback on MAC level to avoid TX during channel
1165         * changes, as this has be seen to causes problems and the
1166         * card will stop work until next reset
1167         */
1168        rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1169                          reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1170        priv->rf->set_chan(dev, conf);
1171        msleep(10);
1172        rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1173
1174        rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1175        rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1176        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1177        rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1178        mutex_unlock(&priv->conf_mutex);
1179        return 0;
1180}
1181
1182/*
1183 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1184 * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1185 */
1186static __le32 *rtl8187b_ac_addr[4] = {
1187        (__le32 *) 0xFFF0, /* AC_VO */
1188        (__le32 *) 0xFFF4, /* AC_VI */
1189        (__le32 *) 0xFFFC, /* AC_BK */
1190        (__le32 *) 0xFFF8, /* AC_BE */
1191};
1192
1193#define SIFS_TIME 0xa
1194
1195static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1196                             bool use_short_preamble)
1197{
1198        if (priv->is_rtl8187b) {
1199                u8 difs, eifs;
1200                u16 ack_timeout;
1201                int queue;
1202
1203                if (use_short_slot) {
1204                        priv->slot_time = 0x9;
1205                        difs = 0x1c;
1206                        eifs = 0x53;
1207                } else {
1208                        priv->slot_time = 0x14;
1209                        difs = 0x32;
1210                        eifs = 0x5b;
1211                }
1212                rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1213                rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1214                rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1215
1216                /*
1217                 * BRSR+1 on 8187B is in fact EIFS register
1218                 * Value in units of 4 us
1219                 */
1220                rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1221
1222                /*
1223                 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1224                 * register. In units of 4 us like eifs register
1225                 * ack_timeout = ack duration + plcp + difs + preamble
1226                 */
1227                ack_timeout = 112 + 48 + difs;
1228                if (use_short_preamble)
1229                        ack_timeout += 72;
1230                else
1231                        ack_timeout += 144;
1232                rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1233                                 DIV_ROUND_UP(ack_timeout, 4));
1234
1235                for (queue = 0; queue < 4; queue++)
1236                        rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1237                                         priv->aifsn[queue] * priv->slot_time +
1238                                         SIFS_TIME);
1239        } else {
1240                rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1241                if (use_short_slot) {
1242                        rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1243                        rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1244                        rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1245                } else {
1246                        rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1247                        rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1248                        rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1249                }
1250        }
1251}
1252
1253static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1254                                     struct ieee80211_vif *vif,
1255                                     struct ieee80211_bss_conf *info,
1256                                     u32 changed)
1257{
1258        struct rtl8187_priv *priv = dev->priv;
1259        struct rtl8187_vif *vif_priv;
1260        int i;
1261        u8 reg;
1262
1263        vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1264
1265        if (changed & BSS_CHANGED_BSSID) {
1266                mutex_lock(&priv->conf_mutex);
1267                for (i = 0; i < ETH_ALEN; i++)
1268                        rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1269                                         info->bssid[i]);
1270
1271                if (priv->is_rtl8187b)
1272                        reg = RTL818X_MSR_ENEDCA;
1273                else
1274                        reg = 0;
1275
1276                if (is_valid_ether_addr(info->bssid)) {
1277                        if (vif->type == NL80211_IFTYPE_ADHOC)
1278                                reg |= RTL818X_MSR_ADHOC;
1279                        else
1280                                reg |= RTL818X_MSR_INFRA;
1281                }
1282                else
1283                        reg |= RTL818X_MSR_NO_LINK;
1284
1285                rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1286
1287                mutex_unlock(&priv->conf_mutex);
1288        }
1289
1290        if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1291                rtl8187_conf_erp(priv, info->use_short_slot,
1292                                 info->use_short_preamble);
1293
1294        if (changed & BSS_CHANGED_BEACON_ENABLED)
1295                vif_priv->enable_beacon = info->enable_beacon;
1296
1297        if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
1298                cancel_delayed_work_sync(&vif_priv->beacon_work);
1299                if (vif_priv->enable_beacon)
1300                        schedule_work(&vif_priv->beacon_work.work);
1301        }
1302
1303}
1304
1305static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1306                                     struct netdev_hw_addr_list *mc_list)
1307{
1308        return netdev_hw_addr_list_count(mc_list);
1309}
1310
1311static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1312                                     unsigned int changed_flags,
1313                                     unsigned int *total_flags,
1314                                     u64 multicast)
1315{
1316        struct rtl8187_priv *priv = dev->priv;
1317
1318        if (changed_flags & FIF_FCSFAIL)
1319                priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1320        if (changed_flags & FIF_CONTROL)
1321                priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1322        if (changed_flags & FIF_OTHER_BSS)
1323                priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1324        if (*total_flags & FIF_ALLMULTI || multicast > 0)
1325                priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1326        else
1327                priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1328
1329        *total_flags = 0;
1330
1331        if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1332                *total_flags |= FIF_FCSFAIL;
1333        if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1334                *total_flags |= FIF_CONTROL;
1335        if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1336                *total_flags |= FIF_OTHER_BSS;
1337        if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1338                *total_flags |= FIF_ALLMULTI;
1339
1340        rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1341}
1342
1343static int rtl8187_conf_tx(struct ieee80211_hw *dev,
1344                           struct ieee80211_vif *vif, u16 queue,
1345                           const struct ieee80211_tx_queue_params *params)
1346{
1347        struct rtl8187_priv *priv = dev->priv;
1348        u8 cw_min, cw_max;
1349
1350        if (queue > 3)
1351                return -EINVAL;
1352
1353        cw_min = fls(params->cw_min);
1354        cw_max = fls(params->cw_max);
1355
1356        if (priv->is_rtl8187b) {
1357                priv->aifsn[queue] = params->aifs;
1358
1359                /*
1360                 * This is the structure of AC_*_PARAM registers in 8187B:
1361                 * - TXOP limit field, bit offset = 16
1362                 * - ECWmax, bit offset = 12
1363                 * - ECWmin, bit offset = 8
1364                 * - AIFS, bit offset = 0
1365                 */
1366                rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1367                                  (params->txop << 16) | (cw_max << 12) |
1368                                  (cw_min << 8) | (params->aifs *
1369                                  priv->slot_time + SIFS_TIME));
1370        } else {
1371                if (queue != 0)
1372                        return -EINVAL;
1373
1374                rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1375                                 cw_min | (cw_max << 4));
1376        }
1377        return 0;
1378}
1379
1380
1381static const struct ieee80211_ops rtl8187_ops = {
1382        .tx                     = rtl8187_tx,
1383        .start                  = rtl8187_start,
1384        .stop                   = rtl8187_stop,
1385        .add_interface          = rtl8187_add_interface,
1386        .remove_interface       = rtl8187_remove_interface,
1387        .config                 = rtl8187_config,
1388        .bss_info_changed       = rtl8187_bss_info_changed,
1389        .prepare_multicast      = rtl8187_prepare_multicast,
1390        .configure_filter       = rtl8187_configure_filter,
1391        .conf_tx                = rtl8187_conf_tx,
1392        .rfkill_poll            = rtl8187_rfkill_poll,
1393        .get_tsf                = rtl8187_get_tsf,
1394};
1395
1396static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1397{
1398        struct ieee80211_hw *dev = eeprom->data;
1399        struct rtl8187_priv *priv = dev->priv;
1400        u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1401
1402        eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1403        eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1404        eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1405        eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1406}
1407
1408static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1409{
1410        struct ieee80211_hw *dev = eeprom->data;
1411        struct rtl8187_priv *priv = dev->priv;
1412        u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1413
1414        if (eeprom->reg_data_in)
1415                reg |= RTL818X_EEPROM_CMD_WRITE;
1416        if (eeprom->reg_data_out)
1417                reg |= RTL818X_EEPROM_CMD_READ;
1418        if (eeprom->reg_data_clock)
1419                reg |= RTL818X_EEPROM_CMD_CK;
1420        if (eeprom->reg_chip_select)
1421                reg |= RTL818X_EEPROM_CMD_CS;
1422
1423        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1424        udelay(10);
1425}
1426
1427static int rtl8187_probe(struct usb_interface *intf,
1428                                   const struct usb_device_id *id)
1429{
1430        struct usb_device *udev = interface_to_usbdev(intf);
1431        struct ieee80211_hw *dev;
1432        struct rtl8187_priv *priv;
1433        struct eeprom_93cx6 eeprom;
1434        struct ieee80211_channel *channel;
1435        const char *chip_name;
1436        u16 txpwr, reg;
1437        u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1438        int err, i;
1439        u8 mac_addr[ETH_ALEN];
1440
1441        dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1442        if (!dev) {
1443                printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1444                return -ENOMEM;
1445        }
1446
1447        priv = dev->priv;
1448        priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1449
1450        /* allocate "DMA aware" buffer for register accesses */
1451        priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1452        if (!priv->io_dmabuf) {
1453                err = -ENOMEM;
1454                goto err_free_dev;
1455        }
1456        mutex_init(&priv->io_mutex);
1457
1458        SET_IEEE80211_DEV(dev, &intf->dev);
1459        usb_set_intfdata(intf, dev);
1460        priv->udev = udev;
1461
1462        usb_get_dev(udev);
1463
1464        skb_queue_head_init(&priv->rx_queue);
1465
1466        BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1467        BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1468
1469        memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1470        memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1471        priv->map = (struct rtl818x_csr *)0xFF00;
1472
1473        priv->band.band = IEEE80211_BAND_2GHZ;
1474        priv->band.channels = priv->channels;
1475        priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1476        priv->band.bitrates = priv->rates;
1477        priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1478        dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1479
1480
1481        dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1482                     IEEE80211_HW_SIGNAL_DBM |
1483                     IEEE80211_HW_RX_INCLUDES_FCS;
1484        /* Initialize rate-control variables */
1485        dev->max_rates = 1;
1486        dev->max_rate_tries = RETRY_COUNT;
1487
1488        eeprom.data = dev;
1489        eeprom.register_read = rtl8187_eeprom_register_read;
1490        eeprom.register_write = rtl8187_eeprom_register_write;
1491        if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1492                eeprom.width = PCI_EEPROM_WIDTH_93C66;
1493        else
1494                eeprom.width = PCI_EEPROM_WIDTH_93C46;
1495
1496        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1497        udelay(10);
1498
1499        eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1500                               (__le16 __force *)mac_addr, 3);
1501        if (!is_valid_ether_addr(mac_addr)) {
1502                printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1503                       "generated MAC address\n");
1504                eth_random_addr(mac_addr);
1505        }
1506        SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1507
1508        channel = priv->channels;
1509        for (i = 0; i < 3; i++) {
1510                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1511                                  &txpwr);
1512                (*channel++).hw_value = txpwr & 0xFF;
1513                (*channel++).hw_value = txpwr >> 8;
1514        }
1515        for (i = 0; i < 2; i++) {
1516                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1517                                  &txpwr);
1518                (*channel++).hw_value = txpwr & 0xFF;
1519                (*channel++).hw_value = txpwr >> 8;
1520        }
1521
1522        eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1523                          &priv->txpwr_base);
1524
1525        reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1526        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1527        /* 0 means asic B-cut, we should use SW 3 wire
1528         * bit-by-bit banging for radio. 1 means we can use
1529         * USB specific request to write radio registers */
1530        priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1531        rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1532        rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1533
1534        if (!priv->is_rtl8187b) {
1535                u32 reg32;
1536                reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1537                reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1538                switch (reg32) {
1539                case RTL818X_TX_CONF_R8187vD_B:
1540                        /* Some RTL8187B devices have a USB ID of 0x8187
1541                         * detect them here */
1542                        chip_name = "RTL8187BvB(early)";
1543                        priv->is_rtl8187b = 1;
1544                        priv->hw_rev = RTL8187BvB;
1545                        break;
1546                case RTL818X_TX_CONF_R8187vD:
1547                        chip_name = "RTL8187vD";
1548                        break;
1549                default:
1550                        chip_name = "RTL8187vB (default)";
1551                }
1552       } else {
1553                /*
1554                 * Force USB request to write radio registers for 8187B, Realtek
1555                 * only uses it in their sources
1556                 */
1557                /*if (priv->asic_rev == 0) {
1558                        printk(KERN_WARNING "rtl8187: Forcing use of USB "
1559                               "requests to write to radio registers\n");
1560                        priv->asic_rev = 1;
1561                }*/
1562                switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1563                case RTL818X_R8187B_B:
1564                        chip_name = "RTL8187BvB";
1565                        priv->hw_rev = RTL8187BvB;
1566                        break;
1567                case RTL818X_R8187B_D:
1568                        chip_name = "RTL8187BvD";
1569                        priv->hw_rev = RTL8187BvD;
1570                        break;
1571                case RTL818X_R8187B_E:
1572                        chip_name = "RTL8187BvE";
1573                        priv->hw_rev = RTL8187BvE;
1574                        break;
1575                default:
1576                        chip_name = "RTL8187BvB (default)";
1577                        priv->hw_rev = RTL8187BvB;
1578                }
1579        }
1580
1581        if (!priv->is_rtl8187b) {
1582                for (i = 0; i < 2; i++) {
1583                        eeprom_93cx6_read(&eeprom,
1584                                          RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1585                                          &txpwr);
1586                        (*channel++).hw_value = txpwr & 0xFF;
1587                        (*channel++).hw_value = txpwr >> 8;
1588                }
1589        } else {
1590                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1591                                  &txpwr);
1592                (*channel++).hw_value = txpwr & 0xFF;
1593
1594                eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1595                (*channel++).hw_value = txpwr & 0xFF;
1596
1597                eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1598                (*channel++).hw_value = txpwr & 0xFF;
1599                (*channel++).hw_value = txpwr >> 8;
1600        }
1601        /* Handle the differing rfkill GPIO bit in different models */
1602        priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1603        if (product_id == 0x8197 || product_id == 0x8198) {
1604                eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1605                if (reg & 0xFF00)
1606                        priv->rfkill_mask = RFKILL_MASK_8198;
1607        }
1608        dev->vif_data_size = sizeof(struct rtl8187_vif);
1609        dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1610                                      BIT(NL80211_IFTYPE_ADHOC) ;
1611
1612        if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1613                printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1614                       " info!\n");
1615
1616        priv->rf = rtl8187_detect_rf(dev);
1617        dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1618                                  sizeof(struct rtl8187_tx_hdr) :
1619                                  sizeof(struct rtl8187b_tx_hdr);
1620        if (!priv->is_rtl8187b)
1621                dev->queues = 1;
1622        else
1623                dev->queues = 4;
1624
1625        err = ieee80211_register_hw(dev);
1626        if (err) {
1627                printk(KERN_ERR "rtl8187: Cannot register device\n");
1628                goto err_free_dmabuf;
1629        }
1630        mutex_init(&priv->conf_mutex);
1631        skb_queue_head_init(&priv->b_tx_status.queue);
1632
1633        wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1634                   mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1635                   priv->rfkill_mask);
1636
1637#ifdef CONFIG_RTL8187_LEDS
1638        eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1639        reg &= 0xFF;
1640        rtl8187_leds_init(dev, reg);
1641#endif
1642        rtl8187_rfkill_init(dev);
1643
1644        return 0;
1645
1646 err_free_dmabuf:
1647        kfree(priv->io_dmabuf);
1648        usb_set_intfdata(intf, NULL);
1649        usb_put_dev(udev);
1650 err_free_dev:
1651        ieee80211_free_hw(dev);
1652        return err;
1653}
1654
1655static void rtl8187_disconnect(struct usb_interface *intf)
1656{
1657        struct ieee80211_hw *dev = usb_get_intfdata(intf);
1658        struct rtl8187_priv *priv;
1659
1660        if (!dev)
1661                return;
1662
1663#ifdef CONFIG_RTL8187_LEDS
1664        rtl8187_leds_exit(dev);
1665#endif
1666        rtl8187_rfkill_exit(dev);
1667        ieee80211_unregister_hw(dev);
1668
1669        priv = dev->priv;
1670        usb_reset_device(priv->udev);
1671        usb_put_dev(interface_to_usbdev(intf));
1672        kfree(priv->io_dmabuf);
1673        ieee80211_free_hw(dev);
1674}
1675
1676static struct usb_driver rtl8187_driver = {
1677        .name           = KBUILD_MODNAME,
1678        .id_table       = rtl8187_table,
1679        .probe          = rtl8187_probe,
1680        .disconnect     = rtl8187_disconnect,
1681        .disable_hub_initiated_lpm = 1,
1682};
1683
1684module_usb_driver(rtl8187_driver);
1685
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