linux/arch/x86/mm/pageattr.c
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   1/*
   2 * Copyright 2002 Andi Kleen, SuSE Labs.
   3 * Thanks to Ben LaHaise for precious feedback.
   4 */
   5#include <linux/highmem.h>
   6#include <linux/bootmem.h>
   7#include <linux/sched.h>
   8#include <linux/mm.h>
   9#include <linux/interrupt.h>
  10#include <linux/seq_file.h>
  11#include <linux/debugfs.h>
  12#include <linux/pfn.h>
  13#include <linux/percpu.h>
  14#include <linux/gfp.h>
  15#include <linux/pci.h>
  16#include <linux/vmalloc.h>
  17
  18#include <asm/e820.h>
  19#include <asm/processor.h>
  20#include <asm/tlbflush.h>
  21#include <asm/sections.h>
  22#include <asm/setup.h>
  23#include <asm/uaccess.h>
  24#include <asm/pgalloc.h>
  25#include <asm/proto.h>
  26#include <asm/pat.h>
  27
  28/*
  29 * The current flushing context - we pass it instead of 5 arguments:
  30 */
  31struct cpa_data {
  32        unsigned long   *vaddr;
  33        pgd_t           *pgd;
  34        pgprot_t        mask_set;
  35        pgprot_t        mask_clr;
  36        unsigned long   numpages;
  37        int             flags;
  38        unsigned long   pfn;
  39        unsigned        force_split : 1;
  40        int             curpage;
  41        struct page     **pages;
  42};
  43
  44/*
  45 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
  46 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
  47 * entries change the page attribute in parallel to some other cpu
  48 * splitting a large page entry along with changing the attribute.
  49 */
  50static DEFINE_SPINLOCK(cpa_lock);
  51
  52#define CPA_FLUSHTLB 1
  53#define CPA_ARRAY 2
  54#define CPA_PAGES_ARRAY 4
  55
  56#ifdef CONFIG_PROC_FS
  57static unsigned long direct_pages_count[PG_LEVEL_NUM];
  58
  59void update_page_count(int level, unsigned long pages)
  60{
  61        /* Protect against CPA */
  62        spin_lock(&pgd_lock);
  63        direct_pages_count[level] += pages;
  64        spin_unlock(&pgd_lock);
  65}
  66
  67static void split_page_count(int level)
  68{
  69        if (direct_pages_count[level] == 0)
  70                return;
  71
  72        direct_pages_count[level]--;
  73        direct_pages_count[level - 1] += PTRS_PER_PTE;
  74}
  75
  76void arch_report_meminfo(struct seq_file *m)
  77{
  78        seq_printf(m, "DirectMap4k:    %8lu kB\n",
  79                        direct_pages_count[PG_LEVEL_4K] << 2);
  80#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  81        seq_printf(m, "DirectMap2M:    %8lu kB\n",
  82                        direct_pages_count[PG_LEVEL_2M] << 11);
  83#else
  84        seq_printf(m, "DirectMap4M:    %8lu kB\n",
  85                        direct_pages_count[PG_LEVEL_2M] << 12);
  86#endif
  87        if (direct_gbpages)
  88                seq_printf(m, "DirectMap1G:    %8lu kB\n",
  89                        direct_pages_count[PG_LEVEL_1G] << 20);
  90}
  91#else
  92static inline void split_page_count(int level) { }
  93#endif
  94
  95#ifdef CONFIG_X86_64
  96
  97static inline unsigned long highmap_start_pfn(void)
  98{
  99        return __pa_symbol(_text) >> PAGE_SHIFT;
 100}
 101
 102static inline unsigned long highmap_end_pfn(void)
 103{
 104        return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
 105}
 106
 107#endif
 108
 109static inline int
 110within(unsigned long addr, unsigned long start, unsigned long end)
 111{
 112        return addr >= start && addr < end;
 113}
 114
 115/*
 116 * Flushing functions
 117 */
 118
 119/**
 120 * clflush_cache_range - flush a cache range with clflush
 121 * @vaddr:      virtual start address
 122 * @size:       number of bytes to flush
 123 *
 124 * clflushopt is an unordered instruction which needs fencing with mfence or
 125 * sfence to avoid ordering issues.
 126 */
 127void clflush_cache_range(void *vaddr, unsigned int size)
 128{
 129        const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
 130        void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
 131        void *vend = vaddr + size;
 132
 133        if (p >= vend)
 134                return;
 135
 136        mb();
 137
 138        for (; p < vend; p += clflush_size)
 139                clflushopt(p);
 140
 141        mb();
 142}
 143EXPORT_SYMBOL_GPL(clflush_cache_range);
 144
 145static void __cpa_flush_all(void *arg)
 146{
 147        unsigned long cache = (unsigned long)arg;
 148
 149        /*
 150         * Flush all to work around Errata in early athlons regarding
 151         * large page flushing.
 152         */
 153        __flush_tlb_all();
 154
 155        if (cache && boot_cpu_data.x86 >= 4)
 156                wbinvd();
 157}
 158
 159static void cpa_flush_all(unsigned long cache)
 160{
 161        BUG_ON(irqs_disabled());
 162
 163        on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 164}
 165
 166static void __cpa_flush_range(void *arg)
 167{
 168        /*
 169         * We could optimize that further and do individual per page
 170         * tlb invalidates for a low number of pages. Caveat: we must
 171         * flush the high aliases on 64bit as well.
 172         */
 173        __flush_tlb_all();
 174}
 175
 176static void cpa_flush_range(unsigned long start, int numpages, int cache)
 177{
 178        unsigned int i, level;
 179        unsigned long addr;
 180
 181        BUG_ON(irqs_disabled());
 182        WARN_ON(PAGE_ALIGN(start) != start);
 183
 184        on_each_cpu(__cpa_flush_range, NULL, 1);
 185
 186        if (!cache)
 187                return;
 188
 189        /*
 190         * We only need to flush on one CPU,
 191         * clflush is a MESI-coherent instruction that
 192         * will cause all other CPUs to flush the same
 193         * cachelines:
 194         */
 195        for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
 196                pte_t *pte = lookup_address(addr, &level);
 197
 198                /*
 199                 * Only flush present addresses:
 200                 */
 201                if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 202                        clflush_cache_range((void *) addr, PAGE_SIZE);
 203        }
 204}
 205
 206static void cpa_flush_array(unsigned long *start, int numpages, int cache,
 207                            int in_flags, struct page **pages)
 208{
 209        unsigned int i, level;
 210        unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
 211
 212        BUG_ON(irqs_disabled());
 213
 214        on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
 215
 216        if (!cache || do_wbinvd)
 217                return;
 218
 219        /*
 220         * We only need to flush on one CPU,
 221         * clflush is a MESI-coherent instruction that
 222         * will cause all other CPUs to flush the same
 223         * cachelines:
 224         */
 225        for (i = 0; i < numpages; i++) {
 226                unsigned long addr;
 227                pte_t *pte;
 228
 229                if (in_flags & CPA_PAGES_ARRAY)
 230                        addr = (unsigned long)page_address(pages[i]);
 231                else
 232                        addr = start[i];
 233
 234                pte = lookup_address(addr, &level);
 235
 236                /*
 237                 * Only flush present addresses:
 238                 */
 239                if (pte && (pte_val(*pte) & _PAGE_PRESENT))
 240                        clflush_cache_range((void *)addr, PAGE_SIZE);
 241        }
 242}
 243
 244/*
 245 * Certain areas of memory on x86 require very specific protection flags,
 246 * for example the BIOS area or kernel text. Callers don't always get this
 247 * right (again, ioremap() on BIOS memory is not uncommon) so this function
 248 * checks and fixes these known static required protection bits.
 249 */
 250static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
 251                                   unsigned long pfn)
 252{
 253        pgprot_t forbidden = __pgprot(0);
 254
 255        /*
 256         * The BIOS area between 640k and 1Mb needs to be executable for
 257         * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 258         */
 259#ifdef CONFIG_PCI_BIOS
 260        if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
 261                pgprot_val(forbidden) |= _PAGE_NX;
 262#endif
 263
 264        /*
 265         * The kernel text needs to be executable for obvious reasons
 266         * Does not cover __inittext since that is gone later on. On
 267         * 64bit we do not enforce !NX on the low mapping
 268         */
 269        if (within(address, (unsigned long)_text, (unsigned long)_etext))
 270                pgprot_val(forbidden) |= _PAGE_NX;
 271
 272        /*
 273         * The .rodata section needs to be read-only. Using the pfn
 274         * catches all aliases.
 275         */
 276        if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
 277                   __pa_symbol(__end_rodata) >> PAGE_SHIFT))
 278                pgprot_val(forbidden) |= _PAGE_RW;
 279
 280#if defined(CONFIG_X86_64)
 281        /*
 282         * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
 283         * kernel text mappings for the large page aligned text, rodata sections
 284         * will be always read-only. For the kernel identity mappings covering
 285         * the holes caused by this alignment can be anything that user asks.
 286         *
 287         * This will preserve the large page mappings for kernel text/data
 288         * at no extra cost.
 289         */
 290        if (kernel_set_to_readonly &&
 291            within(address, (unsigned long)_text,
 292                   (unsigned long)__end_rodata_hpage_align)) {
 293                unsigned int level;
 294
 295                /*
 296                 * Don't enforce the !RW mapping for the kernel text mapping,
 297                 * if the current mapping is already using small page mapping.
 298                 * No need to work hard to preserve large page mappings in this
 299                 * case.
 300                 *
 301                 * This also fixes the Linux Xen paravirt guest boot failure
 302                 * (because of unexpected read-only mappings for kernel identity
 303                 * mappings). In this paravirt guest case, the kernel text
 304                 * mapping and the kernel identity mapping share the same
 305                 * page-table pages. Thus we can't really use different
 306                 * protections for the kernel text and identity mappings. Also,
 307                 * these shared mappings are made of small page mappings.
 308                 * Thus this don't enforce !RW mapping for small page kernel
 309                 * text mapping logic will help Linux Xen parvirt guest boot
 310                 * as well.
 311                 */
 312                if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
 313                        pgprot_val(forbidden) |= _PAGE_RW;
 314        }
 315#endif
 316
 317        prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 318
 319        return prot;
 320}
 321
 322/*
 323 * Lookup the page table entry for a virtual address in a specific pgd.
 324 * Return a pointer to the entry and the level of the mapping.
 325 */
 326pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
 327                             unsigned int *level)
 328{
 329        pud_t *pud;
 330        pmd_t *pmd;
 331
 332        *level = PG_LEVEL_NONE;
 333
 334        if (pgd_none(*pgd))
 335                return NULL;
 336
 337        pud = pud_offset(pgd, address);
 338        if (pud_none(*pud))
 339                return NULL;
 340
 341        *level = PG_LEVEL_1G;
 342        if (pud_large(*pud) || !pud_present(*pud))
 343                return (pte_t *)pud;
 344
 345        pmd = pmd_offset(pud, address);
 346        if (pmd_none(*pmd))
 347                return NULL;
 348
 349        *level = PG_LEVEL_2M;
 350        if (pmd_large(*pmd) || !pmd_present(*pmd))
 351                return (pte_t *)pmd;
 352
 353        *level = PG_LEVEL_4K;
 354
 355        return pte_offset_kernel(pmd, address);
 356}
 357
 358/*
 359 * Lookup the page table entry for a virtual address. Return a pointer
 360 * to the entry and the level of the mapping.
 361 *
 362 * Note: We return pud and pmd either when the entry is marked large
 363 * or when the present bit is not set. Otherwise we would return a
 364 * pointer to a nonexisting mapping.
 365 */
 366pte_t *lookup_address(unsigned long address, unsigned int *level)
 367{
 368        return lookup_address_in_pgd(pgd_offset_k(address), address, level);
 369}
 370EXPORT_SYMBOL_GPL(lookup_address);
 371
 372static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
 373                                  unsigned int *level)
 374{
 375        if (cpa->pgd)
 376                return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
 377                                               address, level);
 378
 379        return lookup_address(address, level);
 380}
 381
 382/*
 383 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
 384 * or NULL if not present.
 385 */
 386pmd_t *lookup_pmd_address(unsigned long address)
 387{
 388        pgd_t *pgd;
 389        pud_t *pud;
 390
 391        pgd = pgd_offset_k(address);
 392        if (pgd_none(*pgd))
 393                return NULL;
 394
 395        pud = pud_offset(pgd, address);
 396        if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
 397                return NULL;
 398
 399        return pmd_offset(pud, address);
 400}
 401
 402/*
 403 * This is necessary because __pa() does not work on some
 404 * kinds of memory, like vmalloc() or the alloc_remap()
 405 * areas on 32-bit NUMA systems.  The percpu areas can
 406 * end up in this kind of memory, for instance.
 407 *
 408 * This could be optimized, but it is only intended to be
 409 * used at inititalization time, and keeping it
 410 * unoptimized should increase the testing coverage for
 411 * the more obscure platforms.
 412 */
 413phys_addr_t slow_virt_to_phys(void *__virt_addr)
 414{
 415        unsigned long virt_addr = (unsigned long)__virt_addr;
 416        phys_addr_t phys_addr;
 417        unsigned long offset;
 418        enum pg_level level;
 419        pte_t *pte;
 420
 421        pte = lookup_address(virt_addr, &level);
 422        BUG_ON(!pte);
 423
 424        /*
 425         * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
 426         * before being left-shifted PAGE_SHIFT bits -- this trick is to
 427         * make 32-PAE kernel work correctly.
 428         */
 429        switch (level) {
 430        case PG_LEVEL_1G:
 431                phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
 432                offset = virt_addr & ~PUD_PAGE_MASK;
 433                break;
 434        case PG_LEVEL_2M:
 435                phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
 436                offset = virt_addr & ~PMD_PAGE_MASK;
 437                break;
 438        default:
 439                phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
 440                offset = virt_addr & ~PAGE_MASK;
 441        }
 442
 443        return (phys_addr_t)(phys_addr | offset);
 444}
 445EXPORT_SYMBOL_GPL(slow_virt_to_phys);
 446
 447/*
 448 * Set the new pmd in all the pgds we know about:
 449 */
 450static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
 451{
 452        /* change init_mm */
 453        set_pte_atomic(kpte, pte);
 454#ifdef CONFIG_X86_32
 455        if (!SHARED_KERNEL_PMD) {
 456                struct page *page;
 457
 458                list_for_each_entry(page, &pgd_list, lru) {
 459                        pgd_t *pgd;
 460                        pud_t *pud;
 461                        pmd_t *pmd;
 462
 463                        pgd = (pgd_t *)page_address(page) + pgd_index(address);
 464                        pud = pud_offset(pgd, address);
 465                        pmd = pmd_offset(pud, address);
 466                        set_pte_atomic((pte_t *)pmd, pte);
 467                }
 468        }
 469#endif
 470}
 471
 472static int
 473try_preserve_large_page(pte_t *kpte, unsigned long address,
 474                        struct cpa_data *cpa)
 475{
 476        unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
 477        pte_t new_pte, old_pte, *tmp;
 478        pgprot_t old_prot, new_prot, req_prot;
 479        int i, do_split = 1;
 480        enum pg_level level;
 481
 482        if (cpa->force_split)
 483                return 1;
 484
 485        spin_lock(&pgd_lock);
 486        /*
 487         * Check for races, another CPU might have split this page
 488         * up already:
 489         */
 490        tmp = _lookup_address_cpa(cpa, address, &level);
 491        if (tmp != kpte)
 492                goto out_unlock;
 493
 494        switch (level) {
 495        case PG_LEVEL_2M:
 496                old_prot = pmd_pgprot(*(pmd_t *)kpte);
 497                old_pfn = pmd_pfn(*(pmd_t *)kpte);
 498                break;
 499        case PG_LEVEL_1G:
 500                old_prot = pud_pgprot(*(pud_t *)kpte);
 501                old_pfn = pud_pfn(*(pud_t *)kpte);
 502                break;
 503        default:
 504                do_split = -EINVAL;
 505                goto out_unlock;
 506        }
 507
 508        psize = page_level_size(level);
 509        pmask = page_level_mask(level);
 510
 511        /*
 512         * Calculate the number of pages, which fit into this large
 513         * page starting at address:
 514         */
 515        nextpage_addr = (address + psize) & pmask;
 516        numpages = (nextpage_addr - address) >> PAGE_SHIFT;
 517        if (numpages < cpa->numpages)
 518                cpa->numpages = numpages;
 519
 520        /*
 521         * We are safe now. Check whether the new pgprot is the same:
 522         * Convert protection attributes to 4k-format, as cpa->mask* are set
 523         * up accordingly.
 524         */
 525        old_pte = *kpte;
 526        req_prot = pgprot_large_2_4k(old_prot);
 527
 528        pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
 529        pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
 530
 531        /*
 532         * req_prot is in format of 4k pages. It must be converted to large
 533         * page format: the caching mode includes the PAT bit located at
 534         * different bit positions in the two formats.
 535         */
 536        req_prot = pgprot_4k_2_large(req_prot);
 537
 538        /*
 539         * Set the PSE and GLOBAL flags only if the PRESENT flag is
 540         * set otherwise pmd_present/pmd_huge will return true even on
 541         * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
 542         * for the ancient hardware that doesn't support it.
 543         */
 544        if (pgprot_val(req_prot) & _PAGE_PRESENT)
 545                pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
 546        else
 547                pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
 548
 549        req_prot = canon_pgprot(req_prot);
 550
 551        /*
 552         * old_pfn points to the large page base pfn. So we need
 553         * to add the offset of the virtual address:
 554         */
 555        pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
 556        cpa->pfn = pfn;
 557
 558        new_prot = static_protections(req_prot, address, pfn);
 559
 560        /*
 561         * We need to check the full range, whether
 562         * static_protection() requires a different pgprot for one of
 563         * the pages in the range we try to preserve:
 564         */
 565        addr = address & pmask;
 566        pfn = old_pfn;
 567        for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
 568                pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
 569
 570                if (pgprot_val(chk_prot) != pgprot_val(new_prot))
 571                        goto out_unlock;
 572        }
 573
 574        /*
 575         * If there are no changes, return. maxpages has been updated
 576         * above:
 577         */
 578        if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
 579                do_split = 0;
 580                goto out_unlock;
 581        }
 582
 583        /*
 584         * We need to change the attributes. Check, whether we can
 585         * change the large page in one go. We request a split, when
 586         * the address is not aligned and the number of pages is
 587         * smaller than the number of pages in the large page. Note
 588         * that we limited the number of possible pages already to
 589         * the number of pages in the large page.
 590         */
 591        if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
 592                /*
 593                 * The address is aligned and the number of pages
 594                 * covers the full page.
 595                 */
 596                new_pte = pfn_pte(old_pfn, new_prot);
 597                __set_pmd_pte(kpte, address, new_pte);
 598                cpa->flags |= CPA_FLUSHTLB;
 599                do_split = 0;
 600        }
 601
 602out_unlock:
 603        spin_unlock(&pgd_lock);
 604
 605        return do_split;
 606}
 607
 608static int
 609__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
 610                   struct page *base)
 611{
 612        pte_t *pbase = (pte_t *)page_address(base);
 613        unsigned long ref_pfn, pfn, pfninc = 1;
 614        unsigned int i, level;
 615        pte_t *tmp;
 616        pgprot_t ref_prot;
 617
 618        spin_lock(&pgd_lock);
 619        /*
 620         * Check for races, another CPU might have split this page
 621         * up for us already:
 622         */
 623        tmp = _lookup_address_cpa(cpa, address, &level);
 624        if (tmp != kpte) {
 625                spin_unlock(&pgd_lock);
 626                return 1;
 627        }
 628
 629        paravirt_alloc_pte(&init_mm, page_to_pfn(base));
 630
 631        switch (level) {
 632        case PG_LEVEL_2M:
 633                ref_prot = pmd_pgprot(*(pmd_t *)kpte);
 634                /* clear PSE and promote PAT bit to correct position */
 635                ref_prot = pgprot_large_2_4k(ref_prot);
 636                ref_pfn = pmd_pfn(*(pmd_t *)kpte);
 637                break;
 638
 639        case PG_LEVEL_1G:
 640                ref_prot = pud_pgprot(*(pud_t *)kpte);
 641                ref_pfn = pud_pfn(*(pud_t *)kpte);
 642                pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
 643
 644                /*
 645                 * Clear the PSE flags if the PRESENT flag is not set
 646                 * otherwise pmd_present/pmd_huge will return true
 647                 * even on a non present pmd.
 648                 */
 649                if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
 650                        pgprot_val(ref_prot) &= ~_PAGE_PSE;
 651                break;
 652
 653        default:
 654                spin_unlock(&pgd_lock);
 655                return 1;
 656        }
 657
 658        /*
 659         * Set the GLOBAL flags only if the PRESENT flag is set
 660         * otherwise pmd/pte_present will return true even on a non
 661         * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
 662         * for the ancient hardware that doesn't support it.
 663         */
 664        if (pgprot_val(ref_prot) & _PAGE_PRESENT)
 665                pgprot_val(ref_prot) |= _PAGE_GLOBAL;
 666        else
 667                pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
 668
 669        /*
 670         * Get the target pfn from the original entry:
 671         */
 672        pfn = ref_pfn;
 673        for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
 674                set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
 675
 676        if (virt_addr_valid(address)) {
 677                unsigned long pfn = PFN_DOWN(__pa(address));
 678
 679                if (pfn_range_is_mapped(pfn, pfn + 1))
 680                        split_page_count(level);
 681        }
 682
 683        /*
 684         * Install the new, split up pagetable.
 685         *
 686         * We use the standard kernel pagetable protections for the new
 687         * pagetable protections, the actual ptes set above control the
 688         * primary protection behavior:
 689         */
 690        __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
 691
 692        /*
 693         * Intel Atom errata AAH41 workaround.
 694         *
 695         * The real fix should be in hw or in a microcode update, but
 696         * we also probabilistically try to reduce the window of having
 697         * a large TLB mixed with 4K TLBs while instruction fetches are
 698         * going on.
 699         */
 700        __flush_tlb_all();
 701        spin_unlock(&pgd_lock);
 702
 703        return 0;
 704}
 705
 706static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
 707                            unsigned long address)
 708{
 709        struct page *base;
 710
 711        if (!debug_pagealloc_enabled())
 712                spin_unlock(&cpa_lock);
 713        base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
 714        if (!debug_pagealloc_enabled())
 715                spin_lock(&cpa_lock);
 716        if (!base)
 717                return -ENOMEM;
 718
 719        if (__split_large_page(cpa, kpte, address, base))
 720                __free_page(base);
 721
 722        return 0;
 723}
 724
 725static bool try_to_free_pte_page(pte_t *pte)
 726{
 727        int i;
 728
 729        for (i = 0; i < PTRS_PER_PTE; i++)
 730                if (!pte_none(pte[i]))
 731                        return false;
 732
 733        free_page((unsigned long)pte);
 734        return true;
 735}
 736
 737static bool try_to_free_pmd_page(pmd_t *pmd)
 738{
 739        int i;
 740
 741        for (i = 0; i < PTRS_PER_PMD; i++)
 742                if (!pmd_none(pmd[i]))
 743                        return false;
 744
 745        free_page((unsigned long)pmd);
 746        return true;
 747}
 748
 749static bool try_to_free_pud_page(pud_t *pud)
 750{
 751        int i;
 752
 753        for (i = 0; i < PTRS_PER_PUD; i++)
 754                if (!pud_none(pud[i]))
 755                        return false;
 756
 757        free_page((unsigned long)pud);
 758        return true;
 759}
 760
 761static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
 762{
 763        pte_t *pte = pte_offset_kernel(pmd, start);
 764
 765        while (start < end) {
 766                set_pte(pte, __pte(0));
 767
 768                start += PAGE_SIZE;
 769                pte++;
 770        }
 771
 772        if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
 773                pmd_clear(pmd);
 774                return true;
 775        }
 776        return false;
 777}
 778
 779static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
 780                              unsigned long start, unsigned long end)
 781{
 782        if (unmap_pte_range(pmd, start, end))
 783                if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
 784                        pud_clear(pud);
 785}
 786
 787static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
 788{
 789        pmd_t *pmd = pmd_offset(pud, start);
 790
 791        /*
 792         * Not on a 2MB page boundary?
 793         */
 794        if (start & (PMD_SIZE - 1)) {
 795                unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
 796                unsigned long pre_end = min_t(unsigned long, end, next_page);
 797
 798                __unmap_pmd_range(pud, pmd, start, pre_end);
 799
 800                start = pre_end;
 801                pmd++;
 802        }
 803
 804        /*
 805         * Try to unmap in 2M chunks.
 806         */
 807        while (end - start >= PMD_SIZE) {
 808                if (pmd_large(*pmd))
 809                        pmd_clear(pmd);
 810                else
 811                        __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
 812
 813                start += PMD_SIZE;
 814                pmd++;
 815        }
 816
 817        /*
 818         * 4K leftovers?
 819         */
 820        if (start < end)
 821                return __unmap_pmd_range(pud, pmd, start, end);
 822
 823        /*
 824         * Try again to free the PMD page if haven't succeeded above.
 825         */
 826        if (!pud_none(*pud))
 827                if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
 828                        pud_clear(pud);
 829}
 830
 831static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
 832{
 833        pud_t *pud = pud_offset(pgd, start);
 834
 835        /*
 836         * Not on a GB page boundary?
 837         */
 838        if (start & (PUD_SIZE - 1)) {
 839                unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
 840                unsigned long pre_end   = min_t(unsigned long, end, next_page);
 841
 842                unmap_pmd_range(pud, start, pre_end);
 843
 844                start = pre_end;
 845                pud++;
 846        }
 847
 848        /*
 849         * Try to unmap in 1G chunks?
 850         */
 851        while (end - start >= PUD_SIZE) {
 852
 853                if (pud_large(*pud))
 854                        pud_clear(pud);
 855                else
 856                        unmap_pmd_range(pud, start, start + PUD_SIZE);
 857
 858                start += PUD_SIZE;
 859                pud++;
 860        }
 861
 862        /*
 863         * 2M leftovers?
 864         */
 865        if (start < end)
 866                unmap_pmd_range(pud, start, end);
 867
 868        /*
 869         * No need to try to free the PUD page because we'll free it in
 870         * populate_pgd's error path
 871         */
 872}
 873
 874static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
 875{
 876        pgd_t *pgd_entry = root + pgd_index(addr);
 877
 878        unmap_pud_range(pgd_entry, addr, end);
 879
 880        if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
 881                pgd_clear(pgd_entry);
 882}
 883
 884static int alloc_pte_page(pmd_t *pmd)
 885{
 886        pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
 887        if (!pte)
 888                return -1;
 889
 890        set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
 891        return 0;
 892}
 893
 894static int alloc_pmd_page(pud_t *pud)
 895{
 896        pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
 897        if (!pmd)
 898                return -1;
 899
 900        set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
 901        return 0;
 902}
 903
 904static void populate_pte(struct cpa_data *cpa,
 905                         unsigned long start, unsigned long end,
 906                         unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
 907{
 908        pte_t *pte;
 909
 910        pte = pte_offset_kernel(pmd, start);
 911
 912        /*
 913         * Set the GLOBAL flags only if the PRESENT flag is
 914         * set otherwise pte_present will return true even on
 915         * a non present pte. The canon_pgprot will clear
 916         * _PAGE_GLOBAL for the ancient hardware that doesn't
 917         * support it.
 918         */
 919        if (pgprot_val(pgprot) & _PAGE_PRESENT)
 920                pgprot_val(pgprot) |= _PAGE_GLOBAL;
 921        else
 922                pgprot_val(pgprot) &= ~_PAGE_GLOBAL;
 923
 924        pgprot = canon_pgprot(pgprot);
 925
 926        while (num_pages-- && start < end) {
 927                set_pte(pte, pfn_pte(cpa->pfn, pgprot));
 928
 929                start    += PAGE_SIZE;
 930                cpa->pfn++;
 931                pte++;
 932        }
 933}
 934
 935static int populate_pmd(struct cpa_data *cpa,
 936                        unsigned long start, unsigned long end,
 937                        unsigned num_pages, pud_t *pud, pgprot_t pgprot)
 938{
 939        unsigned int cur_pages = 0;
 940        pmd_t *pmd;
 941        pgprot_t pmd_pgprot;
 942
 943        /*
 944         * Not on a 2M boundary?
 945         */
 946        if (start & (PMD_SIZE - 1)) {
 947                unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
 948                unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
 949
 950                pre_end   = min_t(unsigned long, pre_end, next_page);
 951                cur_pages = (pre_end - start) >> PAGE_SHIFT;
 952                cur_pages = min_t(unsigned int, num_pages, cur_pages);
 953
 954                /*
 955                 * Need a PTE page?
 956                 */
 957                pmd = pmd_offset(pud, start);
 958                if (pmd_none(*pmd))
 959                        if (alloc_pte_page(pmd))
 960                                return -1;
 961
 962                populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
 963
 964                start = pre_end;
 965        }
 966
 967        /*
 968         * We mapped them all?
 969         */
 970        if (num_pages == cur_pages)
 971                return cur_pages;
 972
 973        pmd_pgprot = pgprot_4k_2_large(pgprot);
 974
 975        while (end - start >= PMD_SIZE) {
 976
 977                /*
 978                 * We cannot use a 1G page so allocate a PMD page if needed.
 979                 */
 980                if (pud_none(*pud))
 981                        if (alloc_pmd_page(pud))
 982                                return -1;
 983
 984                pmd = pmd_offset(pud, start);
 985
 986                set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
 987                                   massage_pgprot(pmd_pgprot)));
 988
 989                start     += PMD_SIZE;
 990                cpa->pfn  += PMD_SIZE >> PAGE_SHIFT;
 991                cur_pages += PMD_SIZE >> PAGE_SHIFT;
 992        }
 993
 994        /*
 995         * Map trailing 4K pages.
 996         */
 997        if (start < end) {
 998                pmd = pmd_offset(pud, start);
 999                if (pmd_none(*pmd))
1000                        if (alloc_pte_page(pmd))
1001                                return -1;
1002
1003                populate_pte(cpa, start, end, num_pages - cur_pages,
1004                             pmd, pgprot);
1005        }
1006        return num_pages;
1007}
1008
1009static int populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
1010                        pgprot_t pgprot)
1011{
1012        pud_t *pud;
1013        unsigned long end;
1014        int cur_pages = 0;
1015        pgprot_t pud_pgprot;
1016
1017        end = start + (cpa->numpages << PAGE_SHIFT);
1018
1019        /*
1020         * Not on a Gb page boundary? => map everything up to it with
1021         * smaller pages.
1022         */
1023        if (start & (PUD_SIZE - 1)) {
1024                unsigned long pre_end;
1025                unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1026
1027                pre_end   = min_t(unsigned long, end, next_page);
1028                cur_pages = (pre_end - start) >> PAGE_SHIFT;
1029                cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1030
1031                pud = pud_offset(pgd, start);
1032
1033                /*
1034                 * Need a PMD page?
1035                 */
1036                if (pud_none(*pud))
1037                        if (alloc_pmd_page(pud))
1038                                return -1;
1039
1040                cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1041                                         pud, pgprot);
1042                if (cur_pages < 0)
1043                        return cur_pages;
1044
1045                start = pre_end;
1046        }
1047
1048        /* We mapped them all? */
1049        if (cpa->numpages == cur_pages)
1050                return cur_pages;
1051
1052        pud = pud_offset(pgd, start);
1053        pud_pgprot = pgprot_4k_2_large(pgprot);
1054
1055        /*
1056         * Map everything starting from the Gb boundary, possibly with 1G pages
1057         */
1058        while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1059                set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1060                                   massage_pgprot(pud_pgprot)));
1061
1062                start     += PUD_SIZE;
1063                cpa->pfn  += PUD_SIZE >> PAGE_SHIFT;
1064                cur_pages += PUD_SIZE >> PAGE_SHIFT;
1065                pud++;
1066        }
1067
1068        /* Map trailing leftover */
1069        if (start < end) {
1070                int tmp;
1071
1072                pud = pud_offset(pgd, start);
1073                if (pud_none(*pud))
1074                        if (alloc_pmd_page(pud))
1075                                return -1;
1076
1077                tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1078                                   pud, pgprot);
1079                if (tmp < 0)
1080                        return cur_pages;
1081
1082                cur_pages += tmp;
1083        }
1084        return cur_pages;
1085}
1086
1087/*
1088 * Restrictions for kernel page table do not necessarily apply when mapping in
1089 * an alternate PGD.
1090 */
1091static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1092{
1093        pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1094        pud_t *pud = NULL;      /* shut up gcc */
1095        pgd_t *pgd_entry;
1096        int ret;
1097
1098        pgd_entry = cpa->pgd + pgd_index(addr);
1099
1100        /*
1101         * Allocate a PUD page and hand it down for mapping.
1102         */
1103        if (pgd_none(*pgd_entry)) {
1104                pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1105                if (!pud)
1106                        return -1;
1107
1108                set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
1109        }
1110
1111        pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1112        pgprot_val(pgprot) |=  pgprot_val(cpa->mask_set);
1113
1114        ret = populate_pud(cpa, addr, pgd_entry, pgprot);
1115        if (ret < 0) {
1116                unmap_pgd_range(cpa->pgd, addr,
1117                                addr + (cpa->numpages << PAGE_SHIFT));
1118                return ret;
1119        }
1120
1121        cpa->numpages = ret;
1122        return 0;
1123}
1124
1125static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1126                               int primary)
1127{
1128        if (cpa->pgd) {
1129                /*
1130                 * Right now, we only execute this code path when mapping
1131                 * the EFI virtual memory map regions, no other users
1132                 * provide a ->pgd value. This may change in the future.
1133                 */
1134                return populate_pgd(cpa, vaddr);
1135        }
1136
1137        /*
1138         * Ignore all non primary paths.
1139         */
1140        if (!primary) {
1141                cpa->numpages = 1;
1142                return 0;
1143        }
1144
1145        /*
1146         * Ignore the NULL PTE for kernel identity mapping, as it is expected
1147         * to have holes.
1148         * Also set numpages to '1' indicating that we processed cpa req for
1149         * one virtual address page and its pfn. TBD: numpages can be set based
1150         * on the initial value and the level returned by lookup_address().
1151         */
1152        if (within(vaddr, PAGE_OFFSET,
1153                   PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1154                cpa->numpages = 1;
1155                cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1156                return 0;
1157        } else {
1158                WARN(1, KERN_WARNING "CPA: called for zero pte. "
1159                        "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1160                        *cpa->vaddr);
1161
1162                return -EFAULT;
1163        }
1164}
1165
1166static int __change_page_attr(struct cpa_data *cpa, int primary)
1167{
1168        unsigned long address;
1169        int do_split, err;
1170        unsigned int level;
1171        pte_t *kpte, old_pte;
1172
1173        if (cpa->flags & CPA_PAGES_ARRAY) {
1174                struct page *page = cpa->pages[cpa->curpage];
1175                if (unlikely(PageHighMem(page)))
1176                        return 0;
1177                address = (unsigned long)page_address(page);
1178        } else if (cpa->flags & CPA_ARRAY)
1179                address = cpa->vaddr[cpa->curpage];
1180        else
1181                address = *cpa->vaddr;
1182repeat:
1183        kpte = _lookup_address_cpa(cpa, address, &level);
1184        if (!kpte)
1185                return __cpa_process_fault(cpa, address, primary);
1186
1187        old_pte = *kpte;
1188        if (!pte_val(old_pte))
1189                return __cpa_process_fault(cpa, address, primary);
1190
1191        if (level == PG_LEVEL_4K) {
1192                pte_t new_pte;
1193                pgprot_t new_prot = pte_pgprot(old_pte);
1194                unsigned long pfn = pte_pfn(old_pte);
1195
1196                pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1197                pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1198
1199                new_prot = static_protections(new_prot, address, pfn);
1200
1201                /*
1202                 * Set the GLOBAL flags only if the PRESENT flag is
1203                 * set otherwise pte_present will return true even on
1204                 * a non present pte. The canon_pgprot will clear
1205                 * _PAGE_GLOBAL for the ancient hardware that doesn't
1206                 * support it.
1207                 */
1208                if (pgprot_val(new_prot) & _PAGE_PRESENT)
1209                        pgprot_val(new_prot) |= _PAGE_GLOBAL;
1210                else
1211                        pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1212
1213                /*
1214                 * We need to keep the pfn from the existing PTE,
1215                 * after all we're only going to change it's attributes
1216                 * not the memory it points to
1217                 */
1218                new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1219                cpa->pfn = pfn;
1220                /*
1221                 * Do we really change anything ?
1222                 */
1223                if (pte_val(old_pte) != pte_val(new_pte)) {
1224                        set_pte_atomic(kpte, new_pte);
1225                        cpa->flags |= CPA_FLUSHTLB;
1226                }
1227                cpa->numpages = 1;
1228                return 0;
1229        }
1230
1231        /*
1232         * Check, whether we can keep the large page intact
1233         * and just change the pte:
1234         */
1235        do_split = try_preserve_large_page(kpte, address, cpa);
1236        /*
1237         * When the range fits into the existing large page,
1238         * return. cp->numpages and cpa->tlbflush have been updated in
1239         * try_large_page:
1240         */
1241        if (do_split <= 0)
1242                return do_split;
1243
1244        /*
1245         * We have to split the large page:
1246         */
1247        err = split_large_page(cpa, kpte, address);
1248        if (!err) {
1249                /*
1250                 * Do a global flush tlb after splitting the large page
1251                 * and before we do the actual change page attribute in the PTE.
1252                 *
1253                 * With out this, we violate the TLB application note, that says
1254                 * "The TLBs may contain both ordinary and large-page
1255                 *  translations for a 4-KByte range of linear addresses. This
1256                 *  may occur if software modifies the paging structures so that
1257                 *  the page size used for the address range changes. If the two
1258                 *  translations differ with respect to page frame or attributes
1259                 *  (e.g., permissions), processor behavior is undefined and may
1260                 *  be implementation-specific."
1261                 *
1262                 * We do this global tlb flush inside the cpa_lock, so that we
1263                 * don't allow any other cpu, with stale tlb entries change the
1264                 * page attribute in parallel, that also falls into the
1265                 * just split large page entry.
1266                 */
1267                flush_tlb_all();
1268                goto repeat;
1269        }
1270
1271        return err;
1272}
1273
1274static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1275
1276static int cpa_process_alias(struct cpa_data *cpa)
1277{
1278        struct cpa_data alias_cpa;
1279        unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1280        unsigned long vaddr;
1281        int ret;
1282
1283        if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1284                return 0;
1285
1286        /*
1287         * No need to redo, when the primary call touched the direct
1288         * mapping already:
1289         */
1290        if (cpa->flags & CPA_PAGES_ARRAY) {
1291                struct page *page = cpa->pages[cpa->curpage];
1292                if (unlikely(PageHighMem(page)))
1293                        return 0;
1294                vaddr = (unsigned long)page_address(page);
1295        } else if (cpa->flags & CPA_ARRAY)
1296                vaddr = cpa->vaddr[cpa->curpage];
1297        else
1298                vaddr = *cpa->vaddr;
1299
1300        if (!(within(vaddr, PAGE_OFFSET,
1301                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1302
1303                alias_cpa = *cpa;
1304                alias_cpa.vaddr = &laddr;
1305                alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1306
1307                ret = __change_page_attr_set_clr(&alias_cpa, 0);
1308                if (ret)
1309                        return ret;
1310        }
1311
1312#ifdef CONFIG_X86_64
1313        /*
1314         * If the primary call didn't touch the high mapping already
1315         * and the physical address is inside the kernel map, we need
1316         * to touch the high mapped kernel as well:
1317         */
1318        if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1319            within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
1320                unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1321                                               __START_KERNEL_map - phys_base;
1322                alias_cpa = *cpa;
1323                alias_cpa.vaddr = &temp_cpa_vaddr;
1324                alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1325
1326                /*
1327                 * The high mapping range is imprecise, so ignore the
1328                 * return value.
1329                 */
1330                __change_page_attr_set_clr(&alias_cpa, 0);
1331        }
1332#endif
1333
1334        return 0;
1335}
1336
1337static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1338{
1339        int ret, numpages = cpa->numpages;
1340
1341        while (numpages) {
1342                /*
1343                 * Store the remaining nr of pages for the large page
1344                 * preservation check.
1345                 */
1346                cpa->numpages = numpages;
1347                /* for array changes, we can't use large page */
1348                if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1349                        cpa->numpages = 1;
1350
1351                if (!debug_pagealloc_enabled())
1352                        spin_lock(&cpa_lock);
1353                ret = __change_page_attr(cpa, checkalias);
1354                if (!debug_pagealloc_enabled())
1355                        spin_unlock(&cpa_lock);
1356                if (ret)
1357                        return ret;
1358
1359                if (checkalias) {
1360                        ret = cpa_process_alias(cpa);
1361                        if (ret)
1362                                return ret;
1363                }
1364
1365                /*
1366                 * Adjust the number of pages with the result of the
1367                 * CPA operation. Either a large page has been
1368                 * preserved or a single page update happened.
1369                 */
1370                BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1371                numpages -= cpa->numpages;
1372                if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1373                        cpa->curpage++;
1374                else
1375                        *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1376
1377        }
1378        return 0;
1379}
1380
1381static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1382                                    pgprot_t mask_set, pgprot_t mask_clr,
1383                                    int force_split, int in_flag,
1384                                    struct page **pages)
1385{
1386        struct cpa_data cpa;
1387        int ret, cache, checkalias;
1388        unsigned long baddr = 0;
1389
1390        memset(&cpa, 0, sizeof(cpa));
1391
1392        /*
1393         * Check, if we are requested to change a not supported
1394         * feature:
1395         */
1396        mask_set = canon_pgprot(mask_set);
1397        mask_clr = canon_pgprot(mask_clr);
1398        if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1399                return 0;
1400
1401        /* Ensure we are PAGE_SIZE aligned */
1402        if (in_flag & CPA_ARRAY) {
1403                int i;
1404                for (i = 0; i < numpages; i++) {
1405                        if (addr[i] & ~PAGE_MASK) {
1406                                addr[i] &= PAGE_MASK;
1407                                WARN_ON_ONCE(1);
1408                        }
1409                }
1410        } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1411                /*
1412                 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1413                 * No need to cehck in that case
1414                 */
1415                if (*addr & ~PAGE_MASK) {
1416                        *addr &= PAGE_MASK;
1417                        /*
1418                         * People should not be passing in unaligned addresses:
1419                         */
1420                        WARN_ON_ONCE(1);
1421                }
1422                /*
1423                 * Save address for cache flush. *addr is modified in the call
1424                 * to __change_page_attr_set_clr() below.
1425                 */
1426                baddr = *addr;
1427        }
1428
1429        /* Must avoid aliasing mappings in the highmem code */
1430        kmap_flush_unused();
1431
1432        vm_unmap_aliases();
1433
1434        cpa.vaddr = addr;
1435        cpa.pages = pages;
1436        cpa.numpages = numpages;
1437        cpa.mask_set = mask_set;
1438        cpa.mask_clr = mask_clr;
1439        cpa.flags = 0;
1440        cpa.curpage = 0;
1441        cpa.force_split = force_split;
1442
1443        if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1444                cpa.flags |= in_flag;
1445
1446        /* No alias checking for _NX bit modifications */
1447        checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1448
1449        ret = __change_page_attr_set_clr(&cpa, checkalias);
1450
1451        /*
1452         * Check whether we really changed something:
1453         */
1454        if (!(cpa.flags & CPA_FLUSHTLB))
1455                goto out;
1456
1457        /*
1458         * No need to flush, when we did not set any of the caching
1459         * attributes:
1460         */
1461        cache = !!pgprot2cachemode(mask_set);
1462
1463        /*
1464         * On success we use CLFLUSH, when the CPU supports it to
1465         * avoid the WBINVD. If the CPU does not support it and in the
1466         * error case we fall back to cpa_flush_all (which uses
1467         * WBINVD):
1468         */
1469        if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1470                if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1471                        cpa_flush_array(addr, numpages, cache,
1472                                        cpa.flags, pages);
1473                } else
1474                        cpa_flush_range(baddr, numpages, cache);
1475        } else
1476                cpa_flush_all(cache);
1477
1478out:
1479        return ret;
1480}
1481
1482static inline int change_page_attr_set(unsigned long *addr, int numpages,
1483                                       pgprot_t mask, int array)
1484{
1485        return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1486                (array ? CPA_ARRAY : 0), NULL);
1487}
1488
1489static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1490                                         pgprot_t mask, int array)
1491{
1492        return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1493                (array ? CPA_ARRAY : 0), NULL);
1494}
1495
1496static inline int cpa_set_pages_array(struct page **pages, int numpages,
1497                                       pgprot_t mask)
1498{
1499        return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1500                CPA_PAGES_ARRAY, pages);
1501}
1502
1503static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1504                                         pgprot_t mask)
1505{
1506        return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1507                CPA_PAGES_ARRAY, pages);
1508}
1509
1510int _set_memory_uc(unsigned long addr, int numpages)
1511{
1512        /*
1513         * for now UC MINUS. see comments in ioremap_nocache()
1514         * If you really need strong UC use ioremap_uc(), but note
1515         * that you cannot override IO areas with set_memory_*() as
1516         * these helpers cannot work with IO memory.
1517         */
1518        return change_page_attr_set(&addr, numpages,
1519                                    cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1520                                    0);
1521}
1522
1523int set_memory_uc(unsigned long addr, int numpages)
1524{
1525        int ret;
1526
1527        /*
1528         * for now UC MINUS. see comments in ioremap_nocache()
1529         */
1530        ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1531                              _PAGE_CACHE_MODE_UC_MINUS, NULL);
1532        if (ret)
1533                goto out_err;
1534
1535        ret = _set_memory_uc(addr, numpages);
1536        if (ret)
1537                goto out_free;
1538
1539        return 0;
1540
1541out_free:
1542        free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1543out_err:
1544        return ret;
1545}
1546EXPORT_SYMBOL(set_memory_uc);
1547
1548static int _set_memory_array(unsigned long *addr, int addrinarray,
1549                enum page_cache_mode new_type)
1550{
1551        enum page_cache_mode set_type;
1552        int i, j;
1553        int ret;
1554
1555        for (i = 0; i < addrinarray; i++) {
1556                ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1557                                        new_type, NULL);
1558                if (ret)
1559                        goto out_free;
1560        }
1561
1562        /* If WC, set to UC- first and then WC */
1563        set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1564                                _PAGE_CACHE_MODE_UC_MINUS : new_type;
1565
1566        ret = change_page_attr_set(addr, addrinarray,
1567                                   cachemode2pgprot(set_type), 1);
1568
1569        if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1570                ret = change_page_attr_set_clr(addr, addrinarray,
1571                                               cachemode2pgprot(
1572                                                _PAGE_CACHE_MODE_WC),
1573                                               __pgprot(_PAGE_CACHE_MASK),
1574                                               0, CPA_ARRAY, NULL);
1575        if (ret)
1576                goto out_free;
1577
1578        return 0;
1579
1580out_free:
1581        for (j = 0; j < i; j++)
1582                free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1583
1584        return ret;
1585}
1586
1587int set_memory_array_uc(unsigned long *addr, int addrinarray)
1588{
1589        return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1590}
1591EXPORT_SYMBOL(set_memory_array_uc);
1592
1593int set_memory_array_wc(unsigned long *addr, int addrinarray)
1594{
1595        return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1596}
1597EXPORT_SYMBOL(set_memory_array_wc);
1598
1599int set_memory_array_wt(unsigned long *addr, int addrinarray)
1600{
1601        return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1602}
1603EXPORT_SYMBOL_GPL(set_memory_array_wt);
1604
1605int _set_memory_wc(unsigned long addr, int numpages)
1606{
1607        int ret;
1608        unsigned long addr_copy = addr;
1609
1610        ret = change_page_attr_set(&addr, numpages,
1611                                   cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1612                                   0);
1613        if (!ret) {
1614                ret = change_page_attr_set_clr(&addr_copy, numpages,
1615                                               cachemode2pgprot(
1616                                                _PAGE_CACHE_MODE_WC),
1617                                               __pgprot(_PAGE_CACHE_MASK),
1618                                               0, 0, NULL);
1619        }
1620        return ret;
1621}
1622
1623int set_memory_wc(unsigned long addr, int numpages)
1624{
1625        int ret;
1626
1627        ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1628                _PAGE_CACHE_MODE_WC, NULL);
1629        if (ret)
1630                return ret;
1631
1632        ret = _set_memory_wc(addr, numpages);
1633        if (ret)
1634                free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1635
1636        return ret;
1637}
1638EXPORT_SYMBOL(set_memory_wc);
1639
1640int _set_memory_wt(unsigned long addr, int numpages)
1641{
1642        return change_page_attr_set(&addr, numpages,
1643                                    cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1644}
1645
1646int set_memory_wt(unsigned long addr, int numpages)
1647{
1648        int ret;
1649
1650        ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1651                              _PAGE_CACHE_MODE_WT, NULL);
1652        if (ret)
1653                return ret;
1654
1655        ret = _set_memory_wt(addr, numpages);
1656        if (ret)
1657                free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1658
1659        return ret;
1660}
1661EXPORT_SYMBOL_GPL(set_memory_wt);
1662
1663int _set_memory_wb(unsigned long addr, int numpages)
1664{
1665        /* WB cache mode is hard wired to all cache attribute bits being 0 */
1666        return change_page_attr_clear(&addr, numpages,
1667                                      __pgprot(_PAGE_CACHE_MASK), 0);
1668}
1669
1670int set_memory_wb(unsigned long addr, int numpages)
1671{
1672        int ret;
1673
1674        ret = _set_memory_wb(addr, numpages);
1675        if (ret)
1676                return ret;
1677
1678        free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1679        return 0;
1680}
1681EXPORT_SYMBOL(set_memory_wb);
1682
1683int set_memory_array_wb(unsigned long *addr, int addrinarray)
1684{
1685        int i;
1686        int ret;
1687
1688        /* WB cache mode is hard wired to all cache attribute bits being 0 */
1689        ret = change_page_attr_clear(addr, addrinarray,
1690                                      __pgprot(_PAGE_CACHE_MASK), 1);
1691        if (ret)
1692                return ret;
1693
1694        for (i = 0; i < addrinarray; i++)
1695                free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1696
1697        return 0;
1698}
1699EXPORT_SYMBOL(set_memory_array_wb);
1700
1701int set_memory_x(unsigned long addr, int numpages)
1702{
1703        if (!(__supported_pte_mask & _PAGE_NX))
1704                return 0;
1705
1706        return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1707}
1708EXPORT_SYMBOL(set_memory_x);
1709
1710int set_memory_nx(unsigned long addr, int numpages)
1711{
1712        if (!(__supported_pte_mask & _PAGE_NX))
1713                return 0;
1714
1715        return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1716}
1717EXPORT_SYMBOL(set_memory_nx);
1718
1719int set_memory_ro(unsigned long addr, int numpages)
1720{
1721        return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1722}
1723
1724int set_memory_rw(unsigned long addr, int numpages)
1725{
1726        return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1727}
1728
1729int set_memory_np(unsigned long addr, int numpages)
1730{
1731        return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1732}
1733
1734int set_memory_4k(unsigned long addr, int numpages)
1735{
1736        return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1737                                        __pgprot(0), 1, 0, NULL);
1738}
1739
1740int set_pages_uc(struct page *page, int numpages)
1741{
1742        unsigned long addr = (unsigned long)page_address(page);
1743
1744        return set_memory_uc(addr, numpages);
1745}
1746EXPORT_SYMBOL(set_pages_uc);
1747
1748static int _set_pages_array(struct page **pages, int addrinarray,
1749                enum page_cache_mode new_type)
1750{
1751        unsigned long start;
1752        unsigned long end;
1753        enum page_cache_mode set_type;
1754        int i;
1755        int free_idx;
1756        int ret;
1757
1758        for (i = 0; i < addrinarray; i++) {
1759                if (PageHighMem(pages[i]))
1760                        continue;
1761                start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1762                end = start + PAGE_SIZE;
1763                if (reserve_memtype(start, end, new_type, NULL))
1764                        goto err_out;
1765        }
1766
1767        /* If WC, set to UC- first and then WC */
1768        set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1769                                _PAGE_CACHE_MODE_UC_MINUS : new_type;
1770
1771        ret = cpa_set_pages_array(pages, addrinarray,
1772                                  cachemode2pgprot(set_type));
1773        if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1774                ret = change_page_attr_set_clr(NULL, addrinarray,
1775                                               cachemode2pgprot(
1776                                                _PAGE_CACHE_MODE_WC),
1777                                               __pgprot(_PAGE_CACHE_MASK),
1778                                               0, CPA_PAGES_ARRAY, pages);
1779        if (ret)
1780                goto err_out;
1781        return 0; /* Success */
1782err_out:
1783        free_idx = i;
1784        for (i = 0; i < free_idx; i++) {
1785                if (PageHighMem(pages[i]))
1786                        continue;
1787                start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1788                end = start + PAGE_SIZE;
1789                free_memtype(start, end);
1790        }
1791        return -EINVAL;
1792}
1793
1794int set_pages_array_uc(struct page **pages, int addrinarray)
1795{
1796        return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1797}
1798EXPORT_SYMBOL(set_pages_array_uc);
1799
1800int set_pages_array_wc(struct page **pages, int addrinarray)
1801{
1802        return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1803}
1804EXPORT_SYMBOL(set_pages_array_wc);
1805
1806int set_pages_array_wt(struct page **pages, int addrinarray)
1807{
1808        return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1809}
1810EXPORT_SYMBOL_GPL(set_pages_array_wt);
1811
1812int set_pages_wb(struct page *page, int numpages)
1813{
1814        unsigned long addr = (unsigned long)page_address(page);
1815
1816        return set_memory_wb(addr, numpages);
1817}
1818EXPORT_SYMBOL(set_pages_wb);
1819
1820int set_pages_array_wb(struct page **pages, int addrinarray)
1821{
1822        int retval;
1823        unsigned long start;
1824        unsigned long end;
1825        int i;
1826
1827        /* WB cache mode is hard wired to all cache attribute bits being 0 */
1828        retval = cpa_clear_pages_array(pages, addrinarray,
1829                        __pgprot(_PAGE_CACHE_MASK));
1830        if (retval)
1831                return retval;
1832
1833        for (i = 0; i < addrinarray; i++) {
1834                if (PageHighMem(pages[i]))
1835                        continue;
1836                start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1837                end = start + PAGE_SIZE;
1838                free_memtype(start, end);
1839        }
1840
1841        return 0;
1842}
1843EXPORT_SYMBOL(set_pages_array_wb);
1844
1845int set_pages_x(struct page *page, int numpages)
1846{
1847        unsigned long addr = (unsigned long)page_address(page);
1848
1849        return set_memory_x(addr, numpages);
1850}
1851EXPORT_SYMBOL(set_pages_x);
1852
1853int set_pages_nx(struct page *page, int numpages)
1854{
1855        unsigned long addr = (unsigned long)page_address(page);
1856
1857        return set_memory_nx(addr, numpages);
1858}
1859EXPORT_SYMBOL(set_pages_nx);
1860
1861int set_pages_ro(struct page *page, int numpages)
1862{
1863        unsigned long addr = (unsigned long)page_address(page);
1864
1865        return set_memory_ro(addr, numpages);
1866}
1867
1868int set_pages_rw(struct page *page, int numpages)
1869{
1870        unsigned long addr = (unsigned long)page_address(page);
1871
1872        return set_memory_rw(addr, numpages);
1873}
1874
1875#ifdef CONFIG_DEBUG_PAGEALLOC
1876
1877static int __set_pages_p(struct page *page, int numpages)
1878{
1879        unsigned long tempaddr = (unsigned long) page_address(page);
1880        struct cpa_data cpa = { .vaddr = &tempaddr,
1881                                .pgd = NULL,
1882                                .numpages = numpages,
1883                                .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1884                                .mask_clr = __pgprot(0),
1885                                .flags = 0};
1886
1887        /*
1888         * No alias checking needed for setting present flag. otherwise,
1889         * we may need to break large pages for 64-bit kernel text
1890         * mappings (this adds to complexity if we want to do this from
1891         * atomic context especially). Let's keep it simple!
1892         */
1893        return __change_page_attr_set_clr(&cpa, 0);
1894}
1895
1896static int __set_pages_np(struct page *page, int numpages)
1897{
1898        unsigned long tempaddr = (unsigned long) page_address(page);
1899        struct cpa_data cpa = { .vaddr = &tempaddr,
1900                                .pgd = NULL,
1901                                .numpages = numpages,
1902                                .mask_set = __pgprot(0),
1903                                .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1904                                .flags = 0};
1905
1906        /*
1907         * No alias checking needed for setting not present flag. otherwise,
1908         * we may need to break large pages for 64-bit kernel text
1909         * mappings (this adds to complexity if we want to do this from
1910         * atomic context especially). Let's keep it simple!
1911         */
1912        return __change_page_attr_set_clr(&cpa, 0);
1913}
1914
1915void __kernel_map_pages(struct page *page, int numpages, int enable)
1916{
1917        if (PageHighMem(page))
1918                return;
1919        if (!enable) {
1920                debug_check_no_locks_freed(page_address(page),
1921                                           numpages * PAGE_SIZE);
1922        }
1923
1924        /*
1925         * The return value is ignored as the calls cannot fail.
1926         * Large pages for identity mappings are not used at boot time
1927         * and hence no memory allocations during large page split.
1928         */
1929        if (enable)
1930                __set_pages_p(page, numpages);
1931        else
1932                __set_pages_np(page, numpages);
1933
1934        /*
1935         * We should perform an IPI and flush all tlbs,
1936         * but that can deadlock->flush only current cpu:
1937         */
1938        __flush_tlb_all();
1939
1940        arch_flush_lazy_mmu_mode();
1941}
1942
1943#ifdef CONFIG_HIBERNATION
1944
1945bool kernel_page_present(struct page *page)
1946{
1947        unsigned int level;
1948        pte_t *pte;
1949
1950        if (PageHighMem(page))
1951                return false;
1952
1953        pte = lookup_address((unsigned long)page_address(page), &level);
1954        return (pte_val(*pte) & _PAGE_PRESENT);
1955}
1956
1957#endif /* CONFIG_HIBERNATION */
1958
1959#endif /* CONFIG_DEBUG_PAGEALLOC */
1960
1961int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
1962                            unsigned numpages, unsigned long page_flags)
1963{
1964        int retval = -EINVAL;
1965
1966        struct cpa_data cpa = {
1967                .vaddr = &address,
1968                .pfn = pfn,
1969                .pgd = pgd,
1970                .numpages = numpages,
1971                .mask_set = __pgprot(0),
1972                .mask_clr = __pgprot(0),
1973                .flags = 0,
1974        };
1975
1976        if (!(__supported_pte_mask & _PAGE_NX))
1977                goto out;
1978
1979        if (!(page_flags & _PAGE_NX))
1980                cpa.mask_clr = __pgprot(_PAGE_NX);
1981
1982        if (!(page_flags & _PAGE_RW))
1983                cpa.mask_clr = __pgprot(_PAGE_RW);
1984
1985        cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
1986
1987        retval = __change_page_attr_set_clr(&cpa, 0);
1988        __flush_tlb_all();
1989
1990out:
1991        return retval;
1992}
1993
1994void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
1995                               unsigned numpages)
1996{
1997        unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
1998}
1999
2000/*
2001 * The testcases use internal knowledge of the implementation that shouldn't
2002 * be exposed to the rest of the kernel. Include these directly here.
2003 */
2004#ifdef CONFIG_CPA_DEBUG
2005#include "pageattr-test.c"
2006#endif
2007
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