1## 2## This file is part of the coreboot project. 3## 4## Copyright (C) 2008 Peter Stuge <peter@stuge.se> 5## 6## This program is free software; you can redistribute it and/or modify 7## it under the terms of the GNU General Public License as published by 8## the Free Software Foundation; either version 2 of the License, or 9## (at your option) any later version. 10## 11## This program is distributed in the hope that it will be useful, 12## but WITHOUT ANY WARRANTY; without even the implied warranty of 13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14## GNU General Public License for more details. 15## 16## You should have received a copy of the GNU General Public License 17## along with this program; if not, write to the Free Software 18## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 19## 20 21ifeq ($(CONFIG_SUPERIO_ITE_IT8716F),y) 22 23STAGE0_CHIPSET_SRC += $(src)/superio/ite/it8716f/stage1.c 24STAGE0_CHIPSET_SRC += $(src)/device/pnp_raw.c 25 26# Always add to variables, as there could be more than one Super I/O. 27STAGE2_CHIPSET_SRC += $(src)/superio/ite/it8716f/superio.c 28 29endif 30