coreboot-v3/southbridge/amd/rs690/pcie2.dts
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   1/*
   2 * This file is part of the coreboot project.
   3 *
   4 * Copyright (C) 2008 Ronald G. Minnich <rminnich@gmail.com>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19 */
  20/*
  21#Define gpp_configuration,      A=0, B=1, C=2, D=3, E=4(default)
  22#Define vga_rom_address = 0xfff0000
  23#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
  24 */
  25{
  26        device_operations       = "rs690_pcie2";
  27};
  28
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