coreboot-v3/northbridge/intel/i945/udelay.c
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   1/*
   2 * This file is part of the coreboot project.
   3 *
   4 * Copyright (C) 2007-2008 coresystems GmbH
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; version 2 of the License.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18 */
  19
  20#include <cpu/x86/tsc.h>
  21#include <cpu/x86/msr.h>
  22
  23/**
  24 * Intel Core(tm) cpus always run the TSC at the maximum possible CPU clock
  25 */
  26
  27static void udelay(u32 us)
  28{
  29        u32 dword;
  30        tsc_t tsc, tsc1, tscd;
  31        msr_t msr;
  32        u32 fsb = 0, divisor;
  33        u32 d;                  
  34        u32 dn = 0x1000000 / 2; 
  35
  36        msr = rdmsr(0xcd);
  37        switch (msr.lo & 0x07) {
  38        case 5:
  39                fsb = 400;
  40                break;
  41        case 1:
  42                fsb = 533;
  43                break;
  44        case 3:
  45                fsb = 667;
  46                break;
  47        }
  48
  49        msr = rdmsr(0x198);
  50        divisor = (msr.hi >> 8) & 0x1f;
  51
  52        d = fsb * divisor;
  53
  54        tscd.hi = us / dn;
  55        tscd.lo = (us - tscd.hi * dn) * d;
  56
  57        tsc1 = rdtsc();
  58        dword = tsc1.lo + tscd.lo;
  59        if ((dword < tsc1.lo) || (dword < tscd.lo)) {
  60                tsc1.hi++;
  61        }
  62        tsc1.lo = dword;
  63        tsc1.hi += tscd.hi;
  64
  65        do {
  66                tsc = rdtsc();
  67        } while ((tsc.hi > tsc1.hi)
  68                 || ((tsc.hi == tsc1.hi) && (tsc.lo > tsc1.lo)));
  69
  70}
  71
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