LXR coreboot-v3/mainboard/gigabyte/m57sli/dts

   1/*
   2 * This file is part of the coreboot project.
   3 *
   4 * Copyright (C) 2008 Ronald G. Minnich <rminnich@gmail.com>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19 */
  20/*00:00.0 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a1)
  2100:01.0 ISA bridge: nVidia Corporation MCP55 LPC Bridge (rev a2)
  2200:01.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2)
  2300:02.0 USB Controller: nVidia Corporation MCP55 USB Controller (rev a1)
  2400:02.1 USB Controller: nVidia Corporation MCP55 USB Controller (rev a2)
  2500:04.0 IDE interface: nVidia Corporation MCP55 IDE (rev a1)
  2600:05.0 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2)
  2700:05.1 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2)
  2800:06.0 PCI bridge: nVidia Corporation MCP55 PCI bridge (rev a2)
  2900:06.1 Audio device: nVidia Corporation MCP55 High Definition Audio (rev a2)
  3000:08.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2)
  3100:0f.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2)
  3200:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration
  3300:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map
  3400:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller
  3500:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control
  3601:0a.0 FireWire (IEEE 1394): Texas Instruments TSB43AB23 IEEE-1394a-2000 Controller (PHY/Link)
  3702:00.0 VGA compatible controller: nVidia Corporation G72 [GeForce 7300 LE] (rev a1)
  38*/
  39
  40/{
  41        mainboard_vendor = "Gigabyte";
  42        mainboard_name = "M57SLI";
  43        cpus { };
  44        apic@0 {
  45        };
  46        domain@0 {
  47                pci@0,0 { /* MCP55 RAM? */
  48                };
  49                pci@1,0 {
  50                        /config/("southbridge/nvidia/mcp55/lpc.dts");
  51                        ioport@2e {
  52                                /config/("superio/ite/it8716f/dts");
  53                                com1enable = "1";
  54                                ecenable = "1";
  55                                kbenable = "1";
  56                                mouseenable = "1";
  57                                gpioenable = "1";
  58                        };
  59                };
  60                pci@1,1 { /* smbus */
  61                };
  62                pci@2,0 { /* usb */
  63                };
  64                pci@2,1 { /* usb */
  65                };
  66                pci@4,0 {
  67                        /config/("southbridge/nvidia/mcp55/ide.dts");
  68                        ide0_enable = "1";
  69                };
  70                pci@5,0 {
  71                        /config/("southbridge/nvidia/mcp55/sata.dts");
  72                        sata0_enable = "1";
  73                };
  74                pci@5,1 {
  75                        /config/("southbridge/nvidia/mcp55/sata.dts");
  76                        sata1_enable = "1";
  77                };
  78                pci@6,0 { /* PCI */
  79                };
  80                pci@6,1 {
  81                        /*/config/("southbridge/nvidia/mcp55/audio.dts"); */
  82                };
  83                pci@8,0 {
  84                /*
  85                        /config/("southbridge/nvidia/mcp55/nic.dts");
  86                        mac_eeprom_smbus = "3";
  87                        mac_eeprom_addr = "0x51";
  88                */
  89                };
  90                pci@f,0 { /* PCIe */
  91                };
  92                pci@18,0 {
  93                        /config/("northbridge/amd/k8/pci");
  94                };
  95                pci@18,1 {};
  96                pci@18,2 {};
  97                pci@18,3 {
  98                        /config/("northbridge/amd/k8/mcf3");
  99                };
 100        };
 101};
 102