LXR coreboot-v3/device/pnp

   1/*
   2 * This file is part of the coreboot project.
   3 *
   4 * Copyright (C) 2007 Ronald G. Minnich <rminnich@gmail.com>
   5 * Copyright (C) 2007 coresystems GmbH
   6 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  21 */
  22
  23#include <types.h>
  24#include <device/pnp.h>
  25#include <io.h>
  26
  27/* Very low-level PNP functions, mostly intended for stage 0 or 1 */
  28
  29/**
  30 * Enter the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
  31 *
  32 * @param port The device I/O port.
  33 */
  34void rawpnp_enter_ext_func_mode(u16 port)
  35{
  36        outb(0x87, port);
  37        outb(0x87, port);
  38}
  39
  40/**
  41 * Exit the PNP extended function mode (a.k.a. "MB PnP" or "config" mode).
  42 *
  43 * @param port The device I/O port.
  44 */
  45void rawpnp_exit_ext_func_mode(u16 port)
  46{
  47        outb(0xaa, port);
  48}
  49
  50/**
  51 * Write an 8 bit value into a PNP configuration register.
  52 *
  53 * This is done by writing the register number to the port, and the value
  54 * into port + 1. This code assumes that the data port is always the
  55 * config-port plus 1, but luckily this is true for pretty much all devices, since
  56 * it is part of the standard.
  57 *
  58 * @param port The device I/O port.
  59 * @param reg The register number.
  60 * @param value The value to write into the specified register.
  61 */
  62void rawpnp_write_config(u16 port, u8 reg, u8 value)
  63{
  64        outb(reg, port);
  65        outb(value, port + 1);
  66}
  67
  68/**
  69 * Read an 8-bit pnp config value
  70 *
  71 * This is done by writing the register number to the port, and the value
  72 * into port + 1. This code assumes that the data port is always the
  73 * config-port plus 1, but luckily this is true for pretty much all devices, since
  74 * it is part of the standard. 
  75 *
  76 * @param port The device I/O port.
  77 * @param reg The register number.
  78 * @returns value of the register
  79 */
  80u8 rawpnp_read_config(u16 port, u8 reg)
  81{
  82        outb(reg, port);
  83        return inb(port + 1);
  84}
  85
  86/**
  87 * Select a logical device.
  88 *
  89 * PNP has up to 16 logical devices. They are selected by writing the
  90 * logical device number (LDN) to register 0x07.
  91 *
  92 * @param port The device I/O port.
  93 * @param ldn The logical device (number) which should be selected.
  94 */
  95void rawpnp_set_logical_device(u16 port, u8 ldn)
  96{
  97        rawpnp_write_config(port, 0x07, ldn);
  98}
  99
 100/**
 101 * Set the enable for the logical device.
 102 *
 103 * The enable is at register 0x30. Setting bit zero enables the device.
 104 * Code must have selected the proper logical device number (LDN) using
 105 * rawpnp_set_logical_device() beforehand. If enable is non-zero, the device
 106 * is enabled. If enable is zero, the device is disabled.
 107 *
 108 * @param port The device I/O port.
 109 * @param enable Non-zero enables the device, zero disables it.
 110 */
 111void rawpnp_set_enable(u16 port, int enable)
 112{
 113        rawpnp_write_config(port, 0x30, enable ? 0x1 : 0x0);
 114}
 115
 116/**
 117 * Set the I/O base for the device.
 118 *
 119 * The I/O base is at registers 'index' and 'index + 1', since these are
 120 * 8 bit registers and the I/O base is 16 bits. Typical values for 'index'
 121 * are 0x60 or 0x62.
 122 *
 123 * Code must have selected the proper logical device (LDN) using
 124 * rawpnp_set_logical_device() beforehand.
 125 *
 126 * @param port The device I/O port.
 127 * @param index The index port.
 128 * @param iobase The 16 bit I/O base.
 129 */
 130void rawpnp_set_iobase(u16 port, u8 index, u16 iobase)
 131{
 132        rawpnp_write_config(port, index + 0, (iobase >> 8) & 0xff); /* MSB */
 133        rawpnp_write_config(port, index + 1, iobase & 0xff);        /* LSB */
 134}
 135