LXR coreboot-v3/arch/x86/archtables.c

   1/*
   2 * table management code for coreboot
   3 *
   4 * Copyright (C) 2002 Eric Biederman, Linux NetworX
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; version 2 of the License.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
  18 *
  19 */
  20
  21/* 2006.1 yhlu add mptable cross 0x467 processing */
  22
  23#include <types.h>
  24#include <console.h>
  25#include <string.h>
  26#include <tables.h>
  27#include <multiboot.h>
  28//#include <cpu/cpu.h>
  29//#include <pirq_routing.h>
  30//#include <smp/mpspec.h>
  31//#include <acpi.h>
  32
  33// Global Descriptor Table, defined in c_start.S
  34extern u8 gdt;
  35extern u8 gdt_end;
  36
  37/* i386 lgdt argument */
  38struct gdtarg {
  39        unsigned short limit;
  40        unsigned int base;
  41} __attribute__((packed));
  42
  43#warning enable disabled code in archtables.c
  44
  45#if 0
  46// Copy GDT to new location and reload it
  47// 2003-07 by SONE Takeshi
  48// Ported from Etherboot to coreboot 2005-08 by Steve Magnani
  49void move_gdt(unsigned long newgdt)
  50{
  51        u16 num_gdt_bytes = &gdt_end - &gdt;
  52        struct gdtarg gdtarg;
  53
  54        printk(BIOS_DEBUG,"Moving GDT to %#lx...", newgdt);
  55        memcpy((void*)newgdt, &gdt, num_gdt_bytes);
  56        gdtarg.base = newgdt;
  57        gdtarg.limit = num_gdt_bytes - 1;
  58        __asm__ __volatile__ ("lgdt %0\n\t" : : "m" (gdtarg));
  59        printk(BIOS_DEBUG,"OK\n");
  60}
  61#endif
  62void *arch_write_tables(void)
  63{
  64#if 0
  65#if HAVE_MP_TABLE==1
  66        unsigned long new_low_table_end;
  67#endif
  68#endif
  69        unsigned long low_table_start, low_table_end;
  70        unsigned long rom_table_start, rom_table_end;
  71
  72        void *mbi;
  73
  74        rom_table_start = 0xf0000;
  75        rom_table_end =   0xf0000;
  76        /* Start low addr at 16 bytes instead of 0 because of a buglet
  77         * in the generic linux unzip code, as it tests for the a20 line.
  78         */
  79        low_table_start = 0;
  80        low_table_end = 16;
  81
  82        post_code(POST_STAGE2_ARCH_WRITE_TABLES_ENTER);
  83
  84        /* This table must be betweeen 0xf0000 & 0x100000 */
  85        /* we need to make a decision: create empty functions 
  86         * in .h files if the cpp variable is undefined, or #ifdef?
  87         */
  88#ifdef CONFIG_PIRQ_TABLE
  89        rom_table_end = write_pirq_routing_table(rom_table_end);
  90        rom_table_end = (rom_table_end + 1023) & ~1023;
  91#endif
  92
  93        /* Write ACPI tables */
  94        /* write them in the rom area because DSDT can be large (8K on epia-m) which
  95         * pushes coreboot table out of first 4K if set up in low table area 
  96         */
  97
  98//      rom_table_end = write_acpi_tables(rom_table_end);
  99//      rom_table_end = (rom_table_end+1023) & ~1023;
 100
 101        /* copy the smp block to address 0 */
 102        post_code(POST_STAGE2_ARCH_WRITE_TABLES_MIDDLE);
 103
 104        /* The smp table must be in 0-1K, 639K-640K, or 960K-1M */
 105//      new_low_table_end = write_smp_table(low_table_end);
 106#if 0
 107#if HAVE_MP_TABLE==1
 108        /* Don't write anything in the traditional x86 BIOS data segment,
 109         * for example the linux kernel smp need to use 0x467 to pass reset vector
 110         */
 111        if(new_low_table_end>0x467){
 112                unsigned mptable_size = new_low_table_end - low_table_end - SMP_FLOATING_TABLE_LEN;
 113                /* We can not put mptable here, we need to copy them to somewhere else*/
 114                if((rom_table_end+mptable_size)<0x100000) {
 115                        /* We can copy mptable on rom_table, and leave low space for lbtable  */
 116                        printk(BIOS_DEBUG,"Move mptable to 0x%0x\n", rom_table_end);
 117                        memcpy((unsigned char *)rom_table_end, (unsigned char *)(low_table_end+SMP_FLOATING_TABLE_LEN), mptable_size);
 118                        memset((unsigned char *)low_table_end, '\0', mptable_size + SMP_FLOATING_TABLE_LEN);
 119                        smp_write_floating_table_physaddr(low_table_end, rom_table_end);
 120                        low_table_end += SMP_FLOATING_TABLE_LEN;
 121                        rom_table_end += mptable_size;
 122                        rom_table_end = (rom_table_end+1023) & ~1023;
 123                } else {
 124                        /* We can need to put mptable low and from 0x500 */
 125                        printk(BIOS_DEBUG,"Move mptable to 0x%0x\n", 0x500);
 126                        memcpy((unsigned char *)0x500, (unsigned char *)(low_table_end+SMP_FLOATING_TABLE_LEN), mptable_size);
 127                        memset((unsigned char *)low_table_end, '\0', 0x500-low_table_end);
 128                        smp_write_floating_table_physaddr(low_table_end, 0x500);
 129                        low_table_end = 0x500 + mptable_size;
 130                }
 131        }
 132#endif 
 133#endif
 134
 135        /* Don't write anything in the traditional x86 BIOS data segment */
 136        if (low_table_end < 0x500) {
 137                low_table_end = 0x500;
 138        }
 139
 140#warning GDT should be placed in a reserved position from the beginning on.
 141#if 0
 142        // Relocate the GDT to reserved memory, so it won't get clobbered
 143        move_gdt(low_table_end);
 144        low_table_end += &gdt_end - &gdt;
 145#endif
 146
 147        /* The Multiboot information structure */
 148        mbi = (void*)rom_table_end;
 149        rom_table_end = write_multiboot_info(
 150                              low_table_start, low_table_end,
 151                              rom_table_start, rom_table_end);
 152
 153        /* The coreboot table must be in 0-4K or 960K-1M */
 154        write_coreboot_table(
 155                              low_table_start, low_table_end,
 156                              rom_table_start, rom_table_end);
 157
 158        return mbi;
 159}
 160