LXR coreboot-v2/util/romcc/tests/simple

   1static void spd_set_memclk(void)
   2{
   3        unsigned min_cycle_time, min_latency;
   4        unsigned device;
   5        int new_cycle_time, new_latency;
   6        int index;
   7        int latency;
   8
   9        min_cycle_time = 0x50;
  10        min_latency = 2;
  11        device = 0x50;
  12        new_latency = 5;
  13        new_cycle_time = 0xa0;
  14        latency = 23;
  15
  16        for(index = 0; index < 3; index++, latency++) {
  17                unsigned long loops;
  18                unsigned address = index;
  19                
  20                loops = 1000000;
  21                do {
  22                } while(--loops);
  23                if (loops) {
  24                        continue;
  25                }
  26                
  27                __builtin_outb(device, 0x10e4);
  28                
  29                __builtin_outb(address & 0xFF, 0x10e8);
  30                
  31                loops = 1000000;
  32                while(--loops)
  33                        ;
  34        }
  35
  36        if (new_cycle_time > min_cycle_time) {
  37                min_cycle_time = new_cycle_time;
  38        }
  39        if (new_latency > min_latency) {
  40                min_latency = new_latency;
  41        }
  42}
  43
  44