1# Config file for the ThinCan dbe61 2 3target dbe61 4mainboard artecgroup/dbe61 5 6# HACK to get the right TSC support. 7option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1 8 9option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0 10option CONFIG_COMPRESSED_PAYLOAD_LZMA=0 11 12## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use 13## (normal AND fallback images and payloads). 14## leave 36k for vsa and 32K for video ROM 15#option CONFIG_ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024 16 17#No VGA for now 18option CONFIG_ROM_SIZE = 1024*512 - 36*1024 19 20# CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image, 21## not including any payload. 22option CONFIG_ROM_IMAGE_SIZE=64*1024 23 24option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9 25option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9 26romimage "fallback" 27 option CONFIG_USE_FALLBACK_IMAGE=1 28 option COREBOOT_EXTRA_VERSION=".0Fallback" 29 payload ../payload.elf 30end 31 32buildrom ./coreboot.rom CONFIG_ROM_SIZE "fallback" 33