LXR coreboot-v2/src/southbridge/intel/i82801er/i82801er

   1#include <console/console.h>
   2#include <device/device.h>
   3#include <device/pci.h>
   4#include <device/pci_ids.h>
   5#include <device/pci_ops.h>
   6#include "i82801er.h"
   7
   8static void ehci_init(struct device *dev)
   9{
  10        uint32_t cmd;
  11
  12        printk_debug("EHCI: Setting up controller.. ");
  13        cmd = pci_read_config32(dev, PCI_COMMAND);
  14        pci_write_config32(dev, PCI_COMMAND, 
  15                cmd | PCI_COMMAND_MASTER);
  16
  17        printk_debug("done.\n");
  18}
  19
  20static void ehci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
  21{
  22        uint8_t access_cntl;
  23        access_cntl = pci_read_config8(dev, 0x80);
  24        /* Enable writes to protected registers */
  25        pci_write_config8(dev, 0x80, access_cntl | 1);
  26        /* Write the subsystem vendor and device id */
  27        pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, 
  28                ((device & 0xffff) << 16) | (vendor & 0xffff));
  29        /* Restore protection */
  30        pci_write_config8(dev, 0x80, access_cntl);
  31}
  32
  33static struct pci_operations lops_pci = {
  34        .set_subsystem = &ehci_set_subsystem,
  35};
  36static struct device_operations ehci_ops  = {
  37        .read_resources   = pci_dev_read_resources,
  38        .set_resources    = pci_dev_set_resources,
  39        .enable_resources = pci_dev_enable_resources,
  40        .init             = ehci_init,
  41        .scan_bus         = 0,
  42        .enable           = i82801er_enable,
  43        .ops_pci          = &lops_pci,
  44};
  45
  46static const struct pci_driver ehci_driver __pci_driver = {
  47        .ops    = &ehci_ops,
  48        .vendor = PCI_VENDOR_ID_INTEL,
  49        .device = PCI_DEVICE_ID_INTEL_82801ER_EHCI,
  50};
  51