LXR coreboot-v2/src/cpu/intel/model_6dx/model_6dx

   1#include <console/console.h>
   2#include <device/device.h>
   3#include <device/device.h>
   4#include <device/pci.h>
   5#include <string.h>
   6#include <cpu/cpu.h>
   7#include <cpu/x86/mtrr.h>
   8#include <cpu/x86/msr.h>
   9#include <cpu/x86/lapic.h>
  10#include <cpu/intel/microcode.h>
  11#include <cpu/x86/cache.h>
  12#include <cpu/x86/mtrr.h>
  13
  14static uint32_t microcode_updates[] = {
  15        /*  Dummy terminator  */
  16        0x0, 0x0, 0x0, 0x0,
  17        0x0, 0x0, 0x0, 0x0,
  18        0x0, 0x0, 0x0, 0x0,
  19        0x0, 0x0, 0x0, 0x0,
  20};
  21
  22
  23static void model_6dx_init(device_t dev)
  24{
  25        /* Turn on caching if we haven't already */
  26        x86_enable_cache();
  27        x86_setup_mtrrs(36);
  28        x86_mtrr_check();
  29        
  30        /* Update the microcode */
  31        intel_update_microcode(microcode_updates);
  32
  33        /* Enable the local cpu apics */
  34        setup_lapic();
  35};
  36
  37static struct device_operations cpu_dev_ops = {
  38        .init     = model_6dx_init,
  39};
  40static struct cpu_device_id cpu_table[] = {
  41        { X86_VENDOR_INTEL, 0x06D0 }, /* Pentium M on 90nm with 2MiB of L2 cache */
  42        { X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
  43        { 0, 0 },
  44};
  45
  46static const struct cpu_driver driver __cpu_driver = {
  47        .ops      = &cpu_dev_ops,
  48        .id_table = cpu_table,
  49};
  50