LXR coreboot/util/romcc/tests/simple

   1
   2static void spd_enable_refresh(void)
   3{
   4        /*
   5         * Effects:     Uses serial presence detect to set the
   6         *              refresh rate in the DRAMC register.
   7         *              see spd_set_dramc for the other values.
   8         * FIXME:       Check for illegal/unsupported ram configurations and abort
   9         */
  10        static const unsigned char refresh_rates[] = {
  11                0x01, /* Normal        15.625 us -> 15.6 us */
  12                0x05, /* Reduced(.25X) 3.9 us    -> 7.8 us */
  13                0x05, /* Reduced(.5X)  7.8 us    -> 7.8 us */
  14                0x02, /* Extended(2x)  31.3 us   -> 31.2 us */
  15                0x03, /* Extended(4x)  62.5 us   -> 62.4 us */
  16                0x04, /* Extended(8x)  125 us    -> 124.8 us */
  17        };
  18        /* Find the first dimm and assume the rest are the same */
  19        int byte;
  20        unsigned device;
  21        unsigned refresh_rate;
  22        byte = -1;
  23        device = 0x50;
  24        while ((byte < 0) && (device <= 0x57)) {
  25                byte = __builtin_inl(device);
  26                device += 1;
  27        }
  28        if (byte < 0) {
  29                /* We couldn't find anything we must have no memory */
  30                while(1);
  31        }
  32        byte &= 0x7f;
  33        /* Default refresh rate be conservative */
  34        refresh_rate = 5;
  35        /* see if the ram refresh is a supported one */
  36        if (byte < 6) {
  37                refresh_rate = refresh_rates[byte];
  38        }
  39        byte = __builtin_inb(0x57);
  40        byte &= 0xf8;
  41        byte |= refresh_rate;
  42        __builtin_outb(byte, 0x57);
  43}
  44