1/* $NoKeywords:$ */ 2/** 3 * @file 4 * 5 * Northbridge hardware definitions for Family 10h. 6 * 7 * @xrefitem bom "File Content Label" "Release Content" 8 * @e project: AGESA 9 * @e sub-project: HyperTransport 10 * @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $ 11 * 12 */ 13/* 14 ***************************************************************************** 15 * 16 * Copyright (c) 2011, Advanced Micro Devices, Inc. 17 * All rights reserved. 18 * 19 * Redistribution and use in source and binary forms, with or without 20 * modification, are permitted provided that the following conditions are met: 21 * * Redistributions of source code must retain the above copyright 22 * notice, this list of conditions and the following disclaimer. 23 * * Redistributions in binary form must reproduce the above copyright 24 * notice, this list of conditions and the following disclaimer in the 25 * documentation and/or other materials provided with the distribution. 26 * * Neither the name of Advanced Micro Devices, Inc. nor the names of 27 * its contributors may be used to endorse or promote products derived 28 * from this software without specific prior written permission. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 33 * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY 34 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 35 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 36 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 37 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 39 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * *************************************************************************** 42 * 43 */ 44#ifndef _HT_NB_HARDWARE_FAM10_H_ 45#define _HT_NB_HARDWARE_FAM10_H_ 46 47/* 48 *---------------------------------------------------------------------------- 49 * MODULES USED 50 * 51 *---------------------------------------------------------------------------- 52 */ 53 54/*---------------------------------------------------------------------------- 55 * DEFINITIONS AND MACROS 56 * 57 *---------------------------------------------------------------------------- 58 */ 59 60/* CPU Northbridge Functions */ 61#define CPU_HTNB_FUNC_00 0 62#define CPU_HTNB_FUNC_04 4 63#define CPU_ADDR_FUNC_01 1 64#define CPU_NB_FUNC_03 3 65#define CPU_NB_FUNC_05 5 66 67/* Function 0 registers */ 68#define REG_ROUTE0_0X40 0x40 69#define REG_ROUTE1_0X44 0x44 70#define REG_NODE_ID_0X60 0x60 71#define REG_UNIT_ID_0X64 0x64 72#define REG_LINK_TRANS_CONTROL_0X68 0x68 73#define REG_LINK_INIT_CONTROL_0X6C 0x6C 74#define REG_HT_CAP_BASE_0X80 0x80 75#define REG_HT_LINK_CLUMPING0_0X110 0x110 76#define REG_HT_LINK_RETRY0_0X130 0x130 77#define REG_HT_EXTENDED_NODE_ID_F0X160 0x160 78#define HTREG_NODE_CPUCNT_4_0 0x1F 79#define HTREG_EXTNODE_CPUCNT_7_5 0xE0 80#define REG_HT_TRAFFIC_DIST_0X164 0x164 81#define REG_LINK_GLOBAL_EXT_CONTROL_0x16C 0x16C 82#define REG_HT_LINK_EXT_CONTROL0_0X170 0x170 83#define REG_HT_LINK_INITIALIZATION_0X1A0 0x1A0 84#define PAIR_SELECT_OFFSET 8 85#define REG_HT_LINK_PAIR_DIST_0X1E0 0x1E0 86 87/* Function 1 registers */ 88#define REG_ADDR_CONFIG_MAP0_1XE0 0xE0 89#define CPU_ADDR_NUM_CONFIG_MAPS 4 90 91/* Function 3 registers */ 92#define REG_NB_SRI_XBAR_BUF_3X70 0x70 93#define REG_NB_MCT_XBAR_BUF_3X78 0x78 94#define REG_NB_FIFOPTR_3XDC 0xDC 95#define REG_NB_CAPABILITY_3XE8 0xE8 96#define REG_NB_CPUID_3XFC 0xFC 97#define REG_NB_LINK_XCS_TOKEN0_3X148 0x148 98#define REG_NB_MCA_LINK_THRESHOLD_3X168 0x168 99#define REG_NB_MCA_L3_THRESHOLD_3X170 0x170 100#define REG_NB_DOWNCORE_3X190 0x190 101#define REG_NB_SBI_CONTROL_3X1E4 0x1E4 102 103/* Function 4 registers */ 104 105/* Function 5 registers */ 106#define REG_NB_COMPUTE_UNIT_5X80 0x80 107#define REG_NB_CAPABILITY_2_5X84 0x84 108 109 110/*---------------------------------------------------------------------------- 111 * TYPEDEFS AND STRUCTURES 112 * 113 *---------------------------------------------------------------------------- 114 */ 115 116 117/*---------------------------------------------------------------------------- 118 * PROTOTYPES OF LOCAL FUNCTIONS 119 * 120 *---------------------------------------------------------------------------- 121 */ 122 123#endif /* _HT_NB_HARDWARE_FAM10_H_ */ 124