LXR coreboot/src/southbridge/via/vt8237r/bootblock.c

   1/*
   2 * This file is part of the coreboot project.
   3 *
   4 * Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz>
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; version 2 of the License.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18 */
  19
  20#include <arch/io.h>
  21#include <arch/romcc_io.h>
  22#include <device/pci_ids.h>
  23
  24static void bootblock_southbridge_init(void)
  25{
  26        device_t dev;
  27        /* don't walk other busses, HT is not enabled */
  28
  29        /* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */
  30        /* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */
  31
  32        /* Power management controller */
  33        dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
  34                    PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
  35
  36        if (dev != PCI_DEV_INVALID)
  37                goto found;
  38
  39        /* Power management controller */
  40        dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
  41                PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
  42
  43        if (dev != PCI_DEV_INVALID)
  44                goto found;
  45
  46        /* Power management controller */
  47        dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
  48                PCI_DEVICE_ID_VIA_VT8237A_LPC), 0);
  49
  50        if (dev == PCI_DEV_INVALID)
  51                return;
  52
  53found:
  54        pci_write_config8(dev, 0x41, 0x7f);
  55}
  56