LXR coreboot/src/southbridge/amd/rs690/chip.h

   1/*
   2 * This file is part of the coreboot project.
   3 *
   4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License as published by
   8 * the Free Software Foundation; version 2 of the License.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18 */
  19
  20#ifndef RS690_CHIP_H
  21#define RS690_CHIP_H
  22
  23/* Member variables are defined in devicetree.cb. */
  24struct southbridge_amd_rs690_config
  25{
  26        u8 gpp_configuration;   /* The configuration of General Purpose Port, A/B/C/D/E. */
  27        u8 port_enable;         /* Which port is enabled? GFX(2,3), GPP(4,5,6,7) */
  28        u8 gfx_dev2_dev3;       /* for GFX Core initialization REFCLK_SEL */
  29        u8 gfx_dual_slot;       /* Is it dual graphics slots */
  30        u8 gfx_lane_reversal;   /* Single/Dual slot lan reversal */
  31        u8 gfx_tmds;            /* whether support TMDS? */
  32        u8 gfx_compliance;      /* whether support compliance? */
  33        u8 gfx_reconfiguration; /* Dynamic Lind Width Control */
  34        u8 gfx_link_width;      /* Desired width of lane 2 */
  35};
  36struct chip_operations;
  37extern struct chip_operations southbridge_amd_rs690_ops;
  38
  39#endif /* RS690_CHIP_H */
  40