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20#include <string.h>
21#include <device/pci.h>
22#include <arch/acpi.h>
23
24
25
26
27
28#define APM_CNT 0xb2
29#define CST_CONTROL 0x85
30#define PST_CONTROL 0x80
31#define ACPI_DISABLE 0x1e
32#define ACPI_ENABLE 0xe1
33#define GNVS_UPDATE 0xea
34
35void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
36{
37 acpi_header_t *header = &(fadt->header);
38 u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
39
40 memset((void *) fadt, 0, sizeof(acpi_fadt_t));
41 memcpy(header->signature, "FACP", 4);
42 header->length = sizeof(acpi_fadt_t);
43 header->revision = 3;
44 memcpy(header->oem_id, "CORE ", 6);
45 memcpy(header->oem_table_id, "COREBOOT", 8);
46 memcpy(header->asl_compiler_id, "CORE", 4);
47 header->asl_compiler_revision = 1;
48
49 fadt->firmware_ctrl = (unsigned long) facs;
50 fadt->dsdt = (unsigned long) dsdt;
51 fadt->model = 1;
52 fadt->preferred_pm_profile = PM_MOBILE;
53
54 fadt->sci_int = 0x9;
55 fadt->smi_cmd = APM_CNT;
56 fadt->acpi_enable = ACPI_ENABLE;
57 fadt->acpi_disable = ACPI_DISABLE;
58 fadt->s4bios_req = 0x0;
59 fadt->pstate_cnt = PST_CONTROL;
60
61 fadt->pm1a_evt_blk = pmbase;
62 fadt->pm1b_evt_blk = 0x0;
63 fadt->pm1a_cnt_blk = pmbase + 0x4;
64 fadt->pm1b_cnt_blk = 0x0;
65 fadt->pm2_cnt_blk = pmbase + 0x20;
66 fadt->pm_tmr_blk = pmbase + 0x8;
67 fadt->gpe0_blk = pmbase + 0x28;
68 fadt->gpe1_blk = 0;
69
70 fadt->pm1_evt_len = 4;
71 fadt->pm1_cnt_len = 2;
72
73 fadt->pm2_cnt_len = 2;
74 fadt->pm_tmr_len = 4;
75 fadt->gpe0_blk_len = 8;
76 fadt->gpe1_blk_len = 0;
77 fadt->gpe1_base = 0;
78 fadt->cst_cnt = CST_CONTROL;
79 fadt->p_lvl2_lat = 1;
80 fadt->p_lvl3_lat = 85;
81 fadt->flush_size = 1024;
82 fadt->flush_stride = 16;
83 fadt->duty_offset = 1;
84 fadt->duty_width = 0;
85 fadt->day_alrm = 0xd;
86 fadt->mon_alrm = 0x00;
87 fadt->century = 0x00;
88 fadt->iapc_boot_arch = 0x03;
89
90 fadt->flags = ACPI_FADT_WBINVD | ACPI_FADT_C1_SUPPORTED |
91 ACPI_FADT_C2_MP_SUPPORTED | ACPI_FADT_SLEEP_BUTTON |
92 ACPI_FADT_RESET_REGISTER |
93 ACPI_FADT_S4_RTC_WAKE | ACPI_FADT_PLATFORM_CLOCK;
94
95 fadt->reset_reg.space_id = 1;
96 fadt->reset_reg.bit_width = 8;
97 fadt->reset_reg.bit_offset = 0;
98 fadt->reset_reg.resv = 0;
99 fadt->reset_reg.addrl = 0xcf9;
100 fadt->reset_reg.addrh = 0;
101
102 fadt->reset_value = 6;
103 fadt->x_firmware_ctl_l = (unsigned long)facs;
104 fadt->x_firmware_ctl_h = 0;
105 fadt->x_dsdt_l = (unsigned long)dsdt;
106 fadt->x_dsdt_h = 0;
107
108 fadt->x_pm1a_evt_blk.space_id = 1;
109 fadt->x_pm1a_evt_blk.bit_width = 32;
110 fadt->x_pm1a_evt_blk.bit_offset = 0;
111 fadt->x_pm1a_evt_blk.resv = 0;
112 fadt->x_pm1a_evt_blk.addrl = pmbase;
113 fadt->x_pm1a_evt_blk.addrh = 0x0;
114
115 fadt->x_pm1b_evt_blk.space_id = 1;
116 fadt->x_pm1b_evt_blk.bit_width = 0;
117 fadt->x_pm1b_evt_blk.bit_offset = 0;
118 fadt->x_pm1b_evt_blk.resv = 0;
119 fadt->x_pm1b_evt_blk.addrl = 0x0;
120 fadt->x_pm1b_evt_blk.addrh = 0x0;
121
122 fadt->x_pm1a_cnt_blk.space_id = 1;
123 fadt->x_pm1a_cnt_blk.bit_width = 16;
124 fadt->x_pm1a_cnt_blk.bit_offset = 0;
125 fadt->x_pm1a_cnt_blk.resv = 0;
126 fadt->x_pm1a_cnt_blk.addrl = pmbase + 0x4;
127 fadt->x_pm1a_cnt_blk.addrh = 0x0;
128
129 fadt->x_pm1b_cnt_blk.space_id = 1;
130 fadt->x_pm1b_cnt_blk.bit_width = 0;
131 fadt->x_pm1b_cnt_blk.bit_offset = 0;
132 fadt->x_pm1b_cnt_blk.resv = 0;
133 fadt->x_pm1b_cnt_blk.addrl = 0x0;
134 fadt->x_pm1b_cnt_blk.addrh = 0x0;
135
136 fadt->x_pm2_cnt_blk.space_id = 1;
137 fadt->x_pm2_cnt_blk.bit_width = 8;
138 fadt->x_pm2_cnt_blk.bit_offset = 0;
139 fadt->x_pm2_cnt_blk.resv = 0;
140 fadt->x_pm2_cnt_blk.addrl = pmbase + 0x20;
141 fadt->x_pm2_cnt_blk.addrh = 0x0;
142
143 fadt->x_pm_tmr_blk.space_id = 1;
144 fadt->x_pm_tmr_blk.bit_width = 32;
145 fadt->x_pm_tmr_blk.bit_offset = 0;
146 fadt->x_pm_tmr_blk.resv = 0;
147 fadt->x_pm_tmr_blk.addrl = pmbase + 0x8;
148 fadt->x_pm_tmr_blk.addrh = 0x0;
149
150 fadt->x_gpe0_blk.space_id = 1;
151 fadt->x_gpe0_blk.bit_width = 64;
152 fadt->x_gpe0_blk.bit_offset = 0;
153 fadt->x_gpe0_blk.resv = 0;
154 fadt->x_gpe0_blk.addrl = pmbase + 0x28;
155 fadt->x_gpe0_blk.addrh = 0x0;
156
157 fadt->x_gpe1_blk.space_id = 1;
158 fadt->x_gpe1_blk.bit_width = 0;
159 fadt->x_gpe1_blk.bit_offset = 0;
160 fadt->x_gpe1_blk.resv = 0;
161 fadt->x_gpe1_blk.addrl = 0x0;
162 fadt->x_gpe1_blk.addrh = 0x0;
163
164 header->checksum =
165 acpi_checksum((void *) fadt, header->length);
166}
167
